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UefiCpuPkg: Add CpuDxeRiscV64 module
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1 /** @file
2 RISC-V CPU DXE module header file.
3
4 Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
5
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8 **/
9
10 #ifndef CPU_DXE_H_
11 #define CPU_DXE_H_
12
13 #include <PiDxe.h>
14
15 #include <Protocol/Cpu.h>
16 #include <Protocol/RiscVBootProtocol.h>
17 #include <Library/BaseRiscVSbiLib.h>
18 #include <Library/BaseLib.h>
19 #include <Library/CpuExceptionHandlerLib.h>
20 #include <Library/DebugLib.h>
21 #include <Library/UefiBootServicesTableLib.h>
22 #include <Library/UefiDriverEntryPoint.h>
23
24 /**
25 Flush CPU data cache. If the instruction cache is fully coherent
26 with all DMA operations then function can just return EFI_SUCCESS.
27
28 @param This Protocol instance structure
29 @param Start Physical address to start flushing from.
30 @param Length Number of bytes to flush. Round up to chipset
31 granularity.
32 @param FlushType Specifies the type of flush operation to perform.
33
34 @retval EFI_SUCCESS If cache was flushed
35 @retval EFI_UNSUPPORTED If flush type is not supported.
36 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
37
38 **/
39 EFI_STATUS
40 EFIAPI
41 CpuFlushCpuDataCache (
42 IN EFI_CPU_ARCH_PROTOCOL *This,
43 IN EFI_PHYSICAL_ADDRESS Start,
44 IN UINT64 Length,
45 IN EFI_CPU_FLUSH_TYPE FlushType
46 );
47
48 /**
49 Enables CPU interrupts.
50
51 @param This Protocol instance structure
52
53 @retval EFI_SUCCESS If interrupts were enabled in the CPU
54 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
55
56 **/
57 EFI_STATUS
58 EFIAPI
59 CpuEnableInterrupt (
60 IN EFI_CPU_ARCH_PROTOCOL *This
61 );
62
63 /**
64 Disables CPU interrupts.
65
66 @param This Protocol instance structure
67
68 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
69 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
70
71 **/
72 EFI_STATUS
73 EFIAPI
74 CpuDisableInterrupt (
75 IN EFI_CPU_ARCH_PROTOCOL *This
76 );
77
78 /**
79 Return the state of interrupts.
80
81 @param This Protocol instance structure
82 @param State Pointer to the CPU's current interrupt state
83
84 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
85 @retval EFI_INVALID_PARAMETER State is NULL.
86
87 **/
88 EFI_STATUS
89 EFIAPI
90 CpuGetInterruptState (
91 IN EFI_CPU_ARCH_PROTOCOL *This,
92 OUT BOOLEAN *State
93 );
94
95 /**
96 Generates an INIT to the CPU.
97
98 @param This Protocol instance structure
99 @param InitType Type of CPU INIT to perform
100
101 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
102 seen.
103 @retval EFI_DEVICE_ERROR If CPU INIT failed.
104 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
105
106 **/
107 EFI_STATUS
108 EFIAPI
109 CpuInit (
110 IN EFI_CPU_ARCH_PROTOCOL *This,
111 IN EFI_CPU_INIT_TYPE InitType
112 );
113
114 /**
115 Registers a function to be called from the CPU interrupt handler.
116
117 @param This Protocol instance structure
118 @param InterruptType Defines which interrupt to hook. IA-32
119 valid range is 0x00 through 0xFF
120 @param InterruptHandler A pointer to a function of type
121 EFI_CPU_INTERRUPT_HANDLER that is called
122 when a processor interrupt occurs. A null
123 pointer is an error condition.
124
125 @retval EFI_SUCCESS If handler installed or uninstalled.
126 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
127 for InterruptType was previously installed.
128 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
129 InterruptType was not previously installed.
130 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
131 is not supported.
132
133 **/
134 EFI_STATUS
135 EFIAPI
136 CpuRegisterInterruptHandler (
137 IN EFI_CPU_ARCH_PROTOCOL *This,
138 IN EFI_EXCEPTION_TYPE InterruptType,
139 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
140 );
141
142 /**
143 Returns a timer value from one of the CPU's internal timers. There is no
144 inherent time interval between ticks but is a function of the CPU frequency.
145
146 @param This - Protocol instance structure.
147 @param TimerIndex - Specifies which CPU timer is requested.
148 @param TimerValue - Pointer to the returned timer value.
149 @param TimerPeriod - A pointer to the amount of time that passes
150 in femtoseconds (10-15) for each increment
151 of TimerValue. If TimerValue does not
152 increment at a predictable rate, then 0 is
153 returned. The amount of time that has
154 passed between two calls to GetTimerValue()
155 can be calculated with the formula
156 (TimerValue2 - TimerValue1) * TimerPeriod.
157 This parameter is optional and may be NULL.
158
159 @retval EFI_SUCCESS - If the CPU timer count was returned.
160 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
161 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
162 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
163
164 **/
165 EFI_STATUS
166 EFIAPI
167 CpuGetTimerValue (
168 IN EFI_CPU_ARCH_PROTOCOL *This,
169 IN UINT32 TimerIndex,
170 OUT UINT64 *TimerValue,
171 OUT UINT64 *TimerPeriod OPTIONAL
172 );
173
174 /**
175 Set memory cacheability attributes for given range of memeory.
176
177 @param This Protocol instance structure
178 @param BaseAddress Specifies the start address of the
179 memory range
180 @param Length Specifies the length of the memory range
181 @param Attributes The memory cacheability for the memory range
182
183 @retval EFI_SUCCESS If the cacheability of that memory range is
184 set successfully
185 @retval EFI_UNSUPPORTED If the desired operation cannot be done
186 @retval EFI_INVALID_PARAMETER The input parameter is not correct,
187 such as Length = 0
188
189 **/
190 EFI_STATUS
191 EFIAPI
192 CpuSetMemoryAttributes (
193 IN EFI_CPU_ARCH_PROTOCOL *This,
194 IN EFI_PHYSICAL_ADDRESS BaseAddress,
195 IN UINT64 Length,
196 IN UINT64 Attributes
197 );
198
199 #endif