1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 ; This is the assembly code for MP support
19 ;-------------------------------------------------------------------------------
22 extern ASM_PFX(InitializeFloatingPointUnits)
28 ;-------------------------------------------------------------------------------------
29 ;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
30 ;procedure serializes all the AP processors through an Init sequence. It must be
31 ;noted that APs arrive here very raw...ie: real mode, no stack.
32 ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
34 ;-------------------------------------------------------------------------------------
35 global ASM_PFX(RendezvousFunnelProc)
36 ASM_PFX(RendezvousFunnelProc):
37 RendezvousFunnelProcStart:
38 ; At this point CS = 0x(vv00) and ip= 0x0.
39 ; Save BIST information to ebp firstly
42 mov ebp, eax ; Save BIST information
52 mov si, BufferStartLocation
55 mov di, PmodeOffsetLocation
62 mov di, LmodeOffsetLocation
71 mov ecx,[si] ; ECX is keeping the value of CR3
83 mov eax, cr0 ;Get control register 0
84 or eax, 000000003h ;Set PE bit (bit #0) & MP
87 jmp PROTECT_MODE_CS:strict dword 0 ; far jump to protected mode
89 Flat32Start: ; protected mode entry point
90 mov ax, PROTECT_MODE_DS
104 mov ecx, 0c0000080h ; EFER MSR number.
106 bts eax, 8 ; Set LME=1.
109 mov eax, cr0 ; Read CR0.
110 bts eax, 31 ; Set PG=1.
111 mov cr0, eax ; Write CR0.
113 jmp LONG_MODE_CS:strict dword 0 ; far jump to long mode
123 add edi, LockLocation
124 mov rax, NotVacantFlag
127 xchg qword [edi], rax
128 cmp rax, NotVacantFlag
132 add edi, NumApsExecutingLoction
138 add edi, StackSizeLocation
141 add edi, StackStartAddressLocation
149 add edi, LockLocation
150 xchg qword [edi], rax
153 push rbp ; push BIST data at top of AP stack
154 xor rbp, rbp ; clear ebp for call stack trace
158 mov rax, ASM_PFX(InitializeFloatingPointUnits)
160 call rax ; Call assembly function to initialize FPU per UEFI spec
163 mov edx, ebx ; edx is NumApsExecuting
165 add ecx, LockLocation ; rcx is address of exchange info data buffer
168 add edi, ApProcedureLocation
172 call rax ; invoke C function
175 RendezvousFunnelProcEnd:
177 ;-------------------------------------------------------------------------------------
178 ; AsmGetAddressMap (&AddressMap);
179 ;-------------------------------------------------------------------------------------
180 global ASM_PFX(AsmGetAddressMap)
181 ASM_PFX(AsmGetAddressMap):
182 mov rax, ASM_PFX(RendezvousFunnelProc)
184 mov qword [rcx + 8h], Flat32Start - RendezvousFunnelProcStart
185 mov qword [rcx + 10h], LongModeStart - RendezvousFunnelProcStart
186 mov qword [rcx + 18h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
189 ;-------------------------------------------------------------------------------------
190 ;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
191 ;about to become an AP. It switches it'stack with the current AP.
192 ;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
193 ;-------------------------------------------------------------------------------------
194 global ASM_PFX(AsmExchangeRole)
195 ASM_PFX(AsmExchangeRole):
196 ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
197 ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
221 ; rsi contains MyInfo pointer
224 ; rdi contains OthersInfo pointer
227 ;Store EFLAGS, GDTR and IDTR regiter to stack
232 ; Store the its StackPointer
235 ; update its switch state to STORED
236 mov byte [rsi], CPU_SWITCH_STATE_STORED
239 ; wait until the other CPU finish storing its state
240 cmp byte [rdi], CPU_SWITCH_STATE_STORED
243 jmp WaitForOtherStored
246 ; Since another CPU already stored its state, load them
253 ; load its future StackPointer
256 ; update the other CPU's switch state to LOADED
257 mov byte [rdi], CPU_SWITCH_STATE_LOADED
260 ; wait until the other CPU finish loading new state,
261 ; otherwise the data in stack may corrupt
262 cmp byte [rsi], CPU_SWITCH_STATE_LOADED
265 jmp WaitForOtherLoaded
268 ; since the other CPU already get the data it want, leave this procedure
295 global ASM_PFX(AsmInitializeGdt)
296 ASM_PFX(AsmInitializeGdt):
300 lgdt [rcx] ; update the GDTR
303 mov rax, ASM_PFX(SetCodeSelectorFarJump)
305 mov rdx, LONG_MODE_CS
306 mov [rsp + 4], dx ; get new CS
307 jmp far dword [rsp] ; far jump with new CS
308 ASM_PFX(SetCodeSelectorFarJump):
311 mov rax, LONG_MODE_DS ; get new DS