2 Definitions for CPU S3 data.
4 Copyright (c) 2013 - 2020, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef _ACPI_CPU_DATA_H_
10 #define _ACPI_CPU_DATA_H_
13 // Register types in register table
22 // Semaphore type used to control the execute sequence of the Msr.
23 // It will be insert between two Msr which has execute dependence.
30 // Describe the dependency type for different features.
31 // The value set to CPU_REGISTER_TABLE_ENTRY.Value when the REGISTER_TYPE is Semaphore.
39 } CPU_FEATURE_DEPENDENCE_TYPE
;
46 // Record the package count in this CPU.
50 // Record the max core count in this CPU.
51 // Different packages may have different core count, this value
52 // save the max core count in all the packages.
56 // Record the max thread count in this CPU.
57 // Different cores may have different thread count, this value
58 // save the max thread count in all the cores.
60 UINT32 MaxThreadCount
;
62 // This field points to an array.
63 // This array saves thread count (type UINT32) of each package.
64 // The array has PackageCount elements.
66 // If the platform does not support MSR setting at S3 resume, and
67 // therefore it doesn't need the dependency semaphores, it should set
70 EFI_PHYSICAL_ADDRESS ThreadCountPerPackage
;
72 // This field points to an array.
73 // This array saves thread count (type UINT8) of each core.
74 // The array has PackageCount * MaxCoreCount elements.
76 // If the platform does not support MSR setting at S3 resume, and
77 // therefore it doesn't need the dependency semaphores, it should set
80 EFI_PHYSICAL_ADDRESS ThreadCountPerCore
;
81 } CPU_STATUS_INFORMATION
;
84 // Element of register table entry
87 REGISTER_TYPE RegisterType
; // offset 0 - 3
88 UINT32 Index
; // offset 4 - 7
89 UINT8 ValidBitStart
; // offset 8
90 UINT8 ValidBitLength
; // offset 9
91 BOOLEAN TestThenWrite
; // offset 10
92 UINT8 Reserved1
; // offset 11
93 UINT32 HighIndex
; // offset 12-15, only valid for MemoryMapped
94 UINT64 Value
; // offset 16-23
95 } CPU_REGISTER_TABLE_ENTRY
;
98 // Register table definition, including current table length,
99 // allocated size of this table, and pointer to the list of table entries.
103 // The number of valid entries in the RegisterTableEntry buffer
106 UINT32 NumberBeforeReset
;
108 // The size, in bytes, of the RegisterTableEntry buffer
110 UINT32 AllocatedSize
;
112 // The initial APIC ID of the CPU this register table applies to
114 UINT32 InitialApicId
;
116 // Physical address of CPU_REGISTER_TABLE_ENTRY structures.
118 EFI_PHYSICAL_ADDRESS RegisterTableEntry
;
119 } CPU_REGISTER_TABLE
;
122 // Data structure that is required for ACPI S3 resume. The PCD
123 // PcdCpuS3DataAddress must be set to the physical address where this structure
128 // Physical address of 4KB buffer allocated below 1MB from memory of type
129 // EfiReservedMemoryType. The buffer is not required to be initialized, but
130 // it is recommended that the buffer be zero-filled. This buffer is used to
131 // wake APs during an ACPI S3 resume.
133 EFI_PHYSICAL_ADDRESS StartupVector
;
135 // Physical address of structure of type IA32_DESCRIPTOR. The
136 // IA32_DESCRIPTOR structure provides the base address and length of a GDT
137 // The GDT must be filled in with the GDT contents that are
138 // used during an ACPI S3 resume. This is typically the contents of the GDT
139 // used by the boot processor when the platform is booted.
141 EFI_PHYSICAL_ADDRESS GdtrProfile
;
143 // Physical address of structure of type IA32_DESCRIPTOR. The
144 // IA32_DESCRIPTOR structure provides the base address and length of an IDT.
145 // The IDT must be filled in with the IDT contents that are
146 // used during an ACPI S3 resume. This is typically the contents of the IDT
147 // used by the boot processor when the platform is booted.
149 EFI_PHYSICAL_ADDRESS IdtrProfile
;
151 // Physical address of a buffer that is used as stacks during ACPI S3 resume.
152 // The total size of this buffer, in bytes, is NumberOfCpus * StackSize. This
153 // structure must be allocated from memory of type EfiACPIMemoryNVS.
155 EFI_PHYSICAL_ADDRESS StackAddress
;
157 // The size, in bytes, of the stack provided to each CPU during ACPI S3 resume.
161 // The number of CPUs. If a platform does not support hot plug CPUs, then
162 // this is the number of CPUs detected when the platform is booted, regardless
163 // of being enabled or disabled. If a platform does support hot plug CPUs,
164 // then this is the maximum number of CPUs that the platform supports.
168 // Physical address of structure of type MTRR_SETTINGS that contains a copy
169 // of the MTRR settings that are compatible with the MTRR settings used by
170 // the boot processor when the platform was booted. These MTRR settings are
171 // used during an ACPI S3 resume.
173 EFI_PHYSICAL_ADDRESS MtrrTable
;
175 // Physical address of an array of CPU_REGISTER_TABLE structures, with
176 // NumberOfCpus entries. If a register table is not required, then the
177 // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
178 // If TableLength is > 0, then elements of RegisterTableEntry are used to
179 // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
180 // before SMBASE relocation is performed.
182 EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable
;
184 // Physical address of an array of CPU_REGISTER_TABLE structures, with
185 // NumberOfCpus entries. If a register table is not required, then the
186 // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
187 // If TableLength is > 0, then elements of RegisterTableEntry are used to
188 // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
189 // after SMBASE relocation is performed.
191 EFI_PHYSICAL_ADDRESS RegisterTable
;
193 // Physical address of a buffer that contains the machine check handler that
194 // is used during an ACPI S3 Resume. In order for this machine check
195 // handler to be active on an AP during an ACPI S3 resume, the machine check
196 // vector in the IDT provided by IdtrProfile must be initialized to transfer
197 // control to this physical address.
199 EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase
;
201 // The size, in bytes, of the machine check handler that is used during an
202 // ACPI S3 Resume. If this field is 0, then a machine check handler is not
205 UINT32 ApMachineCheckHandlerSize
;
207 // CPU information which is required when set the register table.
209 CPU_STATUS_INFORMATION CpuStatus
;
211 // Location info for each AP.
212 // It points to an array which saves all APs location info.
213 // The array count is the AP count in this CPU.
215 // If the platform does not support MSR setting at S3 resume, and
216 // therefore it doesn't need the dependency semaphores, it should set
219 EFI_PHYSICAL_ADDRESS ApLocation
;