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1 /** @file
2 AESNI feature.
3
4 Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "CpuCommonFeatures.h"
10
11 /**
12 Prepares for the data used by CPU feature detection and initialization.
13
14 @param[in] NumberOfProcessors The number of CPUs in the platform.
15
16 @return Pointer to a buffer of CPU related configuration data.
17
18 @note This service could be called by BSP only.
19 **/
20 VOID *
21 EFIAPI
22 AesniGetConfigData (
23 IN UINTN NumberOfProcessors
24 )
25 {
26 UINT64 *ConfigData;
27
28 ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);
29 ASSERT (ConfigData != NULL);
30 return ConfigData;
31 }
32
33 /**
34 Detects if AESNI feature supported on current processor.
35
36 @param[in] ProcessorNumber The index of the CPU executing this function.
37 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
38 structure for the CPU executing this function.
39 @param[in] ConfigData A pointer to the configuration buffer returned
40 by CPU_FEATURE_GET_CONFIG_DATA. NULL if
41 CPU_FEATURE_GET_CONFIG_DATA was not provided in
42 RegisterCpuFeature().
43
44 @retval TRUE AESNI feature is supported.
45 @retval FALSE AESNI feature is not supported.
46
47 @note This service could be called by BSP/APs.
48 **/
49 BOOLEAN
50 EFIAPI
51 AesniSupport (
52 IN UINTN ProcessorNumber,
53 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
54 IN VOID *ConfigData OPTIONAL
55 )
56 {
57 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
58
59 if (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1) {
60 MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
61 ASSERT (MsrFeatureConfig != NULL);
62 MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
63 return TRUE;
64 }
65 return FALSE;
66 }
67
68 /**
69 Initializes AESNI feature to specific state.
70
71 @param[in] ProcessorNumber The index of the CPU executing this function.
72 @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
73 structure for the CPU executing this function.
74 @param[in] ConfigData A pointer to the configuration buffer returned
75 by CPU_FEATURE_GET_CONFIG_DATA. NULL if
76 CPU_FEATURE_GET_CONFIG_DATA was not provided in
77 RegisterCpuFeature().
78 @param[in] State If TRUE, then the AESNI feature must be enabled.
79 If FALSE, then the AESNI feature must be disabled.
80
81 @retval RETURN_SUCCESS AESNI feature is initialized.
82
83 @note This service could be called by BSP only.
84 **/
85 RETURN_STATUS
86 EFIAPI
87 AesniInitialize (
88 IN UINTN ProcessorNumber,
89 IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
90 IN VOID *ConfigData OPTIONAL,
91 IN BOOLEAN State
92 )
93 {
94 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *MsrFeatureConfig;
95
96 //
97 // SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,
98 // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here
99 //
100 // The scope of the MSR_SANDY_BRIDGE_FEATURE_CONFIG is Core, only program MSR_FEATURE_CONFIG for thread 0
101 // of each core. Otherwise, once a thread in the core disabled AES, the other thread will cause GP when
102 // programming it.
103 //
104 if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
105 MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
106 ASSERT (MsrFeatureConfig != NULL);
107 if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
108 CPU_REGISTER_TABLE_WRITE_FIELD (
109 ProcessorNumber,
110 Msr,
111 MSR_SANDY_BRIDGE_FEATURE_CONFIG,
112 MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER,
113 Bits.AESConfiguration,
114 BIT0 | ((State) ? 0 : BIT1)
115 );
116 }
117 }
118 return RETURN_SUCCESS;
119 }