UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c

   1 /** @file
   2   AESNI feature.
   3
   4   Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #include "CpuCommonFeatures.h"
  10
  11 /**
  12   Prepares for the data used by CPU feature detection and initialization.
  13
  14   @param[in]  NumberOfProcessors  The number of CPUs in the platform.
  15
  16   @return  Pointer to a buffer of CPU related configuration data.
  17
  18   @note This service could be called by BSP only.
  19 **/
  20 VOID *
  21 EFIAPI
  22 AesniGetConfigData (
  23   IN UINTN  NumberOfProcessors
  24   )
  25 {
  26   UINT64                            *ConfigData;
  27
  28   ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);
  29   ASSERT (ConfigData != NULL);
  30   return ConfigData;
  31 }
  32
  33 /**
  34   Detects if AESNI feature supported on current processor.
  35
  36   @param[in]  ProcessorNumber  The index of the CPU executing this function.
  37   @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  38                                structure for the CPU executing this function.
  39   @param[in]  ConfigData       A pointer to the configuration buffer returned
  40                                by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
  41                                CPU_FEATURE_GET_CONFIG_DATA was not provided in
  42                                RegisterCpuFeature().
  43
  44   @retval TRUE     AESNI feature is supported.
  45   @retval FALSE    AESNI feature is not supported.
  46
  47   @note This service could be called by BSP/APs.
  48 **/
  49 BOOLEAN
  50 EFIAPI
  51 AesniSupport (
  52   IN UINTN                             ProcessorNumber,
  53   IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
  54   IN VOID                              *ConfigData  OPTIONAL
  55   )
  56 {
  57   MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER   *MsrFeatureConfig;
  58
  59   if (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1) {
  60     if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  61         IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  62         IS_XEON_5600_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  63         IS_XEON_E7_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  64         IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
  65       MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
  66       ASSERT (MsrFeatureConfig != NULL);
  67       MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
  68     }
  69     return TRUE;
  70   }
  71   return FALSE;
  72 }
  73
  74 /**
  75   Initializes AESNI feature to specific state.
  76
  77   @param[in]  ProcessorNumber  The index of the CPU executing this function.
  78   @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  79                                structure for the CPU executing this function.
  80   @param[in]  ConfigData       A pointer to the configuration buffer returned
  81                                by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
  82                                CPU_FEATURE_GET_CONFIG_DATA was not provided in
  83                                RegisterCpuFeature().
  84   @param[in]  State            If TRUE, then the AESNI feature must be enabled.
  85                                If FALSE, then the AESNI feature must be disabled.
  86
  87   @retval RETURN_SUCCESS       AESNI feature is initialized.
  88
  89   @note This service could be called by BSP only.
  90 **/
  91 RETURN_STATUS
  92 EFIAPI
  93 AesniInitialize (
  94   IN UINTN                             ProcessorNumber,
  95   IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
  96   IN VOID                              *ConfigData,  OPTIONAL
  97   IN BOOLEAN                           State
  98   )
  99 {
 100   MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER   *MsrFeatureConfig;
 101
 102   //
 103   // SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,
 104   // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here
 105   //
 106   // The scope of the MSR_SANDY_BRIDGE_FEATURE_CONFIG is Core, only program MSR_FEATURE_CONFIG for thread 0
 107   // of each core. Otherwise, once a thread in the core disabled AES, the other thread will cause GP when
 108   // programming it.
 109   //
 110   if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
 111     MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
 112     ASSERT (MsrFeatureConfig != NULL);
 113     if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
 114       CPU_REGISTER_TABLE_WRITE_FIELD (
 115         ProcessorNumber,
 116         Msr,
 117         MSR_SANDY_BRIDGE_FEATURE_CONFIG,
 118         MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER,
 119         Bits.AESConfiguration,
 120         BIT0 | ((State) ? 0 : BIT1)
 121         );
 122     }
 123   }
 124   return RETURN_SUCCESS;
 125 }