1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 ; ExceptionHandlerAsm.Asm
17 ; IA32 CPU Exception Handler
21 ;------------------------------------------------------------------------------
27 ; CommonExceptionHandler()
29 CommonExceptionHandler PROTO C
33 CommonEntryAddr DD CommonInterruptEntry
35 EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
40 ; exception handler stub table
44 jmp dword ptr [CommonEntryAddr]
47 jmp dword ptr [CommonEntryAddr]
50 jmp dword ptr [CommonEntryAddr]
53 jmp dword ptr [CommonEntryAddr]
56 jmp dword ptr [CommonEntryAddr]
59 jmp dword ptr [CommonEntryAddr]
62 jmp dword ptr [CommonEntryAddr]
65 jmp dword ptr [CommonEntryAddr]
68 jmp dword ptr [CommonEntryAddr]
71 jmp dword ptr [CommonEntryAddr]
74 jmp dword ptr [CommonEntryAddr]
77 jmp dword ptr [CommonEntryAddr]
80 jmp dword ptr [CommonEntryAddr]
83 jmp dword ptr [CommonEntryAddr]
86 jmp dword ptr [CommonEntryAddr]
89 jmp dword ptr [CommonEntryAddr]
92 jmp dword ptr [CommonEntryAddr]
95 jmp dword ptr [CommonEntryAddr]
98 jmp dword ptr [CommonEntryAddr]
101 jmp dword ptr [CommonEntryAddr]
104 jmp dword ptr [CommonEntryAddr]
107 jmp dword ptr [CommonEntryAddr]
110 jmp dword ptr [CommonEntryAddr]
113 jmp dword ptr [CommonEntryAddr]
116 jmp dword ptr [CommonEntryAddr]
119 jmp dword ptr [CommonEntryAddr]
122 jmp dword ptr [CommonEntryAddr]
125 jmp dword ptr [CommonEntryAddr]
128 jmp dword ptr [CommonEntryAddr]
131 jmp dword ptr [CommonEntryAddr]
134 jmp dword ptr [CommonEntryAddr]
137 jmp dword ptr [CommonEntryAddr]
139 ;----------------------------------------------------------------------------;
140 ; CommonInterruptEntry ;
141 ;----------------------------------------------------------------------------;
142 ; The follow algorithm is used for the common interrupt routine.
143 ; Entry from each interrupt with a push eax and eax=interrupt number
145 CommonInterruptEntry PROC PUBLIC
148 ; All interrupt handlers are invoked through interrupt gates, so
149 ; IF flag automatically cleared at the entry point
153 ; Calculate vector number
155 ; Get the return address of call, actually, it is the
156 ; address of vector number.
160 cmp ecx, 32 ; Intel reserved vector for exceptions?
162 bt mErrorCodeFlag, ecx
169 ; +---------------------+
171 ; +---------------------+
173 ; +---------------------+
175 ; +---------------------+
177 ; +---------------------+ <-- ESP
180 ; ECX - Vector Number
184 ; Put Vector Number on stack
189 ; Put 0 (dummy) error code on stack, and restore ECX
191 xor ecx, ecx ; ECX = 0
194 jmp ErrorCodeAndVectorOnStack
200 ; +---------------------+
202 ; +---------------------+
204 ; +---------------------+
206 ; +---------------------+
208 ; +---------------------+
210 ; +---------------------+ <-- ESP
213 ; ECX - Vector Number
217 ; Put Vector Number on stack and restore ECX
221 ErrorCodeAndVectorOnStack:
227 ; +---------------------+
229 ; +---------------------+
231 ; +---------------------+
233 ; +---------------------+
235 ; +---------------------+
237 ; +---------------------+
239 ; +---------------------+ <-- EBP
243 ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
249 ;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
254 lea ecx, [ebp + 6 * 4]
256 push dword ptr [ebp] ; EBP
260 ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
263 movzx eax, word ptr [ebp + 4 * 4]
275 mov eax, [ebp + 3 * 4]
278 ;; UINT32 Gdtr[2], Idtr[2];
301 mov eax, [ebp + 5 * 4]
304 ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
318 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
332 ;; FX_SAVE_STATE_IA32 FxSaveState;
335 db 0fh, 0aeh, 07h ;fxsave [edi]
337 ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
340 ;; UINT32 ExceptionData;
341 push dword ptr [ebp + 2 * 4]
343 ;; Prepare parameter and call
346 mov edx, dword ptr [ebp + 1 * 4]
350 ; Call External Exception Handler
352 mov eax, CommonExceptionHandler
357 ;; UINT32 ExceptionData;
360 ;; FX_SAVE_STATE_IA32 FxSaveState;
362 db 0fh, 0aeh, 0eh ; fxrstor [esi]
365 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
366 ;; Skip restoration of DRx registers to support in-circuit emualators
367 ;; or debuggers set breakpoint in interrupt/exception context
370 ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
373 add esp, 4 ; not for Cr1
382 pop dword ptr [ebp + 5 * 4]
385 ;; UINT32 Gdtr[2], Idtr[2];
386 ;; Best not let anyone mess with these particular registers...
390 pop dword ptr [ebp + 3 * 4]
392 ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
393 ;; NOTE - modified segment registers could hang the debugger... We
394 ;; could attempt to insulate ourselves against this possibility,
395 ;; but that poses risks as well.
401 pop dword ptr [ebp + 4 * 4]
404 ;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
407 add esp, 4 ; not for ebp
408 add esp, 4 ; not for esp
419 CommonInterruptEntry ENDP
421 ;---------------------------------------;
422 ; _GetTemplateAddressMap ;
423 ;----------------------------------------------------------------------------;
426 ; GetTemplateAddressMap (
427 ; EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
430 ; Routine Description:
432 ; Return address map of interrupt handler template so that C code can generate
443 ; Input: [ebp][0] = Original ebp
444 ; [ebp][4] = Return address
449 ;-----------------------------------------------------------------------------;
450 GetTemplateAddressMap proc near public
455 mov ebx, dword ptr [ebp+08h]
456 mov dword ptr [ebx], Exception0Handle
457 mov dword ptr [ebx+4h], Exception1Handle - Exception0Handle
462 GetTemplateAddressMap ENDP