1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 ; This is the assembly code for MP support
19 ;-------------------------------------------------------------------------------
22 extern ASM_PFX(InitializeFloatingPointUnits)
26 ;-------------------------------------------------------------------------------------
27 ;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
28 ;procedure serializes all the AP processors through an Init sequence. It must be
29 ;noted that APs arrive here very raw...ie: real mode, no stack.
30 ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
32 ;-------------------------------------------------------------------------------------
33 global ASM_PFX(RendezvousFunnelProc)
34 ASM_PFX(RendezvousFunnelProc):
35 RendezvousFunnelProcStart:
36 ; At this point CS = 0x(vv00) and ip= 0x0.
38 mov ebp, eax ; save BIST information
48 mov si, BufferStartLocation
51 mov si, ModeOffsetLocation
53 mov si, CodeSegmentLocation
62 mov si, DataSegmentLocation
74 mov eax, cr0 ; Get control register 0
75 or eax, 000000003h ; Set PE bit (bit #0) & MP
78 jmp 0:strict dword 0 ; far jump to protected mode
80 Flat32Start: ; protected mode entry point
89 ; Increment the number of APs executing here as early as possible
90 ; This is decremented in C code when AP is finished executing
92 add edi, NumApsExecutingLocation
96 add edi, EnableExecuteDisableLocation
98 jz SkipEnableExecuteDisable
101 ; Enable IA32 PAE execute disable
122 SkipEnableExecuteDisable:
124 add edi, InitFlagLocation
125 cmp dword [edi], 1 ; 1 == ApInitConfig
130 add edi, LockLocation
131 mov eax, NotVacantFlag
135 cmp eax, NotVacantFlag
139 add ecx, ApIndexLocation
148 add edi, StackSizeLocation
152 mul ecx ; EAX = StackSize * (CpuNumber + 1)
154 add edi, StackStartAddressLocation
163 jb NoX2Apic ; CPUID level below CPUID_EXTENDED_TOPOLOGY
169 jz NoX2Apic ; CPUID.0BH:EBX[15:0] is zero
171 ; Processor is x2APIC capable; 32-bit x2APIC ID is already in EDX
172 jmp GetProcessorNumber
175 ; Processor is not x2APIC capable, so get 8-bit APIC ID
183 ; Get processor number for this AP
184 ; Note that BSP may become an AP due to SwitchBsp()
187 lea eax, [esi + CpuInfoLocation]
191 cmp [edi], edx ; APIC ID match?
195 jmp GetNextProcNumber
201 push ebp ; push BIST data at top of AP stack
202 xor ebp, ebp ; clear ebp for call stack trace
206 mov eax, ASM_PFX(InitializeFloatingPointUnits)
207 call eax ; Call assembly function to initialize FPU per UEFI spec
209 push ebx ; Push ApIndex
211 add eax, LockLocation
212 push eax ; push address of exchange info data buffer
215 add edi, ApProcedureLocation
218 call eax ; Invoke C function
220 jmp $ ; Never reach here
221 RendezvousFunnelProcEnd:
223 ;-------------------------------------------------------------------------------------
224 ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish);
225 ;-------------------------------------------------------------------------------------
226 global ASM_PFX(AsmRelocateApLoop)
227 ASM_PFX(AsmRelocateApLoop):
228 AsmRelocateApLoopStart:
230 mov esp, [eax + 16] ; TopOfApStack
231 push dword [eax] ; push return address for stack trace
234 mov ebx, [eax + 8] ; ApTargetCState
235 mov ecx, [eax + 4] ; MwaitSupport
236 mov eax, [eax + 20] ; CountTofinish
237 lock dec dword [eax] ; (*CountTofinish)--
238 cmp cl, 1 ; Check mwait-monitor support
245 mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4]
253 AsmRelocateApLoopEnd:
255 ;-------------------------------------------------------------------------------------
256 ; AsmGetAddressMap (&AddressMap);
257 ;-------------------------------------------------------------------------------------
258 global ASM_PFX(AsmGetAddressMap)
259 ASM_PFX(AsmGetAddressMap):
264 mov dword [ebx], RendezvousFunnelProcStart
265 mov dword [ebx + 4h], Flat32Start - RendezvousFunnelProcStart
266 mov dword [ebx + 8h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
267 mov dword [ebx + 0Ch], AsmRelocateApLoopStart
268 mov dword [ebx + 10h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
273 ;-------------------------------------------------------------------------------------
274 ;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
275 ;about to become an AP. It switches it'stack with the current AP.
276 ;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
277 ;-------------------------------------------------------------------------------------
278 global ASM_PFX(AsmExchangeRole)
279 ASM_PFX(AsmExchangeRole):
280 ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
281 ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
285 ; esi contains MyInfo pointer
288 ; edi contains OthersInfo pointer
291 ;Store EFLAGS, GDTR and IDTR register to stack
294 push eax ; push cr4 firstly
301 ; Store the its StackPointer
304 ; update its switch state to STORED
305 mov byte [esi], CPU_SWITCH_STATE_STORED
308 ; wait until the other CPU finish storing its state
309 cmp byte [edi], CPU_SWITCH_STATE_STORED
312 jmp WaitForOtherStored
315 ; Since another CPU already stored its state, load them
322 ; load its future StackPointer
325 ; update the other CPU's switch state to LOADED
326 mov byte [edi], CPU_SWITCH_STATE_LOADED
329 ; wait until the other CPU finish loading new state,
330 ; otherwise the data in stack may corrupt
331 cmp byte [esi], CPU_SWITCH_STATE_LOADED
334 jmp WaitForOtherLoaded
337 ; since the other CPU already get the data it want, leave this procedure