1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
3 ; SPDX-License-Identifier: BSD-2-Clause-Patent
11 ; This is the assembly code for MP support
13 ;-------------------------------------------------------------------------------
16 extern ASM_PFX(InitializeFloatingPointUnits)
20 ;-------------------------------------------------------------------------------------
21 ;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
22 ;procedure serializes all the AP processors through an Init sequence. It must be
23 ;noted that APs arrive here very raw...ie: real mode, no stack.
24 ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
26 ;-------------------------------------------------------------------------------------
27 global ASM_PFX(RendezvousFunnelProc)
28 ASM_PFX(RendezvousFunnelProc):
29 RendezvousFunnelProcStart:
30 ; At this point CS = 0x(vv00) and ip= 0x0.
32 mov ebp, eax ; save BIST information
42 mov si, BufferStartLocation
45 mov si, DataSegmentLocation
49 ; Get start address of 32-bit code in low memory (<1MB)
51 mov edi, ModeTransitionMemoryLocation
60 ; Switch to protected mode
62 mov eax, cr0 ; Get control register 0
63 or eax, 000000003h ; Set PE bit (bit #0) & MP
66 ; Switch to 32-bit code in executable memory (>1MB)
70 ; Following code may be copied to memory with type of EfiBootServicesCode.
71 ; This is required at DXE phase if NX is enabled for EfiBootServicesCode of
75 Flat32Start: ; protected mode entry point
85 add edi, EnableExecuteDisableLocation
87 jz SkipEnableExecuteDisable
90 ; Enable IA32 PAE execute disable
111 SkipEnableExecuteDisable:
113 add edi, InitFlagLocation
114 cmp dword [edi], 1 ; 1 == ApInitConfig
117 ; Increment the number of APs executing here as early as possible
118 ; This is decremented in C code when AP is finished executing
120 add edi, NumApsExecutingLocation
125 add edi, LockLocation
126 mov eax, NotVacantFlag
129 add edi, ApIndexLocation
131 lock xadd dword [edi], ebx ; EBX = ApIndex++
132 inc ebx ; EBX is CpuNumber
135 add edi, StackSizeLocation
139 mul ecx ; EAX = StackSize * (CpuNumber + 1)
141 add edi, StackStartAddressLocation
150 jb NoX2Apic ; CPUID level below CPUID_EXTENDED_TOPOLOGY
156 jz NoX2Apic ; CPUID.0BH:EBX[15:0] is zero
158 ; Processor is x2APIC capable; 32-bit x2APIC ID is already in EDX
159 jmp GetProcessorNumber
162 ; Processor is not x2APIC capable, so get 8-bit APIC ID
170 ; Get processor number for this AP
171 ; Note that BSP may become an AP due to SwitchBsp()
174 lea eax, [esi + CpuInfoLocation]
178 cmp [edi], edx ; APIC ID match?
182 jmp GetNextProcNumber
188 push ebp ; push BIST data at top of AP stack
189 xor ebp, ebp ; clear ebp for call stack trace
193 mov eax, ASM_PFX(InitializeFloatingPointUnits)
194 call eax ; Call assembly function to initialize FPU per UEFI spec
196 push ebx ; Push ApIndex
198 add eax, LockLocation
199 push eax ; push address of exchange info data buffer
202 add edi, ApProcedureLocation
205 call eax ; Invoke C function
207 jmp $ ; Never reach here
208 RendezvousFunnelProcEnd:
210 ;-------------------------------------------------------------------------------------
211 ;SwitchToRealProc procedure follows.
212 ;NOT USED IN 32 BIT MODE.
213 ;-------------------------------------------------------------------------------------
214 global ASM_PFX(SwitchToRealProc)
215 ASM_PFX(SwitchToRealProc):
216 SwitchToRealProcStart:
217 jmp $ ; Never reach here
220 ;-------------------------------------------------------------------------------------
221 ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
223 ; The last three parameters (Pm16CodeSegment, SevEsAPJumpTable and WakeupBuffer) are
224 ; specific to SEV-ES support and are not applicable on IA32.
225 ;-------------------------------------------------------------------------------------
226 global ASM_PFX(AsmRelocateApLoop)
227 ASM_PFX(AsmRelocateApLoop):
228 AsmRelocateApLoopStart:
230 mov esp, [eax + 16] ; TopOfApStack
231 push dword [eax] ; push return address for stack trace
234 mov ebx, [eax + 8] ; ApTargetCState
235 mov ecx, [eax + 4] ; MwaitSupport
236 mov eax, [eax + 20] ; CountTofinish
237 lock dec dword [eax] ; (*CountTofinish)--
238 cmp cl, 1 ; Check mwait-monitor support
246 mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4]
254 AsmRelocateApLoopEnd:
256 ;-------------------------------------------------------------------------------------
257 ; AsmGetAddressMap (&AddressMap);
258 ;-------------------------------------------------------------------------------------
259 global ASM_PFX(AsmGetAddressMap)
260 ASM_PFX(AsmGetAddressMap):
265 mov dword [ebx], RendezvousFunnelProcStart
266 mov dword [ebx + 4h], Flat32Start - RendezvousFunnelProcStart
267 mov dword [ebx + 8h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
268 mov dword [ebx + 0Ch], AsmRelocateApLoopStart
269 mov dword [ebx + 10h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
270 mov dword [ebx + 14h], Flat32Start - RendezvousFunnelProcStart
271 mov dword [ebx + 18h], SwitchToRealProcEnd - SwitchToRealProcStart ; SwitchToRealSize
272 mov dword [ebx + 1Ch], SwitchToRealProcStart - RendezvousFunnelProcStart ; SwitchToRealOffset
273 mov dword [ebx + 20h], SwitchToRealProcStart - Flat32Start ; SwitchToRealNoNxOffset
274 mov dword [ebx + 24h], 0 ; SwitchToRealPM16ModeOffset
275 mov dword [ebx + 28h], 0 ; SwitchToRealPM16ModeSize
280 ;-------------------------------------------------------------------------------------
281 ;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
282 ;about to become an AP. It switches it'stack with the current AP.
283 ;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
284 ;-------------------------------------------------------------------------------------
285 global ASM_PFX(AsmExchangeRole)
286 ASM_PFX(AsmExchangeRole):
287 ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
288 ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
292 ; esi contains MyInfo pointer
295 ; edi contains OthersInfo pointer
298 ;Store EFLAGS, GDTR and IDTR register to stack
301 push eax ; push cr4 firstly
308 ; Store the its StackPointer
311 ; update its switch state to STORED
312 mov byte [esi], CPU_SWITCH_STATE_STORED
315 ; wait until the other CPU finish storing its state
316 cmp byte [edi], CPU_SWITCH_STATE_STORED
319 jmp WaitForOtherStored
322 ; Since another CPU already stored its state, load them
329 ; load its future StackPointer
332 ; update the other CPU's switch state to LOADED
333 mov byte [edi], CPU_SWITCH_STATE_LOADED
336 ; wait until the other CPU finish loading new state,
337 ; otherwise the data in stack may corrupt
338 cmp byte [esi], CPU_SWITCH_STATE_LOADED
341 jmp WaitForOtherLoaded
344 ; since the other CPU already get the data it want, leave this procedure