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UefiCpuPkg/MpInitLib: Add MicrocodeDetect() and load microcode on BSP
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1 /** @file
2 Implementation of loading microcode on processors.
3
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "MpLib.h"
16
17 /**
18 Get microcode update signature of currently loaded microcode update.
19
20 @return Microcode signature.
21 **/
22 UINT32
23 GetCurrentMicrocodeSignature (
24 VOID
25 )
26 {
27 MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;
28
29 AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
30 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
31 BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);
32 return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;
33 }
34
35 /**
36 Detect whether specified processor can find matching microcode patch and load it.
37
38 @param[in] PeiCpuMpData Pointer to PEI CPU MP Data
39 **/
40 VOID
41 MicrocodeDetect (
42 IN CPU_MP_DATA *CpuMpData
43 )
44 {
45 UINT64 MicrocodePatchAddress;
46 UINT64 MicrocodePatchRegionSize;
47 UINT32 ExtendedTableLength;
48 UINT32 ExtendedTableCount;
49 CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
50 CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
51 CPU_MICROCODE_HEADER *MicrocodeEntryPoint;
52 UINTN MicrocodeEnd;
53 UINTN Index;
54 UINT8 PlatformId;
55 CPUID_VERSION_INFO_EAX Eax;
56 UINT32 CurrentRevision;
57 UINT32 LatestRevision;
58 UINTN TotalSize;
59 UINT32 CheckSum32;
60 BOOLEAN CorrectMicrocode;
61 VOID *MicrocodeData;
62 MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
63
64 MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
65 MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
66 if (MicrocodePatchRegionSize == 0) {
67 //
68 // There is no microcode patches
69 //
70 return;
71 }
72
73 CurrentRevision = GetCurrentMicrocodeSignature ();
74 if (CurrentRevision != 0) {
75 //
76 // Skip loading microcode if it has been loaded successfully
77 //
78 return;
79 }
80
81 ExtendedTableLength = 0;
82 //
83 // Here data of CPUID leafs have not been collected into context buffer, so
84 // GetProcessorCpuid() cannot be used here to retrieve sCPUID data.
85 //
86 AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);
87
88 //
89 // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID
90 //
91 PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
92 PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;
93
94 LatestRevision = 0;
95 MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);
96 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;
97 do {
98 //
99 // Check if the microcode is for the Cpu and the version is newer
100 // and the update can be processed on the platform
101 //
102 CorrectMicrocode = FALSE;
103 if (MicrocodeEntryPoint->HeaderVersion == 0x1) {
104 //
105 // It is the microcode header. It is not the padding data between microcode patches
106 // because the padding data should not include 0x00000001 and it should be the repeated
107 // byte format (like 0xXYXYXYXY....).
108 //
109 if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&
110 MicrocodeEntryPoint->UpdateRevision > LatestRevision &&
111 (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))
112 ) {
113 if (MicrocodeEntryPoint->DataSize == 0) {
114 CheckSum32 = CalculateSum32 ((UINT32 *) MicrocodeEntryPoint, 2048);
115 } else {
116 CheckSum32 = CalculateSum32 (
117 (UINT32 *) MicrocodeEntryPoint,
118 MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER)
119 );
120 }
121 if (CheckSum32 == 0) {
122 CorrectMicrocode = TRUE;
123 }
124 } else if ((MicrocodeEntryPoint->DataSize != 0) &&
125 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
126 ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +
127 sizeof (CPU_MICROCODE_HEADER));
128 if (ExtendedTableLength != 0) {
129 //
130 // Extended Table exist, check if the CPU in support list
131 //
132 ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)
133 + MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));
134 //
135 // Calculate Extended Checksum
136 //
137 if ((ExtendedTableLength % 4) == 0) {
138 CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);
139 if (CheckSum32 == 0) {
140 //
141 // Checksum correct
142 //
143 ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
144 ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
145 for (Index = 0; Index < ExtendedTableCount; Index ++) {
146 CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTable, sizeof(CPU_MICROCODE_EXTENDED_TABLE));
147 if (CheckSum32 == 0) {
148 //
149 // Verify Header
150 //
151 if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&
152 (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {
153 //
154 // Find one
155 //
156 CorrectMicrocode = TRUE;
157 break;
158 }
159 }
160 ExtendedTable ++;
161 }
162 }
163 }
164 }
165 }
166 } else {
167 //
168 // It is the padding data between the microcode patches for microcode patches alignment.
169 // Because the microcode patch is the multiple of 1-KByte, the padding data should not
170 // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode
171 // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to
172 // find the next possible microcode patch header.
173 //
174 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
175 continue;
176 }
177 //
178 // Get the next patch.
179 //
180 if (MicrocodeEntryPoint->DataSize == 0) {
181 TotalSize = 2048;
182 } else {
183 TotalSize = MicrocodeEntryPoint->TotalSize;
184 }
185
186 if (CorrectMicrocode) {
187 LatestRevision = MicrocodeEntryPoint->UpdateRevision;
188 MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));
189 }
190
191 MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);
192 } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
193
194 if (LatestRevision > CurrentRevision) {
195 //
196 // BIOS only authenticate updates that contain a numerically larger revision
197 // than the currently loaded revision, where Current Signature < New Update
198 // Revision. A processor with no loaded update is considered to have a
199 // revision equal to zero.
200 //
201 AsmWriteMsr64 (
202 MSR_IA32_BIOS_UPDT_TRIG,
203 (UINT64) (UINTN) MicrocodeData
204 );
205 //
206 // Get and check new microcode signature
207 //
208 CurrentRevision = GetCurrentMicrocodeSignature ();
209 if (CurrentRevision != LatestRevision) {
210 AcquireSpinLock(&CpuMpData->MpLock);
211 DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \
212 loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));
213 ReleaseSpinLock(&CpuMpData->MpLock);
214 }
215 }
216 }