4 Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/MtrrLib.h>
18 #include <Library/BaseLib.h>
19 #include <Library/CpuLib.h>
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
24 // Context to save and restore when MTRRs are programmed
28 BOOLEAN InterruptState
;
32 // This table defines the offset, base and length of the fixed MTRRs
34 CONST FIXED_MTRR mMtrrLibFixedMtrrTable
[] = {
36 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
41 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
46 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
51 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
56 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
61 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
66 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
71 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
76 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
81 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
86 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
93 // Lookup table used to print MTRRs
95 GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8
*mMtrrMemoryCacheTypeShortName
[] = {
96 "UC", // CacheUncacheable
97 "WC", // CacheWriteCombining
100 "WT", // CacheWriteThrough
101 "WP", // CacheWriteProtected
102 "WB", // CacheWriteBack
107 Worker function returns the variable MTRR count for the CPU.
109 @return Variable MTRR count
113 GetVariableMtrrCountWorker (
117 UINT32 VariableMtrrCount
;
119 VariableMtrrCount
= (UINT32
)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP
) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK
);
120 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
121 return VariableMtrrCount
;
125 Returns the variable MTRR count for the CPU.
127 @return Variable MTRR count
132 GetVariableMtrrCount (
136 if (!IsMtrrSupported ()) {
139 return GetVariableMtrrCountWorker ();
143 Worker function returns the firmware usable variable MTRR count for the CPU.
145 @return Firmware usable variable MTRR count
149 GetFirmwareVariableMtrrCountWorker (
153 UINT32 VariableMtrrCount
;
154 UINT32 ReservedMtrrNumber
;
156 VariableMtrrCount
= GetVariableMtrrCountWorker ();
157 ReservedMtrrNumber
= PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs
);
158 if (VariableMtrrCount
< ReservedMtrrNumber
) {
162 return VariableMtrrCount
- ReservedMtrrNumber
;
166 Returns the firmware usable variable MTRR count for the CPU.
168 @return Firmware usable variable MTRR count
173 GetFirmwareVariableMtrrCount (
177 if (!IsMtrrSupported ()) {
180 return GetFirmwareVariableMtrrCountWorker ();
184 Worker function returns the default MTRR cache type for the system.
186 @return The default MTRR cache type.
189 MTRR_MEMORY_CACHE_TYPE
190 MtrrGetDefaultMemoryTypeWorker (
194 return (MTRR_MEMORY_CACHE_TYPE
) (AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
) & 0x7);
199 Returns the default MTRR cache type for the system.
201 @return The default MTRR cache type.
204 MTRR_MEMORY_CACHE_TYPE
206 MtrrGetDefaultMemoryType (
210 if (!IsMtrrSupported ()) {
211 return CacheUncacheable
;
213 return MtrrGetDefaultMemoryTypeWorker ();
217 Preparation before programming MTRR.
219 This function will do some preparation for programming MTRRs:
220 disable cache, invalid cache and disable MTRR caching functionality
222 @param[out] MtrrContext Pointer to context to save
227 OUT MTRR_CONTEXT
*MtrrContext
231 // Disable interrupts and save current interrupt state
233 MtrrContext
->InterruptState
= SaveAndDisableInterrupts();
236 // Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
241 // Save original CR4 value and clear PGE flag (Bit 7)
243 MtrrContext
->Cr4
= AsmReadCr4 ();
244 AsmWriteCr4 (MtrrContext
->Cr4
& (~BIT7
));
254 AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, 10, 11, 0);
258 Cleaning up after programming MTRRs.
260 This function will do some clean up after programming MTRRs:
261 Flush all TLBs, re-enable caching, restore CR4.
263 @param[in] MtrrContext Pointer to context to restore
267 PostMtrrChangeEnableCache (
268 IN MTRR_CONTEXT
*MtrrContext
277 // Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
282 // Restore original CR4 value
284 AsmWriteCr4 (MtrrContext
->Cr4
);
287 // Restore original interrupt state
289 SetInterruptState (MtrrContext
->InterruptState
);
293 Cleaning up after programming MTRRs.
295 This function will do some clean up after programming MTRRs:
296 enable MTRR caching functionality, and enable cache
298 @param[in] MtrrContext Pointer to context to restore
303 IN MTRR_CONTEXT
*MtrrContext
309 AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, 10, 11, 3);
311 PostMtrrChangeEnableCache (MtrrContext
);
315 Worker function gets the content in fixed MTRRs
317 @param[out] FixedSettings A buffer to hold fixed MTRRs content.
319 @retval The pointer of FixedSettings
323 MtrrGetFixedMtrrWorker (
324 OUT MTRR_FIXED_SETTINGS
*FixedSettings
329 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
330 FixedSettings
->Mtrr
[Index
] =
331 AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
334 return FixedSettings
;
339 This function gets the content in fixed MTRRs
341 @param[out] FixedSettings A buffer to hold fixed MTRRs content.
343 @retval The pointer of FixedSettings
349 OUT MTRR_FIXED_SETTINGS
*FixedSettings
352 if (!IsMtrrSupported ()) {
353 return FixedSettings
;
356 return MtrrGetFixedMtrrWorker (FixedSettings
);
361 Worker function will get the raw value in variable MTRRs
363 @param[out] VariableSettings A buffer to hold variable MTRRs content.
365 @return The VariableSettings input pointer
368 MTRR_VARIABLE_SETTINGS
*
369 MtrrGetVariableMtrrWorker (
370 IN UINT32 VariableMtrrCount
,
371 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
376 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
378 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
379 VariableSettings
->Mtrr
[Index
].Base
=
380 AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1));
381 VariableSettings
->Mtrr
[Index
].Mask
=
382 AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1) + 1);
385 return VariableSettings
;
389 This function will get the raw value in variable MTRRs
391 @param[out] VariableSettings A buffer to hold variable MTRRs content.
393 @return The VariableSettings input pointer
396 MTRR_VARIABLE_SETTINGS
*
398 MtrrGetVariableMtrr (
399 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
402 if (!IsMtrrSupported ()) {
403 return VariableSettings
;
406 return MtrrGetVariableMtrrWorker (
407 GetVariableMtrrCountWorker (),
413 Programs fixed MTRRs registers.
415 @param[in] MemoryCacheType The memory type to set.
416 @param[in, out] Base The base address of memory range.
417 @param[in, out] Length The length of memory range.
419 @retval RETURN_SUCCESS The cache type was updated successfully
420 @retval RETURN_UNSUPPORTED The requested range or cache type was invalid
426 IN UINT64 MemoryCacheType
,
428 IN OUT UINT64
*Length
441 for (MsrNum
= 0; MsrNum
< MTRR_NUMBER_OF_FIXED_MTRR
; MsrNum
++) {
442 if ((*Base
>= mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
) &&
445 mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
+
446 (8 * mMtrrLibFixedMtrrTable
[MsrNum
].Length
)
454 if (MsrNum
== MTRR_NUMBER_OF_FIXED_MTRR
) {
455 return RETURN_UNSUPPORTED
;
459 // We found the fixed MTRR to be programmed
461 for (ByteShift
= 0; ByteShift
< 8; ByteShift
++) {
464 mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
+
465 (ByteShift
* mMtrrLibFixedMtrrTable
[MsrNum
].Length
)
472 if (ByteShift
== 8) {
473 return RETURN_UNSUPPORTED
;
478 ((ByteShift
< 8) && (*Length
>= mMtrrLibFixedMtrrTable
[MsrNum
].Length
));
481 OrMask
|= LShiftU64 ((UINT64
) MemoryCacheType
, (UINT32
) (ByteShift
* 8));
482 ClearMask
|= LShiftU64 ((UINT64
) 0xFF, (UINT32
) (ByteShift
* 8));
483 *Length
-= mMtrrLibFixedMtrrTable
[MsrNum
].Length
;
484 *Base
+= mMtrrLibFixedMtrrTable
[MsrNum
].Length
;
487 if (ByteShift
< 8 && (*Length
!= 0)) {
488 return RETURN_UNSUPPORTED
;
492 (AsmReadMsr64 (mMtrrLibFixedMtrrTable
[MsrNum
].Msr
) & ~ClearMask
) | OrMask
;
493 AsmWriteMsr64 (mMtrrLibFixedMtrrTable
[MsrNum
].Msr
, TempQword
);
494 return RETURN_SUCCESS
;
499 Gets the attribute of variable MTRRs.
501 This function shadows the content of variable MTRRs into an
502 internal array: VariableMtrr.
504 @param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR
505 @param[in] MtrrValidAddressMask The valid address mask for MTRR
506 @param[out] VariableMtrr The array to shadow variable MTRRs content
508 @return The return value of this paramter indicates the
509 number of MTRRs which has been used.
514 MtrrGetMemoryAttributeInVariableMtrr (
515 IN UINT64 MtrrValidBitsMask
,
516 IN UINT64 MtrrValidAddressMask
,
517 OUT VARIABLE_MTRR
*VariableMtrr
523 UINT32 FirmwareVariableMtrrCount
;
524 UINT32 VariableMtrrEnd
;
526 if (!IsMtrrSupported ()) {
530 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCountWorker ();
531 VariableMtrrEnd
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (2 * GetVariableMtrrCount ()) - 1;
533 ZeroMem (VariableMtrr
, sizeof (VARIABLE_MTRR
) * MTRR_NUMBER_OF_VARIABLE_MTRR
);
536 for (MsrNum
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
, Index
= 0;
538 (MsrNum
< VariableMtrrEnd
) &&
539 (Index
< FirmwareVariableMtrrCount
)
543 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) != 0) {
544 VariableMtrr
[Index
].Msr
= MsrNum
;
545 VariableMtrr
[Index
].BaseAddress
= (AsmReadMsr64 (MsrNum
) &
546 MtrrValidAddressMask
);
547 VariableMtrr
[Index
].Length
= ((~(AsmReadMsr64 (MsrNum
+ 1) &
548 MtrrValidAddressMask
)
552 VariableMtrr
[Index
].Type
= (AsmReadMsr64 (MsrNum
) & 0x0ff);
553 VariableMtrr
[Index
].Valid
= TRUE
;
554 VariableMtrr
[Index
].Used
= TRUE
;
555 UsedMtrr
= UsedMtrr
+ 1;
564 Checks overlap between given memory range and MTRRs.
566 @param[in] FirmwareVariableMtrrCount The number of variable MTRRs available
568 @param[in] Start The start address of memory range.
569 @param[in] End The end address of memory range.
570 @param[in] VariableMtrr The array to shadow variable MTRRs content
572 @retval TRUE Overlap exists.
573 @retval FALSE No overlap.
577 CheckMemoryAttributeOverlap (
578 IN UINTN FirmwareVariableMtrrCount
,
579 IN PHYSICAL_ADDRESS Start
,
580 IN PHYSICAL_ADDRESS End
,
581 IN VARIABLE_MTRR
*VariableMtrr
586 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
588 VariableMtrr
[Index
].Valid
&&
590 (Start
> (VariableMtrr
[Index
].BaseAddress
+
591 VariableMtrr
[Index
].Length
- 1)
593 (End
< VariableMtrr
[Index
].BaseAddress
)
605 Marks a variable MTRR as non-valid.
607 @param[in] Index The index of the array VariableMtrr to be invalidated
608 @param[in] VariableMtrr The array to shadow variable MTRRs content
609 @param[out] UsedMtrr The number of MTRRs which has already been used
613 InvalidateShadowMtrr (
615 IN VARIABLE_MTRR
*VariableMtrr
,
619 VariableMtrr
[Index
].Valid
= FALSE
;
620 *UsedMtrr
= *UsedMtrr
- 1;
625 Combines memory attributes.
627 If overlap exists between given memory range and MTRRs, try to combine them.
629 @param[in] FirmwareVariableMtrrCount The number of variable MTRRs
630 available to firmware.
631 @param[in] Attributes The memory type to set.
632 @param[in, out] Base The base address of memory range.
633 @param[in, out] Length The length of memory range.
634 @param[in] VariableMtrr The array to shadow variable MTRRs content
635 @param[in, out] UsedMtrr The number of MTRRs which has already been used
636 @param[out] OverwriteExistingMtrr Returns whether an existing MTRR was used
638 @retval EFI_SUCCESS Memory region successfully combined.
639 @retval EFI_ACCESS_DENIED Memory region cannot be combined.
643 CombineMemoryAttribute (
644 IN UINT32 FirmwareVariableMtrrCount
,
645 IN UINT64 Attributes
,
647 IN OUT UINT64
*Length
,
648 IN VARIABLE_MTRR
*VariableMtrr
,
649 IN OUT UINT32
*UsedMtrr
,
650 OUT BOOLEAN
*OverwriteExistingMtrr
658 BOOLEAN CoveredByExistingMtrr
;
660 *OverwriteExistingMtrr
= FALSE
;
661 CoveredByExistingMtrr
= FALSE
;
662 EndAddress
= *Base
+*Length
- 1;
664 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
666 MtrrEnd
= VariableMtrr
[Index
].BaseAddress
+ VariableMtrr
[Index
].Length
- 1;
668 !VariableMtrr
[Index
].Valid
||
671 (EndAddress
< VariableMtrr
[Index
].BaseAddress
)
678 // Combine same attribute MTRR range
680 if (Attributes
== VariableMtrr
[Index
].Type
) {
682 // if the MTRR range contain the request range, set a flag, then continue to
683 // invalidate any MTRR of the same request range with higher priority cache type.
685 if (VariableMtrr
[Index
].BaseAddress
<= *Base
&& MtrrEnd
>= EndAddress
) {
686 CoveredByExistingMtrr
= TRUE
;
690 // invalid this MTRR, and program the combine range
693 (*Base
) < VariableMtrr
[Index
].BaseAddress
?
695 VariableMtrr
[Index
].BaseAddress
;
696 CombineEnd
= EndAddress
> MtrrEnd
? EndAddress
: MtrrEnd
;
699 // Record the MTRR usage status in VariableMtrr array.
701 InvalidateShadowMtrr (Index
, VariableMtrr
, UsedMtrr
);
702 *Base
= CombineStart
;
703 *Length
= CombineEnd
- CombineStart
+ 1;
704 EndAddress
= CombineEnd
;
705 *OverwriteExistingMtrr
= TRUE
;
709 // The cache type is different, but the range is convered by one MTRR
711 if (VariableMtrr
[Index
].BaseAddress
== *Base
&& MtrrEnd
== EndAddress
) {
712 InvalidateShadowMtrr (Index
, VariableMtrr
, UsedMtrr
);
718 if ((Attributes
== MTRR_CACHE_WRITE_THROUGH
&&
719 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) ||
720 (Attributes
== MTRR_CACHE_WRITE_BACK
&&
721 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_THROUGH
) ||
722 (Attributes
== MTRR_CACHE_UNCACHEABLE
) ||
723 (VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
)
725 *OverwriteExistingMtrr
= TRUE
;
729 // Other type memory overlap is invalid
731 return RETURN_ACCESS_DENIED
;
734 if (CoveredByExistingMtrr
) {
738 return RETURN_SUCCESS
;
743 Calculates the maximum value which is a power of 2, but less the MemoryLength.
745 @param[in] MemoryLength The number to pass in.
747 @return The maximum value which is align to power of 2 and less the MemoryLength
752 IN UINT64 MemoryLength
757 if (RShiftU64 (MemoryLength
, 32) != 0) {
759 (UINT64
) GetPowerOfTwo32 (
760 (UINT32
) RShiftU64 (MemoryLength
, 32)
765 Result
= (UINT64
) GetPowerOfTwo32 ((UINT32
) MemoryLength
);
773 Determines the MTRR numbers used to program a memory range.
775 This function first checks the alignment of the base address.
776 If the alignment of the base address <= Length, cover the memory range
777 (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and
778 Length -= alignment. Repeat the step until alignment > Length.
780 Then this function determines which direction of programming the variable
781 MTRRs for the remaining length will use fewer MTRRs.
783 @param[in] BaseAddress Length of Memory to program MTRR
784 @param[in] Length Length of Memory to program MTRR
785 @param[in] MtrrNumber Pointer to the number of necessary MTRRs
787 @retval TRUE Positive direction is better.
788 FALSE Negative direction is better.
792 GetMtrrNumberAndDirection (
793 IN UINT64 BaseAddress
,
805 if (BaseAddress
!= 0) {
808 // Calculate the alignment of the base address.
810 Alignment
= LShiftU64 (1, (UINTN
)LowBitSet64 (BaseAddress
));
812 if (Alignment
> Length
) {
817 BaseAddress
+= Alignment
;
831 TempQword
-= Power2MaxMemory (TempQword
);
833 } while (TempQword
!= 0);
835 TempQword
= Power2MaxMemory (LShiftU64 (Length
, 1)) - Length
;
838 TempQword
-= Power2MaxMemory (TempQword
);
840 } while (TempQword
!= 0);
842 if (Positive
<= Subtractive
) {
843 *MtrrNumber
+= Positive
;
846 *MtrrNumber
+= Subtractive
;
852 Invalid variable MTRRs according to the value in the shadow array.
854 This function programs MTRRs according to the values specified
857 @param[in] VariableMtrrCount Number of variable MTRRs
858 @param[in, out] VariableMtrr Shadow of variable MTRR contents
863 IN UINTN VariableMtrrCount
,
864 IN OUT VARIABLE_MTRR
*VariableMtrr
868 MTRR_CONTEXT MtrrContext
;
870 PreMtrrChange (&MtrrContext
);
872 while (Index
< VariableMtrrCount
) {
873 if (!VariableMtrr
[Index
].Valid
&& VariableMtrr
[Index
].Used
) {
874 AsmWriteMsr64 (VariableMtrr
[Index
].Msr
, 0);
875 AsmWriteMsr64 (VariableMtrr
[Index
].Msr
+ 1, 0);
876 VariableMtrr
[Index
].Used
= FALSE
;
880 PostMtrrChange (&MtrrContext
);
885 Programs variable MTRRs
887 This function programs variable MTRRs
889 @param[in] MtrrNumber Index of MTRR to program.
890 @param[in] BaseAddress Base address of memory region.
891 @param[in] Length Length of memory region.
892 @param[in] MemoryCacheType Memory type to set.
893 @param[in] MtrrValidAddressMask The valid address mask for MTRR
897 ProgramVariableMtrr (
899 IN PHYSICAL_ADDRESS BaseAddress
,
901 IN UINT64 MemoryCacheType
,
902 IN UINT64 MtrrValidAddressMask
906 MTRR_CONTEXT MtrrContext
;
908 PreMtrrChange (&MtrrContext
);
911 // MTRR Physical Base
913 TempQword
= (BaseAddress
& MtrrValidAddressMask
) | MemoryCacheType
;
914 AsmWriteMsr64 ((UINT32
) MtrrNumber
, TempQword
);
917 // MTRR Physical Mask
919 TempQword
= ~(Length
- 1);
921 (UINT32
) (MtrrNumber
+ 1),
922 (TempQword
& MtrrValidAddressMask
) | MTRR_LIB_CACHE_MTRR_ENABLED
925 PostMtrrChange (&MtrrContext
);
930 Converts the Memory attribute value to MTRR_MEMORY_CACHE_TYPE.
932 @param[in] MtrrType MTRR memory type
934 @return The enum item in MTRR_MEMORY_CACHE_TYPE
937 MTRR_MEMORY_CACHE_TYPE
938 GetMemoryCacheTypeFromMtrrType (
943 case MTRR_CACHE_UNCACHEABLE
:
944 return CacheUncacheable
;
945 case MTRR_CACHE_WRITE_COMBINING
:
946 return CacheWriteCombining
;
947 case MTRR_CACHE_WRITE_THROUGH
:
948 return CacheWriteThrough
;
949 case MTRR_CACHE_WRITE_PROTECTED
:
950 return CacheWriteProtected
;
951 case MTRR_CACHE_WRITE_BACK
:
952 return CacheWriteBack
;
955 // MtrrType is MTRR_CACHE_INVALID_TYPE, that means
956 // no MTRR covers the range
958 return MtrrGetDefaultMemoryType ();
963 Initializes the valid bits mask and valid address mask for MTRRs.
965 This function initializes the valid bits mask and valid address mask for MTRRs.
967 @param[out] MtrrValidBitsMask The mask for the valid bit of the MTRR
968 @param[out] MtrrValidAddressMask The valid address mask for the MTRR
972 MtrrLibInitializeMtrrMask (
973 OUT UINT64
*MtrrValidBitsMask
,
974 OUT UINT64
*MtrrValidAddressMask
978 UINT8 PhysicalAddressBits
;
980 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
982 if (RegEax
>= 0x80000008) {
983 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
985 PhysicalAddressBits
= (UINT8
) RegEax
;
987 *MtrrValidBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
988 *MtrrValidAddressMask
= *MtrrValidBitsMask
& 0xfffffffffffff000ULL
;
990 *MtrrValidBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
991 *MtrrValidAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
997 Determines the real attribute of a memory range.
999 This function is to arbitrate the real attribute of the memory when
1000 there are 2 MTRRs covers the same memory range. For further details,
1001 please refer the IA32 Software Developer's Manual, Volume 3,
1004 @param[in] MtrrType1 The first kind of Memory type
1005 @param[in] MtrrType2 The second kind of memory type
1010 IN UINT64 MtrrType1
,
1016 MtrrType
= MTRR_CACHE_INVALID_TYPE
;
1017 switch (MtrrType1
) {
1018 case MTRR_CACHE_UNCACHEABLE
:
1019 MtrrType
= MTRR_CACHE_UNCACHEABLE
;
1021 case MTRR_CACHE_WRITE_COMBINING
:
1023 MtrrType2
==MTRR_CACHE_WRITE_COMBINING
||
1024 MtrrType2
==MTRR_CACHE_UNCACHEABLE
1026 MtrrType
= MtrrType2
;
1029 case MTRR_CACHE_WRITE_THROUGH
:
1031 MtrrType2
==MTRR_CACHE_WRITE_THROUGH
||
1032 MtrrType2
==MTRR_CACHE_WRITE_BACK
1034 MtrrType
= MTRR_CACHE_WRITE_THROUGH
;
1035 } else if(MtrrType2
==MTRR_CACHE_UNCACHEABLE
) {
1036 MtrrType
= MTRR_CACHE_UNCACHEABLE
;
1039 case MTRR_CACHE_WRITE_PROTECTED
:
1040 if (MtrrType2
== MTRR_CACHE_WRITE_PROTECTED
||
1041 MtrrType2
== MTRR_CACHE_UNCACHEABLE
) {
1042 MtrrType
= MtrrType2
;
1045 case MTRR_CACHE_WRITE_BACK
:
1047 MtrrType2
== MTRR_CACHE_UNCACHEABLE
||
1048 MtrrType2
==MTRR_CACHE_WRITE_THROUGH
||
1049 MtrrType2
== MTRR_CACHE_WRITE_BACK
1051 MtrrType
= MtrrType2
;
1054 case MTRR_CACHE_INVALID_TYPE
:
1055 MtrrType
= MtrrType2
;
1061 if (MtrrType2
== MTRR_CACHE_INVALID_TYPE
) {
1062 MtrrType
= MtrrType1
;
1070 This function will get the memory cache type of the specific address.
1072 This function is mainly for debug purpose.
1074 @param[in] Address The specific address
1076 @return Memory cache type of the specific address
1079 MTRR_MEMORY_CACHE_TYPE
1081 MtrrGetMemoryAttribute (
1082 IN PHYSICAL_ADDRESS Address
1089 UINT64 TempMtrrType
;
1090 MTRR_MEMORY_CACHE_TYPE CacheType
;
1091 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
1092 UINT64 MtrrValidBitsMask
;
1093 UINT64 MtrrValidAddressMask
;
1094 UINTN VariableMtrrCount
;
1096 if (!IsMtrrSupported ()) {
1097 return CacheUncacheable
;
1101 // Check if MTRR is enabled, if not, return UC as attribute
1103 TempQword
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
);
1104 MtrrType
= MTRR_CACHE_INVALID_TYPE
;
1106 if ((TempQword
& MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1107 return CacheUncacheable
;
1111 // If address is less than 1M, then try to go through the fixed MTRR
1113 if (Address
< BASE_1MB
) {
1114 if ((TempQword
& MTRR_LIB_CACHE_FIXED_MTRR_ENABLED
) != 0) {
1116 // Go through the fixed MTRR
1118 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1119 if (Address
>= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
&&
1121 mMtrrLibFixedMtrrTable
[Index
].BaseAddress
+
1122 (mMtrrLibFixedMtrrTable
[Index
].Length
* 8)
1126 ((UINTN
)Address
- mMtrrLibFixedMtrrTable
[Index
].BaseAddress
) /
1127 mMtrrLibFixedMtrrTable
[Index
].Length
;
1128 TempQword
= AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
1129 MtrrType
= RShiftU64 (TempQword
, SubIndex
* 8) & 0xFF;
1130 return GetMemoryCacheTypeFromMtrrType (MtrrType
);
1135 MtrrLibInitializeMtrrMask(&MtrrValidBitsMask
, &MtrrValidAddressMask
);
1136 MtrrGetMemoryAttributeInVariableMtrr(
1138 MtrrValidAddressMask
,
1143 // Go through the variable MTRR
1145 VariableMtrrCount
= GetVariableMtrrCountWorker ();
1146 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1148 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1149 if (VariableMtrr
[Index
].Valid
) {
1150 if (Address
>= VariableMtrr
[Index
].BaseAddress
&&
1151 Address
< VariableMtrr
[Index
].BaseAddress
+VariableMtrr
[Index
].Length
) {
1152 TempMtrrType
= VariableMtrr
[Index
].Type
;
1153 MtrrType
= MtrrPrecedence (MtrrType
, TempMtrrType
);
1157 CacheType
= GetMemoryCacheTypeFromMtrrType (MtrrType
);
1165 This function prints all MTRRs for debugging.
1169 MtrrDebugPrintAllMtrrs (
1174 MTRR_SETTINGS MtrrSettings
;
1177 UINTN VariableMtrrCount
;
1185 UINT64 NoRangeLimit
;
1188 UINTN PreviousMemoryType
;
1191 if (!IsMtrrSupported ()) {
1195 DEBUG((DEBUG_CACHE
, "MTRR Settings\n"));
1196 DEBUG((DEBUG_CACHE
, "=============\n"));
1198 MtrrGetAllMtrrs (&MtrrSettings
);
1199 DEBUG((DEBUG_CACHE
, "MTRR Default Type: %016lx\n", MtrrSettings
.MtrrDefType
));
1200 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1201 DEBUG((DEBUG_CACHE
, "Fixed MTRR[%02d] : %016lx\n", Index
, MtrrSettings
.Fixed
.Mtrr
[Index
]));
1204 VariableMtrrCount
= GetVariableMtrrCount ();
1205 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1206 DEBUG((DEBUG_CACHE
, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
1208 MtrrSettings
.Variables
.Mtrr
[Index
].Base
,
1209 MtrrSettings
.Variables
.Mtrr
[Index
].Mask
1212 DEBUG((DEBUG_CACHE
, "\n"));
1213 DEBUG((DEBUG_CACHE
, "MTRR Ranges\n"));
1214 DEBUG((DEBUG_CACHE
, "====================================\n"));
1217 PreviousMemoryType
= MTRR_CACHE_INVALID_TYPE
;
1218 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1219 Base
= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
;
1220 for (Index1
= 0; Index1
< 8; Index1
++) {
1221 MemoryType
= (UINTN
)(RShiftU64 (MtrrSettings
.Fixed
.Mtrr
[Index
], Index1
* 8) & 0xff);
1222 if (MemoryType
> CacheWriteBack
) {
1223 MemoryType
= MTRR_CACHE_INVALID_TYPE
;
1225 if (MemoryType
!= PreviousMemoryType
) {
1226 if (PreviousMemoryType
!= MTRR_CACHE_INVALID_TYPE
) {
1227 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1229 PreviousMemoryType
= MemoryType
;
1230 DEBUG((DEBUG_CACHE
, "%a:%016lx-", mMtrrMemoryCacheTypeShortName
[MemoryType
], Base
));
1232 Base
+= mMtrrLibFixedMtrrTable
[Index
].Length
;
1235 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1237 VariableMtrrCount
= GetVariableMtrrCount ();
1240 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
1241 if (RegEax
>= 0x80000008) {
1242 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
1243 Limit
= LShiftU64 (1, RegEax
& 0xff) - 1;
1246 PreviousMemoryType
= MTRR_CACHE_INVALID_TYPE
;
1248 MemoryType
= MtrrGetMemoryAttribute (Base
);
1249 if (MemoryType
> CacheWriteBack
) {
1250 MemoryType
= MTRR_CACHE_INVALID_TYPE
;
1253 if (MemoryType
!= PreviousMemoryType
) {
1254 if (PreviousMemoryType
!= MTRR_CACHE_INVALID_TYPE
) {
1255 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1257 PreviousMemoryType
= MemoryType
;
1258 DEBUG((DEBUG_CACHE
, "%a:%016lx-", mMtrrMemoryCacheTypeShortName
[MemoryType
], Base
));
1261 RangeBase
= BASE_1MB
;
1262 NoRangeBase
= BASE_1MB
;
1264 NoRangeLimit
= Limit
;
1266 for (Index
= 0, Found
= FALSE
; Index
< VariableMtrrCount
; Index
++) {
1267 if ((MtrrSettings
.Variables
.Mtrr
[Index
].Mask
& BIT11
) == 0) {
1269 // If mask is not valid, then do not display range
1273 MtrrBase
= (MtrrSettings
.Variables
.Mtrr
[Index
].Base
& (~(SIZE_4KB
- 1)));
1274 MtrrLimit
= MtrrBase
+ ((~(MtrrSettings
.Variables
.Mtrr
[Index
].Mask
& (~(SIZE_4KB
- 1)))) & Limit
);
1276 if (Base
>= MtrrBase
&& Base
< MtrrLimit
) {
1280 if (Base
>= MtrrBase
&& MtrrBase
> RangeBase
) {
1281 RangeBase
= MtrrBase
;
1283 if (Base
> MtrrLimit
&& MtrrLimit
> RangeBase
) {
1284 RangeBase
= MtrrLimit
+ 1;
1286 if (Base
< MtrrBase
&& MtrrBase
< RangeLimit
) {
1287 RangeLimit
= MtrrBase
- 1;
1289 if (Base
< MtrrLimit
&& MtrrLimit
<= RangeLimit
) {
1290 RangeLimit
= MtrrLimit
;
1293 if (Base
> MtrrLimit
&& NoRangeBase
< MtrrLimit
) {
1294 NoRangeBase
= MtrrLimit
+ 1;
1296 if (Base
< MtrrBase
&& NoRangeLimit
> MtrrBase
) {
1297 NoRangeLimit
= MtrrBase
- 1;
1302 Base
= RangeLimit
+ 1;
1304 Base
= NoRangeLimit
+ 1;
1306 } while (Base
< Limit
);
1307 DEBUG((DEBUG_CACHE
, "%016lx\n\n", Base
- 1));
1311 This function attempts to set the attributes for a memory range.
1313 @param[in] BaseAddress The physical address that is the start
1314 address of a memory region.
1315 @param[in] Length The size in bytes of the memory region.
1316 @param[in] Attribute The bit mask of attributes to set for the
1319 @retval RETURN_SUCCESS The attributes were set for the memory
1321 @retval RETURN_INVALID_PARAMETER Length is zero.
1322 @retval RETURN_UNSUPPORTED The processor does not support one or
1323 more bytes of the memory resource range
1324 specified by BaseAddress and Length.
1325 @retval RETURN_UNSUPPORTED The bit mask of attributes is not support
1326 for the memory resource range specified
1327 by BaseAddress and Length.
1328 @retval RETURN_ACCESS_DENIED The attributes for the memory resource
1329 range specified by BaseAddress and Length
1331 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to
1332 modify the attributes of the memory
1338 MtrrSetMemoryAttribute (
1339 IN PHYSICAL_ADDRESS BaseAddress
,
1341 IN MTRR_MEMORY_CACHE_TYPE Attribute
1345 RETURN_STATUS Status
;
1352 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
1354 UINT64 MtrrValidBitsMask
;
1355 UINT64 MtrrValidAddressMask
;
1356 BOOLEAN OverwriteExistingMtrr
;
1357 UINT32 FirmwareVariableMtrrCount
;
1358 UINT32 VariableMtrrEnd
;
1359 MTRR_CONTEXT MtrrContext
;
1360 UINT32 VariableMtrrCount
;
1362 DEBUG((DEBUG_CACHE
, "MtrrSetMemoryAttribute() %a:%016lx-%016lx\n", mMtrrMemoryCacheTypeShortName
[Attribute
], BaseAddress
, Length
));
1364 if (!IsMtrrSupported ()) {
1365 Status
= RETURN_UNSUPPORTED
;
1369 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCountWorker ();
1370 VariableMtrrEnd
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (2 * GetVariableMtrrCount ()) - 1;
1372 MtrrLibInitializeMtrrMask(&MtrrValidBitsMask
, &MtrrValidAddressMask
);
1375 MemoryType
= (UINT64
)Attribute
;
1376 OverwriteExistingMtrr
= FALSE
;
1379 // Check for an invalid parameter
1382 Status
= RETURN_INVALID_PARAMETER
;
1387 (BaseAddress
& ~MtrrValidAddressMask
) != 0 ||
1388 (Length
& ~MtrrValidAddressMask
) != 0
1390 Status
= RETURN_UNSUPPORTED
;
1395 // Check if Fixed MTRR
1397 Status
= RETURN_SUCCESS
;
1398 while ((BaseAddress
< BASE_1MB
) && (Length
> 0) && Status
== RETURN_SUCCESS
) {
1399 PreMtrrChange (&MtrrContext
);
1400 Status
= ProgramFixedMtrr (MemoryType
, &BaseAddress
, &Length
);
1401 PostMtrrChange (&MtrrContext
);
1402 if (RETURN_ERROR (Status
)) {
1409 // A Length of 0 can only make sense for fixed MTTR ranges.
1410 // Since we just handled the fixed MTRRs, we can skip the
1411 // variable MTRR section.
1417 // Since memory ranges below 1MB will be overridden by the fixed MTRRs,
1418 // we can set the base to 0 to save variable MTRRs.
1420 if (BaseAddress
== BASE_1MB
) {
1426 // Read all variable MTRRs
1428 VariableMtrrCount
= GetVariableMtrrCountWorker ();
1431 // Check for overlap
1433 UsedMtrr
= MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask
, MtrrValidAddressMask
, VariableMtrr
);
1434 OverLap
= CheckMemoryAttributeOverlap (
1435 FirmwareVariableMtrrCount
,
1437 BaseAddress
+ Length
- 1,
1442 Status
= CombineMemoryAttribute (
1443 FirmwareVariableMtrrCount
,
1449 &OverwriteExistingMtrr
1451 if (RETURN_ERROR (Status
)) {
1457 // Combined successfully, invalidate the now-unused MTRRs
1459 InvalidateMtrr(VariableMtrrCount
, VariableMtrr
);
1460 Status
= RETURN_SUCCESS
;
1466 // The memory type is the same with the type specified by
1467 // MTRR_LIB_IA32_MTRR_DEF_TYPE.
1469 if ((!OverwriteExistingMtrr
) && (Attribute
== MtrrGetDefaultMemoryType ())) {
1471 // Invalidate the now-unused MTRRs
1473 InvalidateMtrr(VariableMtrrCount
, VariableMtrr
);
1477 Positive
= GetMtrrNumberAndDirection (BaseAddress
, Length
, &MtrrNumber
);
1479 if ((UsedMtrr
+ MtrrNumber
) > FirmwareVariableMtrrCount
) {
1480 Status
= RETURN_OUT_OF_RESOURCES
;
1485 // Invalidate the now-unused MTRRs
1487 InvalidateMtrr(VariableMtrrCount
, VariableMtrr
);
1490 // Find first unused MTRR
1492 for (MsrNum
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
;
1493 MsrNum
< VariableMtrrEnd
;
1496 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1501 if (BaseAddress
!= 0) {
1504 // Calculate the alignment of the base address.
1506 Alignment
= LShiftU64 (1, (UINTN
)LowBitSet64 (BaseAddress
));
1508 if (Alignment
> Length
) {
1515 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1516 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1521 ProgramVariableMtrr (
1526 MtrrValidAddressMask
1528 BaseAddress
+= Alignment
;
1529 Length
-= Alignment
;
1540 Length
= Power2MaxMemory (LShiftU64 (TempQword
, 1));
1545 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1546 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1551 ProgramVariableMtrr (
1556 MtrrValidAddressMask
1558 BaseAddress
+= Length
;
1559 TempQword
= Length
- TempQword
;
1560 MemoryType
= MTRR_CACHE_UNCACHEABLE
;
1567 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1568 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1573 Length
= Power2MaxMemory (TempQword
);
1575 BaseAddress
-= Length
;
1578 ProgramVariableMtrr (
1583 MtrrValidAddressMask
1587 BaseAddress
+= Length
;
1589 TempQword
-= Length
;
1591 } while (TempQword
> 0);
1594 DEBUG((DEBUG_CACHE
, " Status = %r\n", Status
));
1595 if (!RETURN_ERROR (Status
)) {
1596 MtrrDebugPrintAllMtrrs ();
1602 Worker function setting variable MTRRs
1604 @param[in] VariableSettings A buffer to hold variable MTRRs content.
1608 MtrrSetVariableMtrrWorker (
1609 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
1613 UINT32 VariableMtrrCount
;
1615 VariableMtrrCount
= GetVariableMtrrCountWorker ();
1616 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1618 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1620 MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1),
1621 VariableSettings
->Mtrr
[Index
].Base
1624 MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1) + 1,
1625 VariableSettings
->Mtrr
[Index
].Mask
1632 This function sets variable MTRRs
1634 @param[in] VariableSettings A buffer to hold variable MTRRs content.
1636 @return The pointer of VariableSettings
1639 MTRR_VARIABLE_SETTINGS
*
1641 MtrrSetVariableMtrr (
1642 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
1645 MTRR_CONTEXT MtrrContext
;
1647 if (!IsMtrrSupported ()) {
1648 return VariableSettings
;
1651 PreMtrrChange (&MtrrContext
);
1652 MtrrSetVariableMtrrWorker (VariableSettings
);
1653 PostMtrrChange (&MtrrContext
);
1654 return VariableSettings
;
1658 Worker function setting fixed MTRRs
1660 @param[in] FixedSettings A buffer to hold fixed MTRRs content.
1664 MtrrSetFixedMtrrWorker (
1665 IN MTRR_FIXED_SETTINGS
*FixedSettings
1670 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1672 mMtrrLibFixedMtrrTable
[Index
].Msr
,
1673 FixedSettings
->Mtrr
[Index
]
1680 This function sets fixed MTRRs
1682 @param[in] FixedSettings A buffer to hold fixed MTRRs content.
1684 @retval The pointer of FixedSettings
1687 MTRR_FIXED_SETTINGS
*
1690 IN MTRR_FIXED_SETTINGS
*FixedSettings
1693 MTRR_CONTEXT MtrrContext
;
1695 if (!IsMtrrSupported ()) {
1696 return FixedSettings
;
1699 PreMtrrChange (&MtrrContext
);
1700 MtrrSetFixedMtrrWorker (FixedSettings
);
1701 PostMtrrChange (&MtrrContext
);
1703 return FixedSettings
;
1708 This function gets the content in all MTRRs (variable and fixed)
1710 @param[out] MtrrSetting A buffer to hold all MTRRs content.
1712 @retval the pointer of MtrrSetting
1718 OUT MTRR_SETTINGS
*MtrrSetting
1721 if (!IsMtrrSupported ()) {
1728 MtrrGetFixedMtrrWorker (&MtrrSetting
->Fixed
);
1731 // Get variable MTRRs
1733 MtrrGetVariableMtrrWorker (
1734 GetVariableMtrrCountWorker (),
1735 &MtrrSetting
->Variables
1739 // Get MTRR_DEF_TYPE value
1741 MtrrSetting
->MtrrDefType
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
);
1748 This function sets all MTRRs (variable and fixed)
1750 @param[in] MtrrSetting A buffer holding all MTRRs content.
1752 @retval The pointer of MtrrSetting
1758 IN MTRR_SETTINGS
*MtrrSetting
1761 MTRR_CONTEXT MtrrContext
;
1763 if (!IsMtrrSupported ()) {
1767 PreMtrrChange (&MtrrContext
);
1772 MtrrSetFixedMtrrWorker (&MtrrSetting
->Fixed
);
1775 // Set variable MTRRs
1777 MtrrSetVariableMtrrWorker (&MtrrSetting
->Variables
);
1780 // Set MTRR_DEF_TYPE value
1782 AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, MtrrSetting
->MtrrDefType
);
1784 PostMtrrChangeEnableCache (&MtrrContext
);
1790 Checks if MTRR is supported.
1792 @retval TRUE MTRR is supported.
1793 @retval FALSE MTRR is not supported.
1806 // Check CPUID(1).EDX[12] for MTRR capability
1808 AsmCpuid (1, NULL
, NULL
, NULL
, &RegEdx
);
1809 if (BitFieldRead32 (RegEdx
, 12, 12) == 0) {
1814 // Check IA32_MTRRCAP.[0..7] for number of variable MTRRs and IA32_MTRRCAP[8] for
1815 // fixed MTRRs existence. If number of variable MTRRs is zero, or fixed MTRRs do not
1816 // exist, return false.
1818 MtrrCap
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP
);
1819 if ((BitFieldRead64 (MtrrCap
, 0, 7) == 0) || (BitFieldRead64 (MtrrCap
, 8, 8) == 0)) {