4 Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/MtrrLib.h>
18 #include <Library/BaseLib.h>
19 #include <Library/CpuLib.h>
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
24 // Context to save and restore when MTRRs are programmed
28 BOOLEAN InterruptState
;
32 // This table defines the offset, base and length of the fixed MTRRs
34 CONST FIXED_MTRR mMtrrLibFixedMtrrTable
[] = {
36 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
41 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
46 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
51 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
56 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
61 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
66 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
71 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
76 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
81 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
86 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
93 // Lookup table used to print MTRRs
95 GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8
*mMtrrMemoryCacheTypeShortName
[] = {
96 "UC", // CacheUncacheable
97 "WC", // CacheWriteCombining
100 "WT", // CacheWriteThrough
101 "WP", // CacheWriteProtected
102 "WB", // CacheWriteBack
107 Returns the variable MTRR count for the CPU.
109 @return Variable MTRR count
114 GetVariableMtrrCount (
118 UINT32 VariableMtrrCount
;
120 if (!IsMtrrSupported ()) {
124 VariableMtrrCount
= (UINT32
)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP
) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK
);
125 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
127 return VariableMtrrCount
;
131 Returns the firmware usable variable MTRR count for the CPU.
133 @return Firmware usable variable MTRR count
138 GetFirmwareVariableMtrrCount (
142 UINT32 VariableMtrrCount
;
143 UINT32 ReservedMtrrNumber
;
145 VariableMtrrCount
= GetVariableMtrrCount ();
146 ReservedMtrrNumber
= PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs
);
147 if (VariableMtrrCount
< ReservedMtrrNumber
) {
151 return VariableMtrrCount
- ReservedMtrrNumber
;
155 Returns the default MTRR cache type for the system.
157 @return The default MTRR cache type.
160 MTRR_MEMORY_CACHE_TYPE
162 MtrrGetDefaultMemoryType (
166 if (!IsMtrrSupported ()) {
167 return CacheUncacheable
;
170 return (MTRR_MEMORY_CACHE_TYPE
) (AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
) & 0x7);
174 Preparation before programming MTRR.
176 This function will do some preparation for programming MTRRs:
177 disable cache, invalid cache and disable MTRR caching functionality
179 @param[out] MtrrContext Pointer to context to save
184 OUT MTRR_CONTEXT
*MtrrContext
188 // Disable interrupts and save current interrupt state
190 MtrrContext
->InterruptState
= SaveAndDisableInterrupts();
193 // Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
198 // Save original CR4 value and clear PGE flag (Bit 7)
200 MtrrContext
->Cr4
= AsmReadCr4 ();
201 AsmWriteCr4 (MtrrContext
->Cr4
& (~BIT7
));
211 AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, 10, 11, 0);
215 Cleaning up after programming MTRRs.
217 This function will do some clean up after programming MTRRs:
218 Flush all TLBs, re-enable caching, restore CR4.
220 @param[in] MtrrContext Pointer to context to restore
224 PostMtrrChangeEnableCache (
225 IN MTRR_CONTEXT
*MtrrContext
234 // Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
239 // Restore original CR4 value
241 AsmWriteCr4 (MtrrContext
->Cr4
);
244 // Restore original interrupt state
246 SetInterruptState (MtrrContext
->InterruptState
);
250 Cleaning up after programming MTRRs.
252 This function will do some clean up after programming MTRRs:
253 enable MTRR caching functionality, and enable cache
255 @param[in] MtrrContext Pointer to context to restore
260 IN MTRR_CONTEXT
*MtrrContext
266 AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, 10, 11, 3);
268 PostMtrrChangeEnableCache (MtrrContext
);
273 Programs fixed MTRRs registers.
275 @param MemoryCacheType The memory type to set.
276 @param Base The base address of memory range.
277 @param Length The length of memory range.
279 @retval RETURN_SUCCESS The cache type was updated successfully
280 @retval RETURN_UNSUPPORTED The requested range or cache type was invalid
286 IN UINT64 MemoryCacheType
,
288 IN OUT UINT64
*Length
301 for (MsrNum
= 0; MsrNum
< MTRR_NUMBER_OF_FIXED_MTRR
; MsrNum
++) {
302 if ((*Base
>= mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
) &&
305 mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
+
306 (8 * mMtrrLibFixedMtrrTable
[MsrNum
].Length
)
314 if (MsrNum
== MTRR_NUMBER_OF_FIXED_MTRR
) {
315 return RETURN_UNSUPPORTED
;
319 // We found the fixed MTRR to be programmed
321 for (ByteShift
= 0; ByteShift
< 8; ByteShift
++) {
324 mMtrrLibFixedMtrrTable
[MsrNum
].BaseAddress
+
325 (ByteShift
* mMtrrLibFixedMtrrTable
[MsrNum
].Length
)
332 if (ByteShift
== 8) {
333 return RETURN_UNSUPPORTED
;
338 ((ByteShift
< 8) && (*Length
>= mMtrrLibFixedMtrrTable
[MsrNum
].Length
));
341 OrMask
|= LShiftU64 ((UINT64
) MemoryCacheType
, (UINT32
) (ByteShift
* 8));
342 ClearMask
|= LShiftU64 ((UINT64
) 0xFF, (UINT32
) (ByteShift
* 8));
343 *Length
-= mMtrrLibFixedMtrrTable
[MsrNum
].Length
;
344 *Base
+= mMtrrLibFixedMtrrTable
[MsrNum
].Length
;
347 if (ByteShift
< 8 && (*Length
!= 0)) {
348 return RETURN_UNSUPPORTED
;
352 (AsmReadMsr64 (mMtrrLibFixedMtrrTable
[MsrNum
].Msr
) & ~ClearMask
) | OrMask
;
353 AsmWriteMsr64 (mMtrrLibFixedMtrrTable
[MsrNum
].Msr
, TempQword
);
354 return RETURN_SUCCESS
;
359 Get the attribute of variable MTRRs.
361 This function shadows the content of variable MTRRs into an
362 internal array: VariableMtrr.
364 @param MtrrValidBitsMask The mask for the valid bit of the MTRR
365 @param MtrrValidAddressMask The valid address mask for MTRR
366 @param VariableMtrr The array to shadow variable MTRRs content
368 @return The return value of this paramter indicates the
369 number of MTRRs which has been used.
374 MtrrGetMemoryAttributeInVariableMtrr (
375 IN UINT64 MtrrValidBitsMask
,
376 IN UINT64 MtrrValidAddressMask
,
377 OUT VARIABLE_MTRR
*VariableMtrr
383 UINT32 FirmwareVariableMtrrCount
;
384 UINT32 VariableMtrrEnd
;
386 if (!IsMtrrSupported ()) {
390 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
391 VariableMtrrEnd
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (2 * GetVariableMtrrCount ()) - 1;
393 ZeroMem (VariableMtrr
, sizeof (VARIABLE_MTRR
) * MTRR_NUMBER_OF_VARIABLE_MTRR
);
396 for (MsrNum
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
, Index
= 0;
398 (MsrNum
< VariableMtrrEnd
) &&
399 (Index
< FirmwareVariableMtrrCount
)
403 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) != 0) {
404 VariableMtrr
[Index
].Msr
= MsrNum
;
405 VariableMtrr
[Index
].BaseAddress
= (AsmReadMsr64 (MsrNum
) &
406 MtrrValidAddressMask
);
407 VariableMtrr
[Index
].Length
= ((~(AsmReadMsr64 (MsrNum
+ 1) &
408 MtrrValidAddressMask
)
412 VariableMtrr
[Index
].Type
= (AsmReadMsr64 (MsrNum
) & 0x0ff);
413 VariableMtrr
[Index
].Valid
= TRUE
;
414 VariableMtrr
[Index
].Used
= TRUE
;
415 UsedMtrr
= UsedMtrr
+ 1;
424 Checks overlap between given memory range and MTRRs.
426 @param Start The start address of memory range.
427 @param End The end address of memory range.
428 @param VariableMtrr The array to shadow variable MTRRs content
430 @retval TRUE Overlap exists.
431 @retval FALSE No overlap.
435 CheckMemoryAttributeOverlap (
436 IN PHYSICAL_ADDRESS Start
,
437 IN PHYSICAL_ADDRESS End
,
438 IN VARIABLE_MTRR
*VariableMtrr
443 for (Index
= 0; Index
< 6; Index
++) {
445 VariableMtrr
[Index
].Valid
&&
447 (Start
> (VariableMtrr
[Index
].BaseAddress
+
448 VariableMtrr
[Index
].Length
- 1)
450 (End
< VariableMtrr
[Index
].BaseAddress
)
462 Marks a variable MTRR as non-valid.
464 @param Index The index of the array VariableMtrr to be invalidated
465 @param VariableMtrr The array to shadow variable MTRRs content
466 @param UsedMtrr The number of MTRRs which has already been used
470 InvalidateShadowMtrr (
472 IN VARIABLE_MTRR
*VariableMtrr
,
476 VariableMtrr
[Index
].Valid
= FALSE
;
477 *UsedMtrr
= *UsedMtrr
- 1;
482 Combine memory attributes.
484 If overlap exists between given memory range and MTRRs, try to combine them.
486 @param Attributes The memory type to set.
487 @param Base The base address of memory range.
488 @param Length The length of memory range.
489 @param VariableMtrr The array to shadow variable MTRRs content
490 @param UsedMtrr The number of MTRRs which has already been used
491 @param OverwriteExistingMtrr Returns whether an existing MTRR was used
493 @retval EFI_SUCCESS Memory region successfully combined.
494 @retval EFI_ACCESS_DENIED Memory region cannot be combined.
498 CombineMemoryAttribute (
499 IN UINT64 Attributes
,
501 IN OUT UINT64
*Length
,
502 IN VARIABLE_MTRR
*VariableMtrr
,
503 IN OUT UINT32
*UsedMtrr
,
504 OUT BOOLEAN
*OverwriteExistingMtrr
512 UINT32 FirmwareVariableMtrrCount
;
513 BOOLEAN CoveredByExistingMtrr
;
515 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
517 *OverwriteExistingMtrr
= FALSE
;
518 CoveredByExistingMtrr
= FALSE
;
519 EndAddress
= *Base
+*Length
- 1;
521 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
523 MtrrEnd
= VariableMtrr
[Index
].BaseAddress
+ VariableMtrr
[Index
].Length
- 1;
525 !VariableMtrr
[Index
].Valid
||
528 (EndAddress
< VariableMtrr
[Index
].BaseAddress
)
535 // Combine same attribute MTRR range
537 if (Attributes
== VariableMtrr
[Index
].Type
) {
539 // if the Mtrr range contain the request range, set a flag, then continue to
540 // invalidate any MTRR of the same request range with higher priority cache type.
542 if (VariableMtrr
[Index
].BaseAddress
<= *Base
&& MtrrEnd
>= EndAddress
) {
543 CoveredByExistingMtrr
= TRUE
;
547 // invalid this MTRR, and program the combine range
550 (*Base
) < VariableMtrr
[Index
].BaseAddress
?
552 VariableMtrr
[Index
].BaseAddress
;
553 CombineEnd
= EndAddress
> MtrrEnd
? EndAddress
: MtrrEnd
;
556 // Record the MTRR usage status in VariableMtrr array.
558 InvalidateShadowMtrr (Index
, VariableMtrr
, UsedMtrr
);
559 *Base
= CombineStart
;
560 *Length
= CombineEnd
- CombineStart
+ 1;
561 EndAddress
= CombineEnd
;
562 *OverwriteExistingMtrr
= TRUE
;
566 // The cache type is different, but the range is convered by one MTRR
568 if (VariableMtrr
[Index
].BaseAddress
== *Base
&& MtrrEnd
== EndAddress
) {
569 InvalidateShadowMtrr (Index
, VariableMtrr
, UsedMtrr
);
575 if ((Attributes
== MTRR_CACHE_WRITE_THROUGH
&&
576 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) ||
577 (Attributes
== MTRR_CACHE_WRITE_BACK
&&
578 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_THROUGH
) ||
579 (Attributes
== MTRR_CACHE_UNCACHEABLE
) ||
580 (VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
)
582 *OverwriteExistingMtrr
= TRUE
;
586 // Other type memory overlap is invalid
588 return RETURN_ACCESS_DENIED
;
591 if (CoveredByExistingMtrr
) {
595 return RETURN_SUCCESS
;
600 Calculate the maximum value which is a power of 2, but less the MemoryLength.
602 @param MemoryLength The number to pass in.
603 @return The maximum value which is align to power of 2 and less the MemoryLength
608 IN UINT64 MemoryLength
613 if (RShiftU64 (MemoryLength
, 32) != 0) {
615 (UINT64
) GetPowerOfTwo32 (
616 (UINT32
) RShiftU64 (MemoryLength
, 32)
621 Result
= (UINT64
) GetPowerOfTwo32 ((UINT32
) MemoryLength
);
629 Determine the MTRR numbers used to program a memory range.
631 This function first checks the alignment of the base address. If the alignment of the base address <= Length,
632 cover the memory range (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and Length -= alignment.
633 Repeat the step until alignment > Length.
635 Then this function determines which direction of programming the variable MTRRs for the remaining length
636 will use fewer MTRRs.
638 @param BaseAddress Length of Memory to program MTRR
639 @param Length Length of Memory to program MTRR
640 @param MtrrNumber Pointer to the number of necessary MTRRs
642 @retval TRUE Positive direction is better.
643 FALSE Negtive direction is better.
647 GetMtrrNumberAndDirection (
648 IN UINT64 BaseAddress
,
660 if (BaseAddress
!= 0) {
663 // Calculate the alignment of the base address.
665 Alignment
= LShiftU64 (1, (UINTN
)LowBitSet64 (BaseAddress
));
667 if (Alignment
> Length
) {
672 BaseAddress
+= Alignment
;
686 TempQword
-= Power2MaxMemory (TempQword
);
688 } while (TempQword
!= 0);
690 TempQword
= Power2MaxMemory (LShiftU64 (Length
, 1)) - Length
;
693 TempQword
-= Power2MaxMemory (TempQword
);
695 } while (TempQword
!= 0);
697 if (Positive
<= Subtractive
) {
698 *MtrrNumber
+= Positive
;
701 *MtrrNumber
+= Subtractive
;
707 Invalid variable MTRRs according to the value in the shadow array.
709 This function programs MTRRs according to the values specified
712 @param VariableMtrr The array to shadow variable MTRRs content
717 IN VARIABLE_MTRR
*VariableMtrr
721 UINTN VariableMtrrCount
;
722 MTRR_CONTEXT MtrrContext
;
724 PreMtrrChange (&MtrrContext
);
726 VariableMtrrCount
= GetVariableMtrrCount ();
727 while (Index
< VariableMtrrCount
) {
728 if (!VariableMtrr
[Index
].Valid
&& VariableMtrr
[Index
].Used
) {
729 AsmWriteMsr64 (VariableMtrr
[Index
].Msr
, 0);
730 AsmWriteMsr64 (VariableMtrr
[Index
].Msr
+ 1, 0);
731 VariableMtrr
[Index
].Used
= FALSE
;
735 PostMtrrChange (&MtrrContext
);
740 Programs variable MTRRs
742 This function programs variable MTRRs
744 @param MtrrNumber Index of MTRR to program.
745 @param BaseAddress Base address of memory region.
746 @param Length Length of memory region.
747 @param MemoryCacheType Memory type to set.
748 @param MtrrValidAddressMask The valid address mask for MTRR
752 ProgramVariableMtrr (
754 IN PHYSICAL_ADDRESS BaseAddress
,
756 IN UINT64 MemoryCacheType
,
757 IN UINT64 MtrrValidAddressMask
761 MTRR_CONTEXT MtrrContext
;
763 PreMtrrChange (&MtrrContext
);
766 // MTRR Physical Base
768 TempQword
= (BaseAddress
& MtrrValidAddressMask
) | MemoryCacheType
;
769 AsmWriteMsr64 ((UINT32
) MtrrNumber
, TempQword
);
772 // MTRR Physical Mask
774 TempQword
= ~(Length
- 1);
776 (UINT32
) (MtrrNumber
+ 1),
777 (TempQword
& MtrrValidAddressMask
) | MTRR_LIB_CACHE_MTRR_ENABLED
780 PostMtrrChange (&MtrrContext
);
785 Convert the Memory attibute value to MTRR_MEMORY_CACHE_TYPE.
787 @param MtrrType MTRR memory type
789 @return The enum item in MTRR_MEMORY_CACHE_TYPE
792 MTRR_MEMORY_CACHE_TYPE
793 GetMemoryCacheTypeFromMtrrType (
798 case MTRR_CACHE_UNCACHEABLE
:
799 return CacheUncacheable
;
800 case MTRR_CACHE_WRITE_COMBINING
:
801 return CacheWriteCombining
;
802 case MTRR_CACHE_WRITE_THROUGH
:
803 return CacheWriteThrough
;
804 case MTRR_CACHE_WRITE_PROTECTED
:
805 return CacheWriteProtected
;
806 case MTRR_CACHE_WRITE_BACK
:
807 return CacheWriteBack
;
810 // MtrrType is MTRR_CACHE_INVALID_TYPE, that means
811 // no mtrr covers the range
813 return MtrrGetDefaultMemoryType ();
818 Initializes the valid bits mask and valid address mask for MTRRs.
820 This function initializes the valid bits mask and valid address mask for MTRRs.
822 @param MtrrValidBitsMask The mask for the valid bit of the MTRR
823 @param MtrrValidAddressMask The valid address mask for the MTRR
827 MtrrLibInitializeMtrrMask (
828 OUT UINT64
*MtrrValidBitsMask
,
829 OUT UINT64
*MtrrValidAddressMask
833 UINT8 PhysicalAddressBits
;
835 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
837 if (RegEax
>= 0x80000008) {
838 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
840 PhysicalAddressBits
= (UINT8
) RegEax
;
842 *MtrrValidBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
843 *MtrrValidAddressMask
= *MtrrValidBitsMask
& 0xfffffffffffff000ULL
;
845 *MtrrValidBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
846 *MtrrValidAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
852 Determing the real attribute of a memory range.
854 This function is to arbitrate the real attribute of the memory when
855 there are 2 MTRR covers the same memory range. For further details,
856 please refer the IA32 Software Developer's Manual, Volume 3,
859 @param MtrrType1 the first kind of Memory type
860 @param MtrrType2 the second kind of memory type
871 MtrrType
= MTRR_CACHE_INVALID_TYPE
;
873 case MTRR_CACHE_UNCACHEABLE
:
874 MtrrType
= MTRR_CACHE_UNCACHEABLE
;
876 case MTRR_CACHE_WRITE_COMBINING
:
878 MtrrType2
==MTRR_CACHE_WRITE_COMBINING
||
879 MtrrType2
==MTRR_CACHE_UNCACHEABLE
881 MtrrType
= MtrrType2
;
884 case MTRR_CACHE_WRITE_THROUGH
:
886 MtrrType2
==MTRR_CACHE_WRITE_THROUGH
||
887 MtrrType2
==MTRR_CACHE_WRITE_BACK
889 MtrrType
= MTRR_CACHE_WRITE_THROUGH
;
890 } else if(MtrrType2
==MTRR_CACHE_UNCACHEABLE
) {
891 MtrrType
= MTRR_CACHE_UNCACHEABLE
;
894 case MTRR_CACHE_WRITE_PROTECTED
:
895 if (MtrrType2
== MTRR_CACHE_WRITE_PROTECTED
||
896 MtrrType2
== MTRR_CACHE_UNCACHEABLE
) {
897 MtrrType
= MtrrType2
;
900 case MTRR_CACHE_WRITE_BACK
:
902 MtrrType2
== MTRR_CACHE_UNCACHEABLE
||
903 MtrrType2
==MTRR_CACHE_WRITE_THROUGH
||
904 MtrrType2
== MTRR_CACHE_WRITE_BACK
906 MtrrType
= MtrrType2
;
909 case MTRR_CACHE_INVALID_TYPE
:
910 MtrrType
= MtrrType2
;
916 if (MtrrType2
== MTRR_CACHE_INVALID_TYPE
) {
917 MtrrType
= MtrrType1
;
924 This function attempts to set the attributes for a memory range.
926 @param BaseAddress The physical address that is the start
927 address of a memory region.
928 @param Length The size in bytes of the memory region.
929 @param Attributes The bit mask of attributes to set for the
932 @retval RETURN_SUCCESS The attributes were set for the memory
934 @retval RETURN_INVALID_PARAMETER Length is zero.
935 @retval RETURN_UNSUPPORTED The processor does not support one or
936 more bytes of the memory resource range
937 specified by BaseAddress and Length.
938 @retval RETURN_UNSUPPORTED The bit mask of attributes is not support
939 for the memory resource range specified
940 by BaseAddress and Length.
941 @retval RETURN_ACCESS_DENIED The attributes for the memory resource
942 range specified by BaseAddress and Length
944 @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to
945 modify the attributes of the memory
951 MtrrSetMemoryAttribute (
952 IN PHYSICAL_ADDRESS BaseAddress
,
954 IN MTRR_MEMORY_CACHE_TYPE Attribute
958 RETURN_STATUS Status
;
965 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
967 UINT64 MtrrValidBitsMask
;
968 UINT64 MtrrValidAddressMask
;
969 BOOLEAN OverwriteExistingMtrr
;
970 UINT32 FirmwareVariableMtrrCount
;
971 UINT32 VariableMtrrEnd
;
972 MTRR_CONTEXT MtrrContext
;
974 DEBUG((DEBUG_CACHE
, "MtrrSetMemoryAttribute() %a:%016lx-%016lx\n", mMtrrMemoryCacheTypeShortName
[Attribute
], BaseAddress
, Length
));
976 if (!IsMtrrSupported ()) {
977 Status
= RETURN_UNSUPPORTED
;
981 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
982 VariableMtrrEnd
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (2 * GetVariableMtrrCount ()) - 1;
984 MtrrLibInitializeMtrrMask(&MtrrValidBitsMask
, &MtrrValidAddressMask
);
987 MemoryType
= (UINT64
)Attribute
;
988 OverwriteExistingMtrr
= FALSE
;
991 // Check for an invalid parameter
994 Status
= RETURN_INVALID_PARAMETER
;
999 (BaseAddress
& ~MtrrValidAddressMask
) != 0 ||
1000 (Length
& ~MtrrValidAddressMask
) != 0
1002 Status
= RETURN_UNSUPPORTED
;
1007 // Check if Fixed MTRR
1009 Status
= RETURN_SUCCESS
;
1010 while ((BaseAddress
< BASE_1MB
) && (Length
> 0) && Status
== RETURN_SUCCESS
) {
1011 PreMtrrChange (&MtrrContext
);
1012 Status
= ProgramFixedMtrr (MemoryType
, &BaseAddress
, &Length
);
1013 PostMtrrChange (&MtrrContext
);
1014 if (RETURN_ERROR (Status
)) {
1021 // A Length of 0 can only make sense for fixed MTTR ranges.
1022 // Since we just handled the fixed MTRRs, we can skip the
1023 // variable MTRR section.
1029 // Since memory ranges below 1MB will be overridden by the fixed MTRRs,
1030 // we can set the base to 0 to save variable MTRRs.
1032 if (BaseAddress
== BASE_1MB
) {
1038 // Check for overlap
1040 UsedMtrr
= MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask
, MtrrValidAddressMask
, VariableMtrr
);
1041 OverLap
= CheckMemoryAttributeOverlap (BaseAddress
, BaseAddress
+ Length
- 1, VariableMtrr
);
1043 Status
= CombineMemoryAttribute (MemoryType
, &BaseAddress
, &Length
, VariableMtrr
, &UsedMtrr
, &OverwriteExistingMtrr
);
1044 if (RETURN_ERROR (Status
)) {
1050 // Combined successfully, invalidate the now-unused MTRRs
1052 InvalidateMtrr(VariableMtrr
);
1053 Status
= RETURN_SUCCESS
;
1059 // The memory type is the same with the type specified by
1060 // MTRR_LIB_IA32_MTRR_DEF_TYPE.
1062 if ((!OverwriteExistingMtrr
) && (Attribute
== MtrrGetDefaultMemoryType ())) {
1064 // Invalidate the now-unused MTRRs
1066 InvalidateMtrr(VariableMtrr
);
1070 Positive
= GetMtrrNumberAndDirection (BaseAddress
, Length
, &MtrrNumber
);
1072 if ((UsedMtrr
+ MtrrNumber
) > FirmwareVariableMtrrCount
) {
1073 Status
= RETURN_OUT_OF_RESOURCES
;
1078 // Invalidate the now-unused MTRRs
1080 InvalidateMtrr(VariableMtrr
);
1083 // Find first unused MTRR
1085 for (MsrNum
= MTRR_LIB_IA32_VARIABLE_MTRR_BASE
;
1086 MsrNum
< VariableMtrrEnd
;
1089 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1094 if (BaseAddress
!= 0) {
1097 // Calculate the alignment of the base address.
1099 Alignment
= LShiftU64 (1, (UINTN
)LowBitSet64 (BaseAddress
));
1101 if (Alignment
> Length
) {
1108 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1109 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1114 ProgramVariableMtrr (
1119 MtrrValidAddressMask
1121 BaseAddress
+= Alignment
;
1122 Length
-= Alignment
;
1133 Length
= Power2MaxMemory (LShiftU64 (TempQword
, 1));
1138 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1139 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1144 ProgramVariableMtrr (
1149 MtrrValidAddressMask
1151 BaseAddress
+= Length
;
1152 TempQword
= Length
- TempQword
;
1153 MemoryType
= MTRR_CACHE_UNCACHEABLE
;
1160 for (; MsrNum
< VariableMtrrEnd
; MsrNum
+= 2) {
1161 if ((AsmReadMsr64 (MsrNum
+ 1) & MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1166 Length
= Power2MaxMemory (TempQword
);
1168 BaseAddress
-= Length
;
1171 ProgramVariableMtrr (
1176 MtrrValidAddressMask
1180 BaseAddress
+= Length
;
1182 TempQword
-= Length
;
1184 } while (TempQword
> 0);
1187 DEBUG((DEBUG_CACHE
, " Status = %r\n", Status
));
1188 if (!RETURN_ERROR (Status
)) {
1189 MtrrDebugPrintAllMtrrs ();
1197 This function will get the memory cache type of the specific address.
1199 This function is mainly for debug purpose.
1201 @param Address The specific address
1203 @return Memory cache type of the sepcific address
1206 MTRR_MEMORY_CACHE_TYPE
1208 MtrrGetMemoryAttribute (
1209 IN PHYSICAL_ADDRESS Address
1216 UINT64 TempMtrrType
;
1217 MTRR_MEMORY_CACHE_TYPE CacheType
;
1218 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
1219 UINT64 MtrrValidBitsMask
;
1220 UINT64 MtrrValidAddressMask
;
1221 UINTN VariableMtrrCount
;
1223 if (!IsMtrrSupported ()) {
1224 return CacheUncacheable
;
1228 // Check if MTRR is enabled, if not, return UC as attribute
1230 TempQword
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
);
1231 MtrrType
= MTRR_CACHE_INVALID_TYPE
;
1233 if ((TempQword
& MTRR_LIB_CACHE_MTRR_ENABLED
) == 0) {
1234 return CacheUncacheable
;
1238 // If address is less than 1M, then try to go through the fixed MTRR
1240 if (Address
< BASE_1MB
) {
1241 if ((TempQword
& MTRR_LIB_CACHE_FIXED_MTRR_ENABLED
) != 0) {
1243 // Go through the fixed MTRR
1245 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1246 if (Address
>= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
&&
1248 mMtrrLibFixedMtrrTable
[Index
].BaseAddress
+
1249 (mMtrrLibFixedMtrrTable
[Index
].Length
* 8)
1253 ((UINTN
)Address
- mMtrrLibFixedMtrrTable
[Index
].BaseAddress
) /
1254 mMtrrLibFixedMtrrTable
[Index
].Length
;
1255 TempQword
= AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
1256 MtrrType
= RShiftU64 (TempQword
, SubIndex
* 8) & 0xFF;
1257 return GetMemoryCacheTypeFromMtrrType (MtrrType
);
1262 MtrrLibInitializeMtrrMask(&MtrrValidBitsMask
, &MtrrValidAddressMask
);
1263 MtrrGetMemoryAttributeInVariableMtrr(
1265 MtrrValidAddressMask
,
1270 // Go through the variable MTRR
1272 VariableMtrrCount
= GetVariableMtrrCount ();
1273 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1275 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1276 if (VariableMtrr
[Index
].Valid
) {
1277 if (Address
>= VariableMtrr
[Index
].BaseAddress
&&
1278 Address
< VariableMtrr
[Index
].BaseAddress
+VariableMtrr
[Index
].Length
) {
1279 TempMtrrType
= VariableMtrr
[Index
].Type
;
1280 MtrrType
= MtrrPrecedence (MtrrType
, TempMtrrType
);
1284 CacheType
= GetMemoryCacheTypeFromMtrrType (MtrrType
);
1291 This function will get the raw value in variable MTRRs
1293 @param VariableSettings A buffer to hold variable MTRRs content.
1295 @return The VariableSettings input pointer
1298 MTRR_VARIABLE_SETTINGS
*
1300 MtrrGetVariableMtrr (
1301 OUT MTRR_VARIABLE_SETTINGS
*VariableSettings
1305 UINT32 VariableMtrrCount
;
1307 if (!IsMtrrSupported ()) {
1308 return VariableSettings
;
1311 VariableMtrrCount
= GetVariableMtrrCount ();
1312 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1314 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1315 VariableSettings
->Mtrr
[Index
].Base
=
1316 AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1));
1317 VariableSettings
->Mtrr
[Index
].Mask
=
1318 AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1) + 1);
1321 return VariableSettings
;
1326 Worker function setting variable MTRRs
1328 @param VariableSettings A buffer to hold variable MTRRs content.
1332 MtrrSetVariableMtrrWorker (
1333 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
1337 UINT32 VariableMtrrCount
;
1339 VariableMtrrCount
= GetVariableMtrrCount ();
1340 ASSERT (VariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
1342 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1344 MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1),
1345 VariableSettings
->Mtrr
[Index
].Base
1348 MTRR_LIB_IA32_VARIABLE_MTRR_BASE
+ (Index
<< 1) + 1,
1349 VariableSettings
->Mtrr
[Index
].Mask
1356 This function sets variable MTRRs
1358 @param VariableSettings A buffer to hold variable MTRRs content.
1360 @return The pointer of VariableSettings
1363 MTRR_VARIABLE_SETTINGS
*
1365 MtrrSetVariableMtrr (
1366 IN MTRR_VARIABLE_SETTINGS
*VariableSettings
1369 MTRR_CONTEXT MtrrContext
;
1371 if (!IsMtrrSupported ()) {
1372 return VariableSettings
;
1375 PreMtrrChange (&MtrrContext
);
1376 MtrrSetVariableMtrrWorker (VariableSettings
);
1377 PostMtrrChange (&MtrrContext
);
1378 return VariableSettings
;
1383 This function gets the content in fixed MTRRs
1385 @param FixedSettings A buffer to hold fixed Mtrrs content.
1387 @retval The pointer of FixedSettings
1390 MTRR_FIXED_SETTINGS
*
1393 OUT MTRR_FIXED_SETTINGS
*FixedSettings
1398 if (!IsMtrrSupported ()) {
1399 return FixedSettings
;
1402 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1403 FixedSettings
->Mtrr
[Index
] =
1404 AsmReadMsr64 (mMtrrLibFixedMtrrTable
[Index
].Msr
);
1407 return FixedSettings
;
1411 Worker function setting fixed MTRRs
1413 @param FixedSettings A buffer to hold fixed Mtrrs content.
1417 MtrrSetFixedMtrrWorker (
1418 IN MTRR_FIXED_SETTINGS
*FixedSettings
1423 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1425 mMtrrLibFixedMtrrTable
[Index
].Msr
,
1426 FixedSettings
->Mtrr
[Index
]
1433 This function sets fixed MTRRs
1435 @param FixedSettings A buffer to hold fixed Mtrrs content.
1437 @retval The pointer of FixedSettings
1440 MTRR_FIXED_SETTINGS
*
1443 IN MTRR_FIXED_SETTINGS
*FixedSettings
1446 MTRR_CONTEXT MtrrContext
;
1448 if (!IsMtrrSupported ()) {
1449 return FixedSettings
;
1452 PreMtrrChange (&MtrrContext
);
1453 MtrrSetFixedMtrrWorker (FixedSettings
);
1454 PostMtrrChange (&MtrrContext
);
1456 return FixedSettings
;
1461 This function gets the content in all MTRRs (variable and fixed)
1463 @param MtrrSetting A buffer to hold all Mtrrs content.
1465 @retval the pointer of MtrrSetting
1471 OUT MTRR_SETTINGS
*MtrrSetting
1474 if (!IsMtrrSupported ()) {
1481 MtrrGetFixedMtrr (&MtrrSetting
->Fixed
);
1484 // Get variable MTRRs
1486 MtrrGetVariableMtrr (&MtrrSetting
->Variables
);
1489 // Get MTRR_DEF_TYPE value
1491 MtrrSetting
->MtrrDefType
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
);
1498 This function sets all MTRRs (variable and fixed)
1500 @param MtrrSetting A buffer holding all MTRRs content.
1502 @retval The pointer of MtrrSetting
1508 IN MTRR_SETTINGS
*MtrrSetting
1511 MTRR_CONTEXT MtrrContext
;
1513 if (!IsMtrrSupported ()) {
1517 PreMtrrChange (&MtrrContext
);
1522 MtrrSetFixedMtrrWorker (&MtrrSetting
->Fixed
);
1525 // Set variable MTRRs
1527 MtrrSetVariableMtrrWorker (&MtrrSetting
->Variables
);
1530 // Set MTRR_DEF_TYPE value
1532 AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE
, MtrrSetting
->MtrrDefType
);
1534 PostMtrrChangeEnableCache (&MtrrContext
);
1540 This function prints all MTRRs for debugging.
1544 MtrrDebugPrintAllMtrrs (
1549 MTRR_SETTINGS MtrrSettings
;
1552 UINTN VariableMtrrCount
;
1560 UINT64 NoRangeLimit
;
1563 UINTN PreviousMemoryType
;
1566 if (!IsMtrrSupported ()) {
1570 DEBUG((DEBUG_CACHE
, "MTRR Settings\n"));
1571 DEBUG((DEBUG_CACHE
, "=============\n"));
1573 MtrrGetAllMtrrs (&MtrrSettings
);
1574 DEBUG((DEBUG_CACHE
, "MTRR Default Type: %016lx\n", MtrrSettings
.MtrrDefType
));
1575 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1576 DEBUG((DEBUG_CACHE
, "Fixed MTRR[%02d] : %016lx\n", Index
, MtrrSettings
.Fixed
.Mtrr
[Index
]));
1579 VariableMtrrCount
= GetVariableMtrrCount ();
1580 for (Index
= 0; Index
< VariableMtrrCount
; Index
++) {
1581 DEBUG((DEBUG_CACHE
, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
1583 MtrrSettings
.Variables
.Mtrr
[Index
].Base
,
1584 MtrrSettings
.Variables
.Mtrr
[Index
].Mask
1587 DEBUG((DEBUG_CACHE
, "\n"));
1588 DEBUG((DEBUG_CACHE
, "MTRR Ranges\n"));
1589 DEBUG((DEBUG_CACHE
, "====================================\n"));
1592 PreviousMemoryType
= MTRR_CACHE_INVALID_TYPE
;
1593 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
1594 Base
= mMtrrLibFixedMtrrTable
[Index
].BaseAddress
;
1595 for (Index1
= 0; Index1
< 8; Index1
++) {
1596 MemoryType
= (UINTN
)(RShiftU64 (MtrrSettings
.Fixed
.Mtrr
[Index
], Index1
* 8) & 0xff);
1597 if (MemoryType
> CacheWriteBack
) {
1598 MemoryType
= MTRR_CACHE_INVALID_TYPE
;
1600 if (MemoryType
!= PreviousMemoryType
) {
1601 if (PreviousMemoryType
!= MTRR_CACHE_INVALID_TYPE
) {
1602 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1604 PreviousMemoryType
= MemoryType
;
1605 DEBUG((DEBUG_CACHE
, "%a:%016lx-", mMtrrMemoryCacheTypeShortName
[MemoryType
], Base
));
1607 Base
+= mMtrrLibFixedMtrrTable
[Index
].Length
;
1610 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1612 VariableMtrrCount
= GetVariableMtrrCount ();
1615 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
1616 if (RegEax
>= 0x80000008) {
1617 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
1618 Limit
= LShiftU64 (1, RegEax
& 0xff) - 1;
1621 PreviousMemoryType
= MTRR_CACHE_INVALID_TYPE
;
1623 MemoryType
= MtrrGetMemoryAttribute (Base
);
1624 if (MemoryType
> CacheWriteBack
) {
1625 MemoryType
= MTRR_CACHE_INVALID_TYPE
;
1628 if (MemoryType
!= PreviousMemoryType
) {
1629 if (PreviousMemoryType
!= MTRR_CACHE_INVALID_TYPE
) {
1630 DEBUG((DEBUG_CACHE
, "%016lx\n", Base
- 1));
1632 PreviousMemoryType
= MemoryType
;
1633 DEBUG((DEBUG_CACHE
, "%a:%016lx-", mMtrrMemoryCacheTypeShortName
[MemoryType
], Base
));
1636 RangeBase
= BASE_1MB
;
1637 NoRangeBase
= BASE_1MB
;
1639 NoRangeLimit
= Limit
;
1641 for (Index
= 0, Found
= FALSE
; Index
< VariableMtrrCount
; Index
++) {
1642 if ((MtrrSettings
.Variables
.Mtrr
[Index
].Mask
& BIT11
) == 0) {
1644 // If mask is not valid, then do not display range
1648 MtrrBase
= (MtrrSettings
.Variables
.Mtrr
[Index
].Base
& (~(SIZE_4KB
- 1)));
1649 MtrrLimit
= MtrrBase
+ ((~(MtrrSettings
.Variables
.Mtrr
[Index
].Mask
& (~(SIZE_4KB
- 1)))) & Limit
);
1651 if (Base
>= MtrrBase
&& Base
< MtrrLimit
) {
1655 if (Base
>= MtrrBase
&& MtrrBase
> RangeBase
) {
1656 RangeBase
= MtrrBase
;
1658 if (Base
> MtrrLimit
&& MtrrLimit
> RangeBase
) {
1659 RangeBase
= MtrrLimit
+ 1;
1661 if (Base
< MtrrBase
&& MtrrBase
< RangeLimit
) {
1662 RangeLimit
= MtrrBase
- 1;
1664 if (Base
< MtrrLimit
&& MtrrLimit
<= RangeLimit
) {
1665 RangeLimit
= MtrrLimit
;
1668 if (Base
> MtrrLimit
&& NoRangeBase
< MtrrLimit
) {
1669 NoRangeBase
= MtrrLimit
+ 1;
1671 if (Base
< MtrrBase
&& NoRangeLimit
> MtrrBase
) {
1672 NoRangeLimit
= MtrrBase
- 1;
1677 Base
= RangeLimit
+ 1;
1679 Base
= NoRangeLimit
+ 1;
1681 } while (Base
< Limit
);
1682 DEBUG((DEBUG_CACHE
, "%016lx\n\n", Base
- 1));
1687 Checks if MTRR is supported.
1689 @retval TRUE MTRR is supported.
1690 @retval FALSE MTRR is not supported.
1703 // Check CPUID(1).EDX[12] for MTRR capability
1705 AsmCpuid (1, NULL
, NULL
, NULL
, &RegEdx
);
1706 if (BitFieldRead32 (RegEdx
, 12, 12) == 0) {
1711 // Check IA32_MTRRCAP.[0..7] for number of variable MTRRs and IA32_MTRRCAP[8] for
1712 // fixed MTRRs existence. If number of variable MTRRs is zero, or fixed MTRRs do not
1713 // exist, return false.
1715 MtrrCap
= AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP
);
1716 if ((BitFieldRead64 (MtrrCap
, 0, 7) == 0) || (BitFieldRead64 (MtrrCap
, 8, 8) == 0)) {