UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm

   1 ;------------------------------------------------------------------------------ ;
   2 ; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
   3 ; This program and the accompanying materials
   4 ; are licensed and made available under the terms and conditions of the BSD License
   5 ; which accompanies this distribution.  The full text of the license may be found at
   6 ; http://opensource.org/licenses/bsd-license.php.
   7 ;
   8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
   9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  10 ;
  11 ; Module Name:
  12 ;
  13 ;   SmmInit.nasm
  14 ;
  15 ; Abstract:
  16 ;
  17 ;   Functions for relocating SMBASE's for all processors
  18 ;
  19 ;-------------------------------------------------------------------------------
  20
  21 extern ASM_PFX(SmmInitHandler)
  22 extern ASM_PFX(mRebasedFlag)
  23 extern ASM_PFX(mSmmRelocationOriginalAddress)
  24
  25 global ASM_PFX(gSmmCr3)
  26 global ASM_PFX(gSmmCr4)
  27 global ASM_PFX(gSmmCr0)
  28 global ASM_PFX(gSmmJmpAddr)
  29 global ASM_PFX(gSmmInitStack)
  30 global ASM_PFX(gcSmiInitGdtr)
  31 global ASM_PFX(gcSmmInitSize)
  32 global ASM_PFX(gcSmmInitTemplate)
  33
  34 %define PROTECT_MODE_CS 0x8
  35 %define PROTECT_MODE_DS 0x20
  36
  37     SECTION .text
  38
  39 ASM_PFX(gcSmiInitGdtr):
  40             DW      0
  41             DQ      0
  42
  43 global ASM_PFX(SmmStartup)
  44 ASM_PFX(SmmStartup):
  45     DB      0x66
  46     mov     eax, 0x80000001             ; read capability
  47     cpuid
  48     DB      0x66
  49     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.
  50     DB      0x66, 0xb8                  ; mov eax, imm32
  51 ASM_PFX(gSmmCr3): DD 0
  52     mov     cr3, eax
  53     DB      0x67, 0x66
  54     lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
  55     DB      0x66, 0xb8                  ; mov eax, imm32
  56 ASM_PFX(gSmmCr4): DD 0
  57     mov     cr4, eax
  58     DB      0x66
  59     mov     ecx, 0xc0000080             ; IA32_EFER MSR
  60     rdmsr
  61     DB      0x66
  62     test    ebx, BIT20                  ; check NXE capability
  63     jz      .1
  64     or      ah, BIT3                    ; set NXE bit
  65     wrmsr
  66 .1:
  67     DB      0x66, 0xb8                  ; mov eax, imm32
  68 ASM_PFX(gSmmCr0): DD 0
  69     DB      0xbf, PROTECT_MODE_DS, 0    ; mov di, PROTECT_MODE_DS
  70     mov     cr0, eax
  71     DB      0x66, 0xea                  ; jmp far [ptr48]
  72 ASM_PFX(gSmmJmpAddr):
  73     DD      @32bit
  74     DW      PROTECT_MODE_CS
  75 @32bit:
  76     mov     ds, edi
  77     mov     es, edi
  78     mov     fs, edi
  79     mov     gs, edi
  80     mov     ss, edi
  81     DB      0xbc                        ; mov esp, imm32
  82 ASM_PFX(gSmmInitStack): DD 0
  83     call    ASM_PFX(SmmInitHandler)
  84     rsm
  85
  86 BITS 16
  87 ASM_PFX(gcSmmInitTemplate):
  88     mov ebp, ASM_PFX(SmmStartup)
  89     sub ebp, 0x30000
  90     jmp ebp
  91
  92 ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)
  93
  94 BITS 32
  95 global ASM_PFX(SmmRelocationSemaphoreComplete)
  96 ASM_PFX(SmmRelocationSemaphoreComplete):
  97     push    eax
  98     mov     eax, [ASM_PFX(mRebasedFlag)]
  99     mov     byte [eax], 1
 100     pop     eax
 101     jmp     [ASM_PFX(mSmmRelocationOriginalAddress)]
 102
 103 global ASM_PFX(PiSmmCpuSmmInitFixupAddress)
 104 ASM_PFX(PiSmmCpuSmmInitFixupAddress):
 105     ret