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1 /** @file
2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _CPU_PISMMCPUDXESMM_H_
18 #define _CPU_PISMMCPUDXESMM_H_
19
20 #include <PiSmm.h>
21
22 #include <Protocol/MpService.h>
23 #include <Protocol/SmmConfiguration.h>
24 #include <Protocol/SmmCpu.h>
25 #include <Protocol/SmmAccess2.h>
26 #include <Protocol/SmmReadyToLock.h>
27 #include <Protocol/SmmCpuService.h>
28 #include <Protocol/SmmMemoryAttribute.h>
29
30 #include <Guid/AcpiS3Context.h>
31 #include <Guid/MemoryAttributesTable.h>
32 #include <Guid/PiSmmMemoryAttributesTable.h>
33
34 #include <Library/BaseLib.h>
35 #include <Library/IoLib.h>
36 #include <Library/TimerLib.h>
37 #include <Library/SynchronizationLib.h>
38 #include <Library/DebugLib.h>
39 #include <Library/BaseMemoryLib.h>
40 #include <Library/PcdLib.h>
41 #include <Library/MtrrLib.h>
42 #include <Library/SmmCpuPlatformHookLib.h>
43 #include <Library/SmmServicesTableLib.h>
44 #include <Library/MemoryAllocationLib.h>
45 #include <Library/UefiBootServicesTableLib.h>
46 #include <Library/UefiRuntimeServicesTableLib.h>
47 #include <Library/DebugAgentLib.h>
48 #include <Library/UefiLib.h>
49 #include <Library/HobLib.h>
50 #include <Library/LocalApicLib.h>
51 #include <Library/UefiCpuLib.h>
52 #include <Library/CpuExceptionHandlerLib.h>
53 #include <Library/ReportStatusCodeLib.h>
54 #include <Library/SmmCpuFeaturesLib.h>
55 #include <Library/PeCoffGetEntryPointLib.h>
56 #include <Library/RegisterCpuFeaturesLib.h>
57
58 #include <AcpiCpuData.h>
59 #include <CpuHotPlugData.h>
60
61 #include <Register/Cpuid.h>
62 #include <Register/Msr.h>
63
64 #include "CpuService.h"
65 #include "SmmProfile.h"
66
67 //
68 // MSRs required for configuration of SMM Code Access Check
69 //
70 #define EFI_MSR_SMM_MCA_CAP 0x17D
71 #define SMM_CODE_ACCESS_CHK_BIT BIT58
72
73 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
74 #define SMM_CODE_CHK_EN_BIT BIT2
75
76 ///
77 /// Page Table Entry
78 ///
79 #define IA32_PG_P BIT0
80 #define IA32_PG_RW BIT1
81 #define IA32_PG_U BIT2
82 #define IA32_PG_WT BIT3
83 #define IA32_PG_CD BIT4
84 #define IA32_PG_A BIT5
85 #define IA32_PG_D BIT6
86 #define IA32_PG_PS BIT7
87 #define IA32_PG_PAT_2M BIT12
88 #define IA32_PG_PAT_4K IA32_PG_PS
89 #define IA32_PG_PMNT BIT62
90 #define IA32_PG_NX BIT63
91
92 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
93 //
94 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
95 // X64 PAE PDPTE does not have such restriction
96 //
97 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
98
99 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
100
101 #define PAGING_4K_MASK 0xFFF
102 #define PAGING_2M_MASK 0x1FFFFF
103 #define PAGING_1G_MASK 0x3FFFFFFF
104
105 #define PAGING_PAE_INDEX_MASK 0x1FF
106
107 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
108 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
109 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
110
111 #define SMRR_MAX_ADDRESS BASE_4GB
112
113 typedef enum {
114 PageNone,
115 Page4K,
116 Page2M,
117 Page1G,
118 } PAGE_ATTRIBUTE;
119
120 typedef struct {
121 PAGE_ATTRIBUTE Attribute;
122 UINT64 Length;
123 UINT64 AddressMask;
124 } PAGE_ATTRIBUTE_TABLE;
125
126 //
127 // Size of Task-State Segment defined in IA32 Manual
128 //
129 #define TSS_SIZE 104
130 #define TSS_X64_IST1_OFFSET 36
131 #define TSS_IA32_CR3_OFFSET 28
132 #define TSS_IA32_ESP_OFFSET 56
133
134 #define CR0_WP BIT16
135
136 //
137 // Code select value
138 //
139 #define PROTECT_MODE_CODE_SEGMENT 0x08
140 #define LONG_MODE_CODE_SEGMENT 0x38
141
142 //
143 // The size 0x20 must be bigger than
144 // the size of template code of SmmInit. Currently,
145 // the size of SmmInit requires the 0x16 Bytes buffer
146 // at least.
147 //
148 #define BACK_BUF_SIZE 0x20
149
150 #define EXCEPTION_VECTOR_NUMBER 0x20
151
152 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
153
154 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;
155 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
156 #define ARRIVAL_EXCEPTION_DELAYED 0x2
157 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
158
159 //
160 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
161 // Contains the SMM Configuration Protocols that is produced.
162 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
163 //
164 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
165
166 typedef struct {
167 UINTN Signature;
168
169 EFI_HANDLE SmmCpuHandle;
170
171 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
172 SMM_CPU_OPERATION *Operation;
173 UINTN *CpuSaveStateSize;
174 VOID **CpuSaveState;
175
176 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
177 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
178 EFI_SMM_ENTRY_POINT SmmCoreEntry;
179
180 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
181 } SMM_CPU_PRIVATE_DATA;
182
183 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
184 extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
185 extern UINTN mMaxNumberOfCpus;
186 extern UINTN mNumberOfCpus;
187 extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
188
189 ///
190 /// The mode of the CPU at the time an SMI occurs
191 ///
192 extern UINT8 mSmmSaveStateRegisterLma;
193
194 //
195 // SMM CPU Protocol function prototypes.
196 //
197
198 /**
199 Read information from the CPU save state.
200
201 @param This EFI_SMM_CPU_PROTOCOL instance
202 @param Width The number of bytes to read from the CPU save state.
203 @param Register Specifies the CPU register to read form the save state.
204 @param CpuIndex Specifies the zero-based index of the CPU save state
205 @param Buffer Upon return, this holds the CPU register value read from the save state.
206
207 @retval EFI_SUCCESS The register was read from Save State
208 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
209 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
210
211 **/
212 EFI_STATUS
213 EFIAPI
214 SmmReadSaveState (
215 IN CONST EFI_SMM_CPU_PROTOCOL *This,
216 IN UINTN Width,
217 IN EFI_SMM_SAVE_STATE_REGISTER Register,
218 IN UINTN CpuIndex,
219 OUT VOID *Buffer
220 );
221
222 /**
223 Write data to the CPU save state.
224
225 @param This EFI_SMM_CPU_PROTOCOL instance
226 @param Width The number of bytes to read from the CPU save state.
227 @param Register Specifies the CPU register to write to the save state.
228 @param CpuIndex Specifies the zero-based index of the CPU save state
229 @param Buffer Upon entry, this holds the new CPU register value.
230
231 @retval EFI_SUCCESS The register was written from Save State
232 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
233 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct
234
235 **/
236 EFI_STATUS
237 EFIAPI
238 SmmWriteSaveState (
239 IN CONST EFI_SMM_CPU_PROTOCOL *This,
240 IN UINTN Width,
241 IN EFI_SMM_SAVE_STATE_REGISTER Register,
242 IN UINTN CpuIndex,
243 IN CONST VOID *Buffer
244 );
245
246 /**
247 Read a CPU Save State register on the target processor.
248
249 This function abstracts the differences that whether the CPU Save State register is in the
250 IA32 CPU Save State Map or X64 CPU Save State Map.
251
252 This function supports reading a CPU Save State register in SMBase relocation handler.
253
254 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
255 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
256 @param[in] Width The number of bytes to read from the CPU save state.
257 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
258
259 @retval EFI_SUCCESS The register was read from Save State.
260 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
261 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
262
263 **/
264 EFI_STATUS
265 EFIAPI
266 ReadSaveStateRegister (
267 IN UINTN CpuIndex,
268 IN EFI_SMM_SAVE_STATE_REGISTER Register,
269 IN UINTN Width,
270 OUT VOID *Buffer
271 );
272
273 /**
274 Write value to a CPU Save State register on the target processor.
275
276 This function abstracts the differences that whether the CPU Save State register is in the
277 IA32 CPU Save State Map or X64 CPU Save State Map.
278
279 This function supports writing a CPU Save State register in SMBase relocation handler.
280
281 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
282 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
283 @param[in] Width The number of bytes to read from the CPU save state.
284 @param[in] Buffer Upon entry, this holds the new CPU register value.
285
286 @retval EFI_SUCCESS The register was written to Save State.
287 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
288 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct.
289
290 **/
291 EFI_STATUS
292 EFIAPI
293 WriteSaveStateRegister (
294 IN UINTN CpuIndex,
295 IN EFI_SMM_SAVE_STATE_REGISTER Register,
296 IN UINTN Width,
297 IN CONST VOID *Buffer
298 );
299
300 extern CONST UINT8 gcSmmInitTemplate[];
301 extern CONST UINT16 gcSmmInitSize;
302 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
303 extern UINT32 mSmmCr0;
304 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
305 extern UINT32 mSmmCr4;
306 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
307 X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
308
309 /**
310 Semaphore operation for all processor relocate SMMBase.
311 **/
312 VOID
313 EFIAPI
314 SmmRelocationSemaphoreComplete (
315 VOID
316 );
317
318 ///
319 /// The type of SMM CPU Information
320 ///
321 typedef struct {
322 SPIN_LOCK *Busy;
323 volatile EFI_AP_PROCEDURE Procedure;
324 volatile VOID *Parameter;
325 volatile UINT32 *Run;
326 volatile BOOLEAN *Present;
327 } SMM_CPU_DATA_BLOCK;
328
329 typedef enum {
330 SmmCpuSyncModeTradition,
331 SmmCpuSyncModeRelaxedAp,
332 SmmCpuSyncModeMax
333 } SMM_CPU_SYNC_MODE;
334
335 typedef struct {
336 //
337 // Pointer to an array. The array should be located immediately after this structure
338 // so that UC cache-ability can be set together.
339 //
340 SMM_CPU_DATA_BLOCK *CpuData;
341 volatile UINT32 *Counter;
342 volatile UINT32 BspIndex;
343 volatile BOOLEAN *InsideSmm;
344 volatile BOOLEAN *AllCpusInSync;
345 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
346 volatile BOOLEAN SwitchBsp;
347 volatile BOOLEAN *CandidateBsp;
348 } SMM_DISPATCHER_MP_SYNC_DATA;
349
350 #define SMM_PSD_OFFSET 0xfb00
351
352 ///
353 /// All global semaphores' pointer
354 ///
355 typedef struct {
356 volatile UINT32 *Counter;
357 volatile BOOLEAN *InsideSmm;
358 volatile BOOLEAN *AllCpusInSync;
359 SPIN_LOCK *PFLock;
360 SPIN_LOCK *CodeAccessCheckLock;
361 } SMM_CPU_SEMAPHORE_GLOBAL;
362
363 ///
364 /// All semaphores for each processor
365 ///
366 typedef struct {
367 SPIN_LOCK *Busy;
368 volatile UINT32 *Run;
369 volatile BOOLEAN *Present;
370 } SMM_CPU_SEMAPHORE_CPU;
371
372 ///
373 /// All semaphores' information
374 ///
375 typedef struct {
376 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
377 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
378 } SMM_CPU_SEMAPHORES;
379
380 extern IA32_DESCRIPTOR gcSmiGdtr;
381 extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
382 extern UINTN mGdtBufferSize;
383 extern IA32_DESCRIPTOR gcSmiIdtr;
384 extern VOID *gcSmiIdtrPtr;
385 extern UINT64 gPhyMask;
386 extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
387 extern UINTN mSmmStackArrayBase;
388 extern UINTN mSmmStackArrayEnd;
389 extern UINTN mSmmStackSize;
390 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
391 extern IA32_DESCRIPTOR gcSmiInitGdtr;
392 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
393 extern UINTN mSemaphoreSize;
394 extern SPIN_LOCK *mPFLock;
395 extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
396 extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
397 extern UINTN mSmmCpuSmramRangeCount;
398 extern UINT8 mPhysicalAddressBits;
399
400 //
401 // Copy of the PcdPteMemoryEncryptionAddressOrMask
402 //
403 extern UINT64 mAddressEncMask;
404
405 /**
406 Create 4G PageTable in SMRAM.
407
408 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
409 @return PageTable Address
410
411 **/
412 UINT32
413 Gen4GPageTable (
414 IN BOOLEAN Is32BitPageTable
415 );
416
417
418 /**
419 Initialize global data for MP synchronization.
420
421 @param Stacks Base address of SMI stack buffer for all processors.
422 @param StackSize Stack size for each processor in SMM.
423
424 **/
425 UINT32
426 InitializeMpServiceData (
427 IN VOID *Stacks,
428 IN UINTN StackSize
429 );
430
431 /**
432 Initialize Timer for SMM AP Sync.
433
434 **/
435 VOID
436 InitializeSmmTimer (
437 VOID
438 );
439
440 /**
441 Start Timer for SMM AP Sync.
442
443 **/
444 UINT64
445 EFIAPI
446 StartSyncTimer (
447 VOID
448 );
449
450 /**
451 Check if the SMM AP Sync timer is timeout.
452
453 @param Timer The start timer from the begin.
454
455 **/
456 BOOLEAN
457 EFIAPI
458 IsSyncTimerTimeout (
459 IN UINT64 Timer
460 );
461
462 /**
463 Initialize IDT for SMM Stack Guard.
464
465 **/
466 VOID
467 EFIAPI
468 InitializeIDTSmmStackGuard (
469 VOID
470 );
471
472 /**
473 Initialize Gdt for all processors.
474
475 @param[in] Cr3 CR3 value.
476 @param[out] GdtStepSize The step size for GDT table.
477
478 @return GdtBase for processor 0.
479 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
480 **/
481 VOID *
482 InitGdt (
483 IN UINTN Cr3,
484 OUT UINTN *GdtStepSize
485 );
486
487 /**
488
489 Register the SMM Foundation entry point.
490
491 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
492 @param SmmEntryPoint SMM Foundation EntryPoint
493
494 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
495
496 **/
497 EFI_STATUS
498 EFIAPI
499 RegisterSmmEntry (
500 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
501 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
502 );
503
504 /**
505 Create PageTable for SMM use.
506
507 @return PageTable Address
508
509 **/
510 UINT32
511 SmmInitPageTable (
512 VOID
513 );
514
515 /**
516 Schedule a procedure to run on the specified CPU.
517
518 @param Procedure The address of the procedure to run
519 @param CpuIndex Target CPU number
520 @param ProcArguments The parameter to pass to the procedure
521
522 @retval EFI_INVALID_PARAMETER CpuNumber not valid
523 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
524 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
525 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
526 @retval EFI_SUCCESS - The procedure has been successfully scheduled
527
528 **/
529 EFI_STATUS
530 EFIAPI
531 SmmStartupThisAp (
532 IN EFI_AP_PROCEDURE Procedure,
533 IN UINTN CpuIndex,
534 IN OUT VOID *ProcArguments OPTIONAL
535 );
536
537 /**
538 Schedule a procedure to run on the specified CPU in a blocking fashion.
539
540 @param Procedure The address of the procedure to run
541 @param CpuIndex Target CPU Index
542 @param ProcArguments The parameter to pass to the procedure
543
544 @retval EFI_INVALID_PARAMETER CpuNumber not valid
545 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
546 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
547 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
548 @retval EFI_SUCCESS The procedure has been successfully scheduled
549
550 **/
551 EFI_STATUS
552 EFIAPI
553 SmmBlockingStartupThisAp (
554 IN EFI_AP_PROCEDURE Procedure,
555 IN UINTN CpuIndex,
556 IN OUT VOID *ProcArguments OPTIONAL
557 );
558
559 /**
560 This function sets the attributes for the memory region specified by BaseAddress and
561 Length from their current attributes to the attributes specified by Attributes.
562
563 @param[in] BaseAddress The physical address that is the start address of a memory region.
564 @param[in] Length The size in bytes of the memory region.
565 @param[in] Attributes The bit mask of attributes to set for the memory region.
566
567 @retval EFI_SUCCESS The attributes were set for the memory region.
568 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
569 BaseAddress and Length cannot be modified.
570 @retval EFI_INVALID_PARAMETER Length is zero.
571 Attributes specified an illegal combination of attributes that
572 cannot be set together.
573 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
574 the memory resource range.
575 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
576 resource range specified by BaseAddress and Length.
577 The bit mask of attributes is not support for the memory resource
578 range specified by BaseAddress and Length.
579
580 **/
581 EFI_STATUS
582 EFIAPI
583 SmmSetMemoryAttributes (
584 IN EFI_PHYSICAL_ADDRESS BaseAddress,
585 IN UINT64 Length,
586 IN UINT64 Attributes
587 );
588
589 /**
590 This function clears the attributes for the memory region specified by BaseAddress and
591 Length from their current attributes to the attributes specified by Attributes.
592
593 @param[in] BaseAddress The physical address that is the start address of a memory region.
594 @param[in] Length The size in bytes of the memory region.
595 @param[in] Attributes The bit mask of attributes to clear for the memory region.
596
597 @retval EFI_SUCCESS The attributes were cleared for the memory region.
598 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
599 BaseAddress and Length cannot be modified.
600 @retval EFI_INVALID_PARAMETER Length is zero.
601 Attributes specified an illegal combination of attributes that
602 cannot be set together.
603 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
604 the memory resource range.
605 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
606 resource range specified by BaseAddress and Length.
607 The bit mask of attributes is not support for the memory resource
608 range specified by BaseAddress and Length.
609
610 **/
611 EFI_STATUS
612 EFIAPI
613 SmmClearMemoryAttributes (
614 IN EFI_PHYSICAL_ADDRESS BaseAddress,
615 IN UINT64 Length,
616 IN UINT64 Attributes
617 );
618
619 /**
620 Initialize MP synchronization data.
621
622 **/
623 VOID
624 EFIAPI
625 InitializeMpSyncData (
626 VOID
627 );
628
629 /**
630
631 Find out SMRAM information including SMRR base and SMRR size.
632
633 @param SmrrBase SMRR base
634 @param SmrrSize SMRR size
635
636 **/
637 VOID
638 FindSmramInfo (
639 OUT UINT32 *SmrrBase,
640 OUT UINT32 *SmrrSize
641 );
642
643 /**
644 Relocate SmmBases for each processor.
645
646 Execute on first boot and all S3 resumes
647
648 **/
649 VOID
650 EFIAPI
651 SmmRelocateBases (
652 VOID
653 );
654
655 /**
656 Page Fault handler for SMM use.
657
658 @param InterruptType Defines the type of interrupt or exception that
659 occurred on the processor.This parameter is processor architecture specific.
660 @param SystemContext A pointer to the processor context when
661 the interrupt occurred on the processor.
662 **/
663 VOID
664 EFIAPI
665 SmiPFHandler (
666 IN EFI_EXCEPTION_TYPE InterruptType,
667 IN EFI_SYSTEM_CONTEXT SystemContext
668 );
669
670 /**
671 Perform the remaining tasks.
672
673 **/
674 VOID
675 PerformRemainingTasks (
676 VOID
677 );
678
679 /**
680 Perform the pre tasks.
681
682 **/
683 VOID
684 PerformPreTasks (
685 VOID
686 );
687
688 /**
689 Initialize MSR spin lock by MSR index.
690
691 @param MsrIndex MSR index value.
692
693 **/
694 VOID
695 InitMsrSpinLockByIndex (
696 IN UINT32 MsrIndex
697 );
698
699 /**
700 Hook return address of SMM Save State so that semaphore code
701 can be executed immediately after AP exits SMM to indicate to
702 the BSP that an AP has exited SMM after SMBASE relocation.
703
704 @param[in] CpuIndex The processor index.
705 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
706 immediately after AP exits SMM.
707
708 **/
709 VOID
710 SemaphoreHook (
711 IN UINTN CpuIndex,
712 IN volatile BOOLEAN *RebasedFlag
713 );
714
715 /**
716 Configure SMM Code Access Check feature for all processors.
717 SMM Feature Control MSR will be locked after configuration.
718 **/
719 VOID
720 ConfigSmmCodeAccessCheck (
721 VOID
722 );
723
724 /**
725 Hook the code executed immediately after an RSM instruction on the currently
726 executing CPU. The mode of code executed immediately after RSM must be
727 detected, and the appropriate hook must be selected. Always clear the auto
728 HALT restart flag if it is set.
729
730 @param[in] CpuIndex The processor index for the currently
731 executing CPU.
732 @param[in] CpuState Pointer to SMRAM Save State Map for the
733 currently executing CPU.
734 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
735 32-bit mode from 64-bit SMM.
736 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
737 same mode as SMM.
738
739 @retval The value of the original instruction pointer before it was hooked.
740
741 **/
742 UINT64
743 EFIAPI
744 HookReturnFromSmm (
745 IN UINTN CpuIndex,
746 SMRAM_SAVE_STATE_MAP *CpuState,
747 UINT64 NewInstructionPointer32,
748 UINT64 NewInstructionPointer
749 );
750
751 /**
752 Get the size of the SMI Handler in bytes.
753
754 @retval The size, in bytes, of the SMI Handler.
755
756 **/
757 UINTN
758 EFIAPI
759 GetSmiHandlerSize (
760 VOID
761 );
762
763 /**
764 Install the SMI handler for the CPU specified by CpuIndex. This function
765 is called by the CPU that was elected as monarch during System Management
766 Mode initialization.
767
768 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
769 The value must be between 0 and the NumberOfCpus field
770 in the System Management System Table (SMST).
771 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
772 @param[in] SmiStack The stack to use when an SMI is processed by the
773 the CPU specified by CpuIndex.
774 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
775 processed by the CPU specified by CpuIndex.
776 @param[in] GdtBase The base address of the GDT to use when an SMI is
777 processed by the CPU specified by CpuIndex.
778 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
779 processed by the CPU specified by CpuIndex.
780 @param[in] IdtBase The base address of the IDT to use when an SMI is
781 processed by the CPU specified by CpuIndex.
782 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
783 processed by the CPU specified by CpuIndex.
784 @param[in] Cr3 The base address of the page tables to use when an SMI
785 is processed by the CPU specified by CpuIndex.
786 **/
787 VOID
788 EFIAPI
789 InstallSmiHandler (
790 IN UINTN CpuIndex,
791 IN UINT32 SmBase,
792 IN VOID *SmiStack,
793 IN UINTN StackSize,
794 IN UINTN GdtBase,
795 IN UINTN GdtSize,
796 IN UINTN IdtBase,
797 IN UINTN IdtSize,
798 IN UINT32 Cr3
799 );
800
801 /**
802 Search module name by input IP address and output it.
803
804 @param CallerIpAddress Caller instruction pointer.
805
806 **/
807 VOID
808 DumpModuleInfoByIp (
809 IN UINTN CallerIpAddress
810 );
811
812 /**
813 This function sets memory attribute according to MemoryAttributesTable.
814 **/
815 VOID
816 SetMemMapAttributes (
817 VOID
818 );
819
820 /**
821 This function sets UEFI memory attribute according to UEFI memory map.
822 **/
823 VOID
824 SetUefiMemMapAttributes (
825 VOID
826 );
827
828 /**
829 Return if the Address is forbidden as SMM communication buffer.
830
831 @param[in] Address the address to be checked
832
833 @return TRUE The address is forbidden as SMM communication buffer.
834 @return FALSE The address is allowed as SMM communication buffer.
835 **/
836 BOOLEAN
837 IsSmmCommBufferForbiddenAddress (
838 IN UINT64 Address
839 );
840
841 /**
842 This function caches the UEFI memory map information.
843 **/
844 VOID
845 GetUefiMemoryMap (
846 VOID
847 );
848
849 /**
850 This function sets memory attribute for page table.
851 **/
852 VOID
853 SetPageTableAttributes (
854 VOID
855 );
856
857 /**
858 Return page table base.
859
860 @return page table base.
861 **/
862 UINTN
863 GetPageTableBase (
864 VOID
865 );
866
867 /**
868 This function sets the attributes for the memory region specified by BaseAddress and
869 Length from their current attributes to the attributes specified by Attributes.
870
871 @param[in] BaseAddress The physical address that is the start address of a memory region.
872 @param[in] Length The size in bytes of the memory region.
873 @param[in] Attributes The bit mask of attributes to set for the memory region.
874 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
875
876 @retval EFI_SUCCESS The attributes were set for the memory region.
877 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
878 BaseAddress and Length cannot be modified.
879 @retval EFI_INVALID_PARAMETER Length is zero.
880 Attributes specified an illegal combination of attributes that
881 cannot be set together.
882 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
883 the memory resource range.
884 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
885 resource range specified by BaseAddress and Length.
886 The bit mask of attributes is not support for the memory resource
887 range specified by BaseAddress and Length.
888
889 **/
890 EFI_STATUS
891 EFIAPI
892 SmmSetMemoryAttributesEx (
893 IN EFI_PHYSICAL_ADDRESS BaseAddress,
894 IN UINT64 Length,
895 IN UINT64 Attributes,
896 OUT BOOLEAN *IsSplitted OPTIONAL
897 );
898
899 /**
900 This function clears the attributes for the memory region specified by BaseAddress and
901 Length from their current attributes to the attributes specified by Attributes.
902
903 @param[in] BaseAddress The physical address that is the start address of a memory region.
904 @param[in] Length The size in bytes of the memory region.
905 @param[in] Attributes The bit mask of attributes to clear for the memory region.
906 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
907
908 @retval EFI_SUCCESS The attributes were cleared for the memory region.
909 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
910 BaseAddress and Length cannot be modified.
911 @retval EFI_INVALID_PARAMETER Length is zero.
912 Attributes specified an illegal combination of attributes that
913 cannot be set together.
914 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
915 the memory resource range.
916 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
917 resource range specified by BaseAddress and Length.
918 The bit mask of attributes is not support for the memory resource
919 range specified by BaseAddress and Length.
920
921 **/
922 EFI_STATUS
923 EFIAPI
924 SmmClearMemoryAttributesEx (
925 IN EFI_PHYSICAL_ADDRESS BaseAddress,
926 IN UINT64 Length,
927 IN UINT64 Attributes,
928 OUT BOOLEAN *IsSplitted OPTIONAL
929 );
930
931 /**
932 This API provides a way to allocate memory for page table.
933
934 This API can be called more once to allocate memory for page tables.
935
936 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
937 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
938 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
939 returned.
940
941 @param Pages The number of 4 KB pages to allocate.
942
943 @return A pointer to the allocated buffer or NULL if allocation fails.
944
945 **/
946 VOID *
947 AllocatePageTableMemory (
948 IN UINTN Pages
949 );
950
951 /**
952 Allocate pages for code.
953
954 @param[in] Pages Number of pages to be allocated.
955
956 @return Allocated memory.
957 **/
958 VOID *
959 AllocateCodePages (
960 IN UINTN Pages
961 );
962
963 /**
964 Allocate aligned pages for code.
965
966 @param[in] Pages Number of pages to be allocated.
967 @param[in] Alignment The requested alignment of the allocation.
968 Must be a power of two.
969 If Alignment is zero, then byte alignment is used.
970
971 @return Allocated memory.
972 **/
973 VOID *
974 AllocateAlignedCodePages (
975 IN UINTN Pages,
976 IN UINTN Alignment
977 );
978
979
980 //
981 // S3 related global variable and function prototype.
982 //
983
984 extern BOOLEAN mSmmS3Flag;
985
986 /**
987 Initialize SMM S3 resume state structure used during S3 Resume.
988
989 @param[in] Cr3 The base address of the page tables to use in SMM.
990
991 **/
992 VOID
993 InitSmmS3ResumeState (
994 IN UINT32 Cr3
995 );
996
997 /**
998 Get ACPI CPU data.
999
1000 **/
1001 VOID
1002 GetAcpiCpuData (
1003 VOID
1004 );
1005
1006 /**
1007 Restore SMM Configuration in S3 boot path.
1008
1009 **/
1010 VOID
1011 RestoreSmmConfigurationInS3 (
1012 VOID
1013 );
1014
1015 /**
1016 Get ACPI S3 enable flag.
1017
1018 **/
1019 VOID
1020 GetAcpiS3EnableFlag (
1021 VOID
1022 );
1023
1024 /**
1025 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1026
1027 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1028 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1029 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1030
1031 **/
1032 VOID
1033 TransferApToSafeState (
1034 IN UINTN ApHltLoopCode,
1035 IN UINTN TopOfStack,
1036 IN UINTN NumberToFinishAddress
1037 );
1038
1039 /**
1040 This function set given attributes of the memory region specified by
1041 BaseAddress and Length.
1042
1043 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1044 @param BaseAddress The physical address that is the start address of
1045 a memory region.
1046 @param Length The size in bytes of the memory region.
1047 @param Attributes The bit mask of attributes to set for the memory
1048 region.
1049
1050 @retval EFI_SUCCESS The attributes were set for the memory region.
1051 @retval EFI_INVALID_PARAMETER Length is zero.
1052 Attributes specified an illegal combination of
1053 attributes that cannot be set together.
1054 @retval EFI_UNSUPPORTED The processor does not support one or more
1055 bytes of the memory resource range specified
1056 by BaseAddress and Length.
1057 The bit mask of attributes is not supported for
1058 the memory resource range specified by
1059 BaseAddress and Length.
1060
1061 **/
1062 EFI_STATUS
1063 EFIAPI
1064 EdkiiSmmSetMemoryAttributes (
1065 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1066 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1067 IN UINT64 Length,
1068 IN UINT64 Attributes
1069 );
1070
1071 /**
1072 This function clears given attributes of the memory region specified by
1073 BaseAddress and Length.
1074
1075 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1076 @param BaseAddress The physical address that is the start address of
1077 a memory region.
1078 @param Length The size in bytes of the memory region.
1079 @param Attributes The bit mask of attributes to clear for the memory
1080 region.
1081
1082 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1083 @retval EFI_INVALID_PARAMETER Length is zero.
1084 Attributes specified an illegal combination of
1085 attributes that cannot be cleared together.
1086 @retval EFI_UNSUPPORTED The processor does not support one or more
1087 bytes of the memory resource range specified
1088 by BaseAddress and Length.
1089 The bit mask of attributes is not supported for
1090 the memory resource range specified by
1091 BaseAddress and Length.
1092
1093 **/
1094 EFI_STATUS
1095 EFIAPI
1096 EdkiiSmmClearMemoryAttributes (
1097 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1098 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1099 IN UINT64 Length,
1100 IN UINT64 Attributes
1101 );
1102
1103 /**
1104 This function retrieves the attributes of the memory region specified by
1105 BaseAddress and Length. If different attributes are got from different part
1106 of the memory region, EFI_NO_MAPPING will be returned.
1107
1108 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1109 @param BaseAddress The physical address that is the start address of
1110 a memory region.
1111 @param Length The size in bytes of the memory region.
1112 @param Attributes Pointer to attributes returned.
1113
1114 @retval EFI_SUCCESS The attributes got for the memory region.
1115 @retval EFI_INVALID_PARAMETER Length is zero.
1116 Attributes is NULL.
1117 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1118 region.
1119 @retval EFI_UNSUPPORTED The processor does not support one or more
1120 bytes of the memory resource range specified
1121 by BaseAddress and Length.
1122
1123 **/
1124 EFI_STATUS
1125 EFIAPI
1126 EdkiiSmmGetMemoryAttributes (
1127 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1128 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1129 IN UINT64 Length,
1130 IN UINT64 *Attributes
1131 );
1132
1133 /**
1134 This function fixes up the address of the global variable or function
1135 referred in SmmInit assembly files to be the absoute address.
1136 **/
1137 VOID
1138 EFIAPI
1139 PiSmmCpuSmmInitFixupAddress (
1140 );
1141
1142 /**
1143 This function fixes up the address of the global variable or function
1144 referred in SmiEntry assembly files to be the absoute address.
1145 **/
1146 VOID
1147 EFIAPI
1148 PiSmmCpuSmiEntryFixupAddress (
1149 );
1150
1151 #endif