UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h

   1 /** @file
   2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
   3
   4 Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
   5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   6
   7 This program and the accompanying materials
   8 are licensed and made available under the terms and conditions of the BSD License
   9 which accompanies this distribution.  The full text of the license may be found at
  10 http://opensource.org/licenses/bsd-license.php
  11
  12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #ifndef _CPU_PISMMCPUDXESMM_H_
  18 #define _CPU_PISMMCPUDXESMM_H_
  19
  20 #include <PiSmm.h>
  21
  22 #include <Protocol/MpService.h>
  23 #include <Protocol/SmmConfiguration.h>
  24 #include <Protocol/SmmCpu.h>
  25 #include <Protocol/SmmAccess2.h>
  26 #include <Protocol/SmmReadyToLock.h>
  27 #include <Protocol/SmmCpuService.h>
  28
  29 #include <Guid/AcpiS3Context.h>
  30 #include <Guid/PiSmmMemoryAttributesTable.h>
  31
  32 #include <Library/BaseLib.h>
  33 #include <Library/IoLib.h>
  34 #include <Library/TimerLib.h>
  35 #include <Library/SynchronizationLib.h>
  36 #include <Library/DebugLib.h>
  37 #include <Library/BaseMemoryLib.h>
  38 #include <Library/PcdLib.h>
  39 #include <Library/CacheMaintenanceLib.h>
  40 #include <Library/MtrrLib.h>
  41 #include <Library/SmmCpuPlatformHookLib.h>
  42 #include <Library/SmmServicesTableLib.h>
  43 #include <Library/MemoryAllocationLib.h>
  44 #include <Library/UefiBootServicesTableLib.h>
  45 #include <Library/UefiRuntimeServicesTableLib.h>
  46 #include <Library/DebugAgentLib.h>
  47 #include <Library/HobLib.h>
  48 #include <Library/LocalApicLib.h>
  49 #include <Library/UefiCpuLib.h>
  50 #include <Library/CpuExceptionHandlerLib.h>
  51 #include <Library/ReportStatusCodeLib.h>
  52 #include <Library/SmmCpuFeaturesLib.h>
  53 #include <Library/PeCoffGetEntryPointLib.h>
  54
  55 #include <AcpiCpuData.h>
  56 #include <CpuHotPlugData.h>
  57
  58 #include <Register/Cpuid.h>
  59 #include <Register/Msr.h>
  60
  61 #include "CpuService.h"
  62 #include "SmmProfile.h"
  63
  64 //
  65 // MSRs required for configuration of SMM Code Access Check
  66 //
  67 #define EFI_MSR_SMM_MCA_CAP                    0x17D
  68 #define  SMM_CODE_ACCESS_CHK_BIT               BIT58
  69
  70 #define  SMM_FEATURE_CONTROL_LOCK_BIT          BIT0
  71 #define  SMM_CODE_CHK_EN_BIT                   BIT2
  72
  73 ///
  74 /// Page Table Entry
  75 ///
  76 #define IA32_PG_P                   BIT0
  77 #define IA32_PG_RW                  BIT1
  78 #define IA32_PG_U                   BIT2
  79 #define IA32_PG_WT                  BIT3
  80 #define IA32_PG_CD                  BIT4
  81 #define IA32_PG_A                   BIT5
  82 #define IA32_PG_D                   BIT6
  83 #define IA32_PG_PS                  BIT7
  84 #define IA32_PG_PAT_2M              BIT12
  85 #define IA32_PG_PAT_4K              IA32_PG_PS
  86 #define IA32_PG_PMNT                BIT62
  87 #define IA32_PG_NX                  BIT63
  88
  89 #define PAGE_ATTRIBUTE_BITS         (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
  90 //
  91 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
  92 // X64 PAE PDPTE does not have such restriction
  93 //
  94 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS    (IA32_PG_P)
  95
  96 #define PAGE_PROGATE_BITS           (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
  97
  98 #define PAGING_4K_MASK  0xFFF
  99 #define PAGING_2M_MASK  0x1FFFFF
 100 #define PAGING_1G_MASK  0x3FFFFFFF
 101
 102 #define PAGING_PAE_INDEX_MASK  0x1FF
 103
 104 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
 105 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
 106 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
 107
 108 typedef enum {
 109   PageNone,
 110   Page4K,
 111   Page2M,
 112   Page1G,
 113 } PAGE_ATTRIBUTE;
 114
 115 typedef struct {
 116   PAGE_ATTRIBUTE   Attribute;
 117   UINT64           Length;
 118   UINT64           AddressMask;
 119 } PAGE_ATTRIBUTE_TABLE;
 120
 121 //
 122 // Size of Task-State Segment defined in IA32 Manual
 123 //
 124 #define TSS_SIZE              104
 125 #define TSS_X64_IST1_OFFSET   36
 126 #define TSS_IA32_CR3_OFFSET   28
 127 #define TSS_IA32_ESP_OFFSET   56
 128
 129 #define CR0_WP                BIT16
 130
 131 //
 132 // Code select value
 133 //
 134 #define PROTECT_MODE_CODE_SEGMENT          0x08
 135 #define LONG_MODE_CODE_SEGMENT             0x38
 136
 137 //
 138 // The size 0x20 must be bigger than
 139 // the size of template code of SmmInit. Currently,
 140 // the size of SmmInit requires the 0x16 Bytes buffer
 141 // at least.
 142 //
 143 #define BACK_BUF_SIZE  0x20
 144
 145 #define EXCEPTION_VECTOR_NUMBER     0x20
 146
 147 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
 148
 149 typedef UINT32                              SMM_CPU_ARRIVAL_EXCEPTIONS;
 150 #define ARRIVAL_EXCEPTION_BLOCKED           0x1
 151 #define ARRIVAL_EXCEPTION_DELAYED           0x2
 152 #define ARRIVAL_EXCEPTION_SMI_DISABLED      0x4
 153
 154 //
 155 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
 156 // Contains the SMM Configuration Protocols that is produced.
 157 // Contains a mix of DXE and SMM contents.  All the fields must be used properly.
 158 //
 159 #define SMM_CPU_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'c', 'p', 'u')
 160
 161 typedef struct {
 162   UINTN                           Signature;
 163
 164   EFI_HANDLE                      SmmCpuHandle;
 165
 166   EFI_PROCESSOR_INFORMATION       *ProcessorInfo;
 167   SMM_CPU_OPERATION               *Operation;
 168   UINTN                           *CpuSaveStateSize;
 169   VOID                            **CpuSaveState;
 170
 171   EFI_SMM_RESERVED_SMRAM_REGION   SmmReservedSmramRegion[1];
 172   EFI_SMM_ENTRY_CONTEXT           SmmCoreEntryContext;
 173   EFI_SMM_ENTRY_POINT             SmmCoreEntry;
 174
 175   EFI_SMM_CONFIGURATION_PROTOCOL  SmmConfiguration;
 176 } SMM_CPU_PRIVATE_DATA;
 177
 178 extern SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate;
 179 extern CPU_HOT_PLUG_DATA      mCpuHotPlugData;
 180 extern UINTN                  mMaxNumberOfCpus;
 181 extern UINTN                  mNumberOfCpus;
 182 extern EFI_SMM_CPU_PROTOCOL   mSmmCpu;
 183
 184 ///
 185 /// The mode of the CPU at the time an SMI occurs
 186 ///
 187 extern UINT8  mSmmSaveStateRegisterLma;
 188
 189 //
 190 // SMM CPU Protocol function prototypes.
 191 //
 192
 193 /**
 194   Read information from the CPU save state.
 195
 196   @param  This      EFI_SMM_CPU_PROTOCOL instance
 197   @param  Width     The number of bytes to read from the CPU save state.
 198   @param  Register  Specifies the CPU register to read form the save state.
 199   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 200   @param  Buffer    Upon return, this holds the CPU register value read from the save state.
 201
 202   @retval EFI_SUCCESS   The register was read from Save State
 203   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 204   @retval EFI_INVALID_PARAMTER   This or Buffer is NULL.
 205
 206 **/
 207 EFI_STATUS
 208 EFIAPI
 209 SmmReadSaveState (
 210   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 211   IN UINTN                              Width,
 212   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 213   IN UINTN                              CpuIndex,
 214   OUT VOID                              *Buffer
 215   );
 216
 217 /**
 218   Write data to the CPU save state.
 219
 220   @param  This      EFI_SMM_CPU_PROTOCOL instance
 221   @param  Width     The number of bytes to read from the CPU save state.
 222   @param  Register  Specifies the CPU register to write to the save state.
 223   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 224   @param  Buffer    Upon entry, this holds the new CPU register value.
 225
 226   @retval EFI_SUCCESS   The register was written from Save State
 227   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 228   @retval EFI_INVALID_PARAMTER   ProcessorIndex or Width is not correct
 229
 230 **/
 231 EFI_STATUS
 232 EFIAPI
 233 SmmWriteSaveState (
 234   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 235   IN UINTN                              Width,
 236   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 237   IN UINTN                              CpuIndex,
 238   IN CONST VOID                         *Buffer
 239   );
 240
 241 /**
 242 Read a CPU Save State register on the target processor.
 243
 244 This function abstracts the differences that whether the CPU Save State register is in the
 245 IA32 CPU Save State Map or X64 CPU Save State Map.
 246
 247 This function supports reading a CPU Save State register in SMBase relocation handler.
 248
 249 @param[in]  CpuIndex       Specifies the zero-based index of the CPU save state.
 250 @param[in]  RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 251 @param[in]  Width          The number of bytes to read from the CPU save state.
 252 @param[out] Buffer         Upon return, this holds the CPU register value read from the save state.
 253
 254 @retval EFI_SUCCESS           The register was read from Save State.
 255 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 256 @retval EFI_INVALID_PARAMTER  This or Buffer is NULL.
 257
 258 **/
 259 EFI_STATUS
 260 EFIAPI
 261 ReadSaveStateRegister (
 262   IN UINTN                        CpuIndex,
 263   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 264   IN UINTN                        Width,
 265   OUT VOID                        *Buffer
 266   );
 267
 268 /**
 269 Write value to a CPU Save State register on the target processor.
 270
 271 This function abstracts the differences that whether the CPU Save State register is in the
 272 IA32 CPU Save State Map or X64 CPU Save State Map.
 273
 274 This function supports writing a CPU Save State register in SMBase relocation handler.
 275
 276 @param[in] CpuIndex       Specifies the zero-based index of the CPU save state.
 277 @param[in] RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 278 @param[in] Width          The number of bytes to read from the CPU save state.
 279 @param[in] Buffer         Upon entry, this holds the new CPU register value.
 280
 281 @retval EFI_SUCCESS           The register was written to Save State.
 282 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 283 @retval EFI_INVALID_PARAMTER  ProcessorIndex or Width is not correct.
 284
 285 **/
 286 EFI_STATUS
 287 EFIAPI
 288 WriteSaveStateRegister (
 289   IN UINTN                        CpuIndex,
 290   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 291   IN UINTN                        Width,
 292   IN CONST VOID                   *Buffer
 293   );
 294
 295 //
 296 //
 297 //
 298 typedef struct {
 299   UINT32                            Offset;
 300   UINT16                            Segment;
 301   UINT16                            Reserved;
 302 } IA32_FAR_ADDRESS;
 303
 304 extern IA32_FAR_ADDRESS             gSmmJmpAddr;
 305
 306 extern CONST UINT8                  gcSmmInitTemplate[];
 307 extern CONST UINT16                 gcSmmInitSize;
 308 extern UINT32                       gSmmCr0;
 309 extern UINT32                       gSmmCr3;
 310 extern UINT32                       gSmmCr4;
 311 extern UINTN                        gSmmInitStack;
 312
 313 /**
 314   Semaphore operation for all processor relocate SMMBase.
 315 **/
 316 VOID
 317 EFIAPI
 318 SmmRelocationSemaphoreComplete (
 319   VOID
 320   );
 321
 322 ///
 323 /// The type of SMM CPU Information
 324 ///
 325 typedef struct {
 326   SPIN_LOCK                         *Busy;
 327   volatile EFI_AP_PROCEDURE         Procedure;
 328   volatile VOID                     *Parameter;
 329   volatile UINT32                   *Run;
 330   volatile BOOLEAN                  *Present;
 331 } SMM_CPU_DATA_BLOCK;
 332
 333 typedef enum {
 334   SmmCpuSyncModeTradition,
 335   SmmCpuSyncModeRelaxedAp,
 336   SmmCpuSyncModeMax
 337 } SMM_CPU_SYNC_MODE;
 338
 339 typedef struct {
 340   //
 341   // Pointer to an array. The array should be located immediately after this structure
 342   // so that UC cache-ability can be set together.
 343   //
 344   SMM_CPU_DATA_BLOCK            *CpuData;
 345   volatile UINT32               *Counter;
 346   volatile UINT32               BspIndex;
 347   volatile BOOLEAN              *InsideSmm;
 348   volatile BOOLEAN              *AllCpusInSync;
 349   volatile SMM_CPU_SYNC_MODE    EffectiveSyncMode;
 350   volatile BOOLEAN              SwitchBsp;
 351   volatile BOOLEAN              *CandidateBsp;
 352 } SMM_DISPATCHER_MP_SYNC_DATA;
 353
 354 #define MSR_SPIN_LOCK_INIT_NUM 15
 355
 356 typedef struct {
 357   SPIN_LOCK    *SpinLock;
 358   UINT32       MsrIndex;
 359 } MP_MSR_LOCK;
 360
 361 #define SMM_PSD_OFFSET              0xfb00
 362
 363 ///
 364 /// All global semaphores' pointer
 365 ///
 366 typedef struct {
 367   volatile UINT32      *Counter;
 368   volatile BOOLEAN     *InsideSmm;
 369   volatile BOOLEAN     *AllCpusInSync;
 370   SPIN_LOCK            *PFLock;
 371   SPIN_LOCK            *CodeAccessCheckLock;
 372   SPIN_LOCK            *MemoryMappedLock;
 373 } SMM_CPU_SEMAPHORE_GLOBAL;
 374
 375 ///
 376 /// All semaphores for each processor
 377 ///
 378 typedef struct {
 379   SPIN_LOCK                         *Busy;
 380   volatile UINT32                   *Run;
 381   volatile BOOLEAN                  *Present;
 382 } SMM_CPU_SEMAPHORE_CPU;
 383
 384 ///
 385 /// All MSRs semaphores' pointer and counter
 386 ///
 387 typedef struct {
 388   SPIN_LOCK            *Msr;
 389   UINTN                AvailableCounter;
 390 } SMM_CPU_SEMAPHORE_MSR;
 391
 392 ///
 393 /// All semaphores' information
 394 ///
 395 typedef struct {
 396   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;
 397   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;
 398   SMM_CPU_SEMAPHORE_MSR             SemaphoreMsr;
 399 } SMM_CPU_SEMAPHORES;
 400
 401 extern IA32_DESCRIPTOR                     gcSmiGdtr;
 402 extern EFI_PHYSICAL_ADDRESS                mGdtBuffer;
 403 extern UINTN                               mGdtBufferSize;
 404 extern IA32_DESCRIPTOR                     gcSmiIdtr;
 405 extern VOID                                *gcSmiIdtrPtr;
 406 extern UINT64                              gPhyMask;
 407 extern SMM_DISPATCHER_MP_SYNC_DATA         *mSmmMpSyncData;
 408 extern UINTN                               mSmmStackArrayBase;
 409 extern UINTN                               mSmmStackArrayEnd;
 410 extern UINTN                               mSmmStackSize;
 411 extern EFI_SMM_CPU_SERVICE_PROTOCOL        mSmmCpuService;
 412 extern IA32_DESCRIPTOR                     gcSmiInitGdtr;
 413 extern SMM_CPU_SEMAPHORES                  mSmmCpuSemaphores;
 414 extern UINTN                               mSemaphoreSize;
 415 extern SPIN_LOCK                           *mPFLock;
 416 extern SPIN_LOCK                           *mConfigSmmCodeAccessCheckLock;
 417 extern SPIN_LOCK                           *mMemoryMappedLock;
 418
 419 //
 420 // Copy of the PcdPteMemoryEncryptionAddressOrMask
 421 //
 422 extern UINT64  mAddressEncMask;
 423
 424 /**
 425   Create 4G PageTable in SMRAM.
 426
 427   @param[in]      Is32BitPageTable Whether the page table is 32-bit PAE
 428   @return         PageTable Address
 429
 430 **/
 431 UINT32
 432 Gen4GPageTable (
 433   IN      BOOLEAN                   Is32BitPageTable
 434   );
 435
 436
 437 /**
 438   Initialize global data for MP synchronization.
 439
 440   @param Stacks       Base address of SMI stack buffer for all processors.
 441   @param StackSize    Stack size for each processor in SMM.
 442
 443 **/
 444 UINT32
 445 InitializeMpServiceData (
 446   IN VOID        *Stacks,
 447   IN UINTN       StackSize
 448   );
 449
 450 /**
 451   Initialize Timer for SMM AP Sync.
 452
 453 **/
 454 VOID
 455 InitializeSmmTimer (
 456   VOID
 457   );
 458
 459 /**
 460   Start Timer for SMM AP Sync.
 461
 462 **/
 463 UINT64
 464 EFIAPI
 465 StartSyncTimer (
 466   VOID
 467   );
 468
 469 /**
 470   Check if the SMM AP Sync timer is timeout.
 471
 472   @param Timer  The start timer from the begin.
 473
 474 **/
 475 BOOLEAN
 476 EFIAPI
 477 IsSyncTimerTimeout (
 478   IN      UINT64                    Timer
 479   );
 480
 481 /**
 482   Initialize IDT for SMM Stack Guard.
 483
 484 **/
 485 VOID
 486 EFIAPI
 487 InitializeIDTSmmStackGuard (
 488   VOID
 489   );
 490
 491 /**
 492   Initialize Gdt for all processors.
 493
 494   @param[in]   Cr3          CR3 value.
 495   @param[out]  GdtStepSize  The step size for GDT table.
 496
 497   @return GdtBase for processor 0.
 498           GdtBase for processor X is: GdtBase + (GdtStepSize * X)
 499 **/
 500 VOID *
 501 InitGdt (
 502   IN  UINTN  Cr3,
 503   OUT UINTN  *GdtStepSize
 504   );
 505
 506 /**
 507   This function sets GDT/IDT buffer to be RO and XP.
 508 **/
 509 VOID
 510 PatchGdtIdtMap (
 511   VOID
 512   );
 513
 514 /**
 515
 516   Register the SMM Foundation entry point.
 517
 518   @param          This              Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
 519   @param          SmmEntryPoint     SMM Foundation EntryPoint
 520
 521   @retval         EFI_SUCCESS       Successfully to register SMM foundation entry point
 522
 523 **/
 524 EFI_STATUS
 525 EFIAPI
 526 RegisterSmmEntry (
 527   IN CONST EFI_SMM_CONFIGURATION_PROTOCOL  *This,
 528   IN EFI_SMM_ENTRY_POINT                   SmmEntryPoint
 529   );
 530
 531 /**
 532   Create PageTable for SMM use.
 533
 534   @return     PageTable Address
 535
 536 **/
 537 UINT32
 538 SmmInitPageTable (
 539   VOID
 540   );
 541
 542 /**
 543   Schedule a procedure to run on the specified CPU.
 544
 545   @param   Procedure        The address of the procedure to run
 546   @param   CpuIndex         Target CPU number
 547   @param   ProcArguments    The parameter to pass to the procedure
 548
 549   @retval   EFI_INVALID_PARAMETER    CpuNumber not valid
 550   @retval   EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 551   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 552   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 553   @retval   EFI_SUCCESS - The procedure has been successfully scheduled
 554
 555 **/
 556 EFI_STATUS
 557 EFIAPI
 558 SmmStartupThisAp (
 559   IN      EFI_AP_PROCEDURE          Procedure,
 560   IN      UINTN                     CpuIndex,
 561   IN OUT  VOID                      *ProcArguments OPTIONAL
 562   );
 563
 564 /**
 565   Schedule a procedure to run on the specified CPU in a blocking fashion.
 566
 567   @param  Procedure                The address of the procedure to run
 568   @param  CpuIndex                 Target CPU Index
 569   @param  ProcArguments            The parameter to pass to the procedure
 570
 571   @retval EFI_INVALID_PARAMETER    CpuNumber not valid
 572   @retval EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 573   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 574   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 575   @retval EFI_SUCCESS              The procedure has been successfully scheduled
 576
 577 **/
 578 EFI_STATUS
 579 EFIAPI
 580 SmmBlockingStartupThisAp (
 581   IN      EFI_AP_PROCEDURE          Procedure,
 582   IN      UINTN                     CpuIndex,
 583   IN OUT  VOID                      *ProcArguments OPTIONAL
 584   );
 585
 586 /**
 587   This function sets the attributes for the memory region specified by BaseAddress and
 588   Length from their current attributes to the attributes specified by Attributes.
 589
 590   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 591   @param[in]  Length           The size in bytes of the memory region.
 592   @param[in]  Attributes       The bit mask of attributes to set for the memory region.
 593
 594   @retval EFI_SUCCESS           The attributes were set for the memory region.
 595   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 596                                 BaseAddress and Length cannot be modified.
 597   @retval EFI_INVALID_PARAMETER Length is zero.
 598                                 Attributes specified an illegal combination of attributes that
 599                                 cannot be set together.
 600   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 601                                 the memory resource range.
 602   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 603                                 resource range specified by BaseAddress and Length.
 604                                 The bit mask of attributes is not support for the memory resource
 605                                 range specified by BaseAddress and Length.
 606
 607 **/
 608 EFI_STATUS
 609 EFIAPI
 610 SmmSetMemoryAttributes (
 611   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 612   IN  UINT64                                     Length,
 613   IN  UINT64                                     Attributes
 614   );
 615
 616 /**
 617   This function clears the attributes for the memory region specified by BaseAddress and
 618   Length from their current attributes to the attributes specified by Attributes.
 619
 620   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 621   @param[in]  Length           The size in bytes of the memory region.
 622   @param[in]  Attributes       The bit mask of attributes to clear for the memory region.
 623
 624   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 625   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 626                                 BaseAddress and Length cannot be modified.
 627   @retval EFI_INVALID_PARAMETER Length is zero.
 628                                 Attributes specified an illegal combination of attributes that
 629                                 cannot be set together.
 630   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 631                                 the memory resource range.
 632   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 633                                 resource range specified by BaseAddress and Length.
 634                                 The bit mask of attributes is not support for the memory resource
 635                                 range specified by BaseAddress and Length.
 636
 637 **/
 638 EFI_STATUS
 639 EFIAPI
 640 SmmClearMemoryAttributes (
 641   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 642   IN  UINT64                                     Length,
 643   IN  UINT64                                     Attributes
 644   );
 645
 646 /**
 647   Initialize MP synchronization data.
 648
 649 **/
 650 VOID
 651 EFIAPI
 652 InitializeMpSyncData (
 653   VOID
 654   );
 655
 656 /**
 657
 658   Find out SMRAM information including SMRR base and SMRR size.
 659
 660   @param          SmrrBase          SMRR base
 661   @param          SmrrSize          SMRR size
 662
 663 **/
 664 VOID
 665 FindSmramInfo (
 666   OUT UINT32   *SmrrBase,
 667   OUT UINT32   *SmrrSize
 668   );
 669
 670 /**
 671   Relocate SmmBases for each processor.
 672
 673   Execute on first boot and all S3 resumes
 674
 675 **/
 676 VOID
 677 EFIAPI
 678 SmmRelocateBases (
 679   VOID
 680   );
 681
 682 /**
 683   Page Fault handler for SMM use.
 684
 685   @param  InterruptType    Defines the type of interrupt or exception that
 686                            occurred on the processor.This parameter is processor architecture specific.
 687   @param  SystemContext    A pointer to the processor context when
 688                            the interrupt occurred on the processor.
 689 **/
 690 VOID
 691 EFIAPI
 692 SmiPFHandler (
 693     IN EFI_EXCEPTION_TYPE   InterruptType,
 694     IN EFI_SYSTEM_CONTEXT   SystemContext
 695   );
 696
 697 /**
 698   Perform the remaining tasks.
 699
 700 **/
 701 VOID
 702 PerformRemainingTasks (
 703   VOID
 704   );
 705
 706 /**
 707   Perform the pre tasks.
 708
 709 **/
 710 VOID
 711 PerformPreTasks (
 712   VOID
 713   );
 714
 715 /**
 716   Initialize MSR spin lock by MSR index.
 717
 718   @param  MsrIndex       MSR index value.
 719
 720 **/
 721 VOID
 722 InitMsrSpinLockByIndex (
 723   IN UINT32      MsrIndex
 724   );
 725
 726 /**
 727   Hook return address of SMM Save State so that semaphore code
 728   can be executed immediately after AP exits SMM to indicate to
 729   the BSP that an AP has exited SMM after SMBASE relocation.
 730
 731   @param[in] CpuIndex     The processor index.
 732   @param[in] RebasedFlag  A pointer to a flag that is set to TRUE
 733                           immediately after AP exits SMM.
 734
 735 **/
 736 VOID
 737 SemaphoreHook (
 738   IN UINTN             CpuIndex,
 739   IN volatile BOOLEAN  *RebasedFlag
 740   );
 741
 742 /**
 743 Configure SMM Code Access Check feature for all processors.
 744 SMM Feature Control MSR will be locked after configuration.
 745 **/
 746 VOID
 747 ConfigSmmCodeAccessCheck (
 748   VOID
 749   );
 750
 751 /**
 752   Hook the code executed immediately after an RSM instruction on the currently
 753   executing CPU.  The mode of code executed immediately after RSM must be
 754   detected, and the appropriate hook must be selected.  Always clear the auto
 755   HALT restart flag if it is set.
 756
 757   @param[in] CpuIndex                 The processor index for the currently
 758                                       executing CPU.
 759   @param[in] CpuState                 Pointer to SMRAM Save State Map for the
 760                                       currently executing CPU.
 761   @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
 762                                       32-bit mode from 64-bit SMM.
 763   @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
 764                                       same mode as SMM.
 765
 766   @retval The value of the original instruction pointer before it was hooked.
 767
 768 **/
 769 UINT64
 770 EFIAPI
 771 HookReturnFromSmm (
 772   IN UINTN              CpuIndex,
 773   SMRAM_SAVE_STATE_MAP  *CpuState,
 774   UINT64                NewInstructionPointer32,
 775   UINT64                NewInstructionPointer
 776   );
 777
 778 /**
 779   Get the size of the SMI Handler in bytes.
 780
 781   @retval The size, in bytes, of the SMI Handler.
 782
 783 **/
 784 UINTN
 785 EFIAPI
 786 GetSmiHandlerSize (
 787   VOID
 788   );
 789
 790 /**
 791   Install the SMI handler for the CPU specified by CpuIndex.  This function
 792   is called by the CPU that was elected as monarch during System Management
 793   Mode initialization.
 794
 795   @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
 796                         The value must be between 0 and the NumberOfCpus field
 797                         in the System Management System Table (SMST).
 798   @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
 799   @param[in] SmiStack   The stack to use when an SMI is processed by the
 800                         the CPU specified by CpuIndex.
 801   @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
 802                         processed by the CPU specified by CpuIndex.
 803   @param[in] GdtBase    The base address of the GDT to use when an SMI is
 804                         processed by the CPU specified by CpuIndex.
 805   @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
 806                         processed by the CPU specified by CpuIndex.
 807   @param[in] IdtBase    The base address of the IDT to use when an SMI is
 808                         processed by the CPU specified by CpuIndex.
 809   @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
 810                         processed by the CPU specified by CpuIndex.
 811   @param[in] Cr3        The base address of the page tables to use when an SMI
 812                         is processed by the CPU specified by CpuIndex.
 813 **/
 814 VOID
 815 EFIAPI
 816 InstallSmiHandler (
 817   IN UINTN   CpuIndex,
 818   IN UINT32  SmBase,
 819   IN VOID    *SmiStack,
 820   IN UINTN   StackSize,
 821   IN UINTN   GdtBase,
 822   IN UINTN   GdtSize,
 823   IN UINTN   IdtBase,
 824   IN UINTN   IdtSize,
 825   IN UINT32  Cr3
 826   );
 827
 828 /**
 829   Search module name by input IP address and output it.
 830
 831   @param CallerIpAddress   Caller instruction pointer.
 832
 833 **/
 834 VOID
 835 DumpModuleInfoByIp (
 836   IN  UINTN              CallerIpAddress
 837   );
 838
 839 /**
 840   This function sets memory attribute according to MemoryAttributesTable.
 841 **/
 842 VOID
 843 SetMemMapAttributes (
 844   VOID
 845   );
 846
 847 /**
 848   This function sets UEFI memory attribute according to UEFI memory map.
 849 **/
 850 VOID
 851 SetUefiMemMapAttributes (
 852   VOID
 853   );
 854
 855 /**
 856   Return if the Address is forbidden as SMM communication buffer.
 857
 858   @param[in] Address the address to be checked
 859
 860   @return TRUE  The address is forbidden as SMM communication buffer.
 861   @return FALSE The address is allowed as SMM communication buffer.
 862 **/
 863 BOOLEAN
 864 IsSmmCommBufferForbiddenAddress (
 865   IN UINT64  Address
 866   );
 867
 868 /**
 869   This function caches the UEFI memory map information.
 870 **/
 871 VOID
 872 GetUefiMemoryMap (
 873   VOID
 874   );
 875
 876 /**
 877   This function sets memory attribute for page table.
 878 **/
 879 VOID
 880 SetPageTableAttributes (
 881   VOID
 882   );
 883
 884 /**
 885   Return page table base.
 886
 887   @return page table base.
 888 **/
 889 UINTN
 890 GetPageTableBase (
 891   VOID
 892   );
 893
 894 /**
 895   This function sets the attributes for the memory region specified by BaseAddress and
 896   Length from their current attributes to the attributes specified by Attributes.
 897
 898   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 899   @param[in]   Length           The size in bytes of the memory region.
 900   @param[in]   Attributes       The bit mask of attributes to set for the memory region.
 901   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 902
 903   @retval EFI_SUCCESS           The attributes were set for the memory region.
 904   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 905                                 BaseAddress and Length cannot be modified.
 906   @retval EFI_INVALID_PARAMETER Length is zero.
 907                                 Attributes specified an illegal combination of attributes that
 908                                 cannot be set together.
 909   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 910                                 the memory resource range.
 911   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 912                                 resource range specified by BaseAddress and Length.
 913                                 The bit mask of attributes is not support for the memory resource
 914                                 range specified by BaseAddress and Length.
 915
 916 **/
 917 EFI_STATUS
 918 EFIAPI
 919 SmmSetMemoryAttributesEx (
 920   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 921   IN  UINT64                                     Length,
 922   IN  UINT64                                     Attributes,
 923   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 924   );
 925
 926 /**
 927   This function clears the attributes for the memory region specified by BaseAddress and
 928   Length from their current attributes to the attributes specified by Attributes.
 929
 930   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 931   @param[in]   Length           The size in bytes of the memory region.
 932   @param[in]   Attributes       The bit mask of attributes to clear for the memory region.
 933   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 934
 935   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 936   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 937                                 BaseAddress and Length cannot be modified.
 938   @retval EFI_INVALID_PARAMETER Length is zero.
 939                                 Attributes specified an illegal combination of attributes that
 940                                 cannot be set together.
 941   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 942                                 the memory resource range.
 943   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 944                                 resource range specified by BaseAddress and Length.
 945                                 The bit mask of attributes is not support for the memory resource
 946                                 range specified by BaseAddress and Length.
 947
 948 **/
 949 EFI_STATUS
 950 EFIAPI
 951 SmmClearMemoryAttributesEx (
 952   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 953   IN  UINT64                                     Length,
 954   IN  UINT64                                     Attributes,
 955   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 956   );
 957
 958 /**
 959   This API provides a way to allocate memory for page table.
 960
 961   This API can be called more once to allocate memory for page tables.
 962
 963   Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
 964   allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
 965   is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
 966   returned.
 967
 968   @param  Pages                 The number of 4 KB pages to allocate.
 969
 970   @return A pointer to the allocated buffer or NULL if allocation fails.
 971
 972 **/
 973 VOID *
 974 AllocatePageTableMemory (
 975   IN UINTN           Pages
 976   );
 977
 978 /**
 979   Allocate pages for code.
 980
 981   @param[in]  Pages Number of pages to be allocated.
 982
 983   @return Allocated memory.
 984 **/
 985 VOID *
 986 AllocateCodePages (
 987   IN UINTN           Pages
 988   );
 989
 990 /**
 991   Allocate aligned pages for code.
 992
 993   @param[in]  Pages                 Number of pages to be allocated.
 994   @param[in]  Alignment             The requested alignment of the allocation.
 995                                     Must be a power of two.
 996                                     If Alignment is zero, then byte alignment is used.
 997
 998   @return Allocated memory.
 999 **/
1000 VOID *
1001 AllocateAlignedCodePages (
1002   IN UINTN            Pages,
1003   IN UINTN            Alignment
1004   );
1005
1006
1007 //
1008 // S3 related global variable and function prototype.
1009 //
1010
1011 extern BOOLEAN                mSmmS3Flag;
1012
1013 /**
1014   Initialize SMM S3 resume state structure used during S3 Resume.
1015
1016   @param[in] Cr3    The base address of the page tables to use in SMM.
1017
1018 **/
1019 VOID
1020 InitSmmS3ResumeState (
1021   IN UINT32  Cr3
1022   );
1023
1024 /**
1025   Get ACPI CPU data.
1026
1027 **/
1028 VOID
1029 GetAcpiCpuData (
1030   VOID
1031   );
1032
1033 /**
1034   Restore SMM Configuration in S3 boot path.
1035
1036 **/
1037 VOID
1038 RestoreSmmConfigurationInS3 (
1039   VOID
1040   );
1041
1042 /**
1043   Get ACPI S3 enable flag.
1044
1045 **/
1046 VOID
1047 GetAcpiS3EnableFlag (
1048   VOID
1049   );
1050
1051 /**
1052   Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1053
1054   @param[in] ApHltLoopCode          The address of the safe hlt-loop function.
1055   @param[in] TopOfStack             A pointer to the new stack to use for the ApHltLoopCode.
1056   @param[in] NumberToFinishAddress  Address of Semaphore of APs finish count.
1057
1058 **/
1059 VOID
1060 TransferApToSafeState (
1061   IN UINTN  ApHltLoopCode,
1062   IN UINTN  TopOfStack,
1063   IN UINTN  NumberToFinishAddress
1064   );
1065
1066 #endif