UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h

   1 /** @file
   2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
   3
   4 Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
   5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   6
   7 This program and the accompanying materials
   8 are licensed and made available under the terms and conditions of the BSD License
   9 which accompanies this distribution.  The full text of the license may be found at
  10 http://opensource.org/licenses/bsd-license.php
  11
  12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #ifndef _CPU_PISMMCPUDXESMM_H_
  18 #define _CPU_PISMMCPUDXESMM_H_
  19
  20 #include <PiSmm.h>
  21
  22 #include <Protocol/MpService.h>
  23 #include <Protocol/SmmConfiguration.h>
  24 #include <Protocol/SmmCpu.h>
  25 #include <Protocol/SmmAccess2.h>
  26 #include <Protocol/SmmReadyToLock.h>
  27 #include <Protocol/SmmCpuService.h>
  28 #include <Protocol/SmmMemoryAttribute.h>
  29
  30 #include <Guid/AcpiS3Context.h>
  31 #include <Guid/MemoryAttributesTable.h>
  32 #include <Guid/PiSmmMemoryAttributesTable.h>
  33
  34 #include <Library/BaseLib.h>
  35 #include <Library/IoLib.h>
  36 #include <Library/TimerLib.h>
  37 #include <Library/SynchronizationLib.h>
  38 #include <Library/DebugLib.h>
  39 #include <Library/BaseMemoryLib.h>
  40 #include <Library/PcdLib.h>
  41 #include <Library/MtrrLib.h>
  42 #include <Library/SmmCpuPlatformHookLib.h>
  43 #include <Library/SmmServicesTableLib.h>
  44 #include <Library/MemoryAllocationLib.h>
  45 #include <Library/UefiBootServicesTableLib.h>
  46 #include <Library/UefiRuntimeServicesTableLib.h>
  47 #include <Library/DebugAgentLib.h>
  48 #include <Library/UefiLib.h>
  49 #include <Library/HobLib.h>
  50 #include <Library/LocalApicLib.h>
  51 #include <Library/UefiCpuLib.h>
  52 #include <Library/CpuExceptionHandlerLib.h>
  53 #include <Library/ReportStatusCodeLib.h>
  54 #include <Library/SmmCpuFeaturesLib.h>
  55 #include <Library/PeCoffGetEntryPointLib.h>
  56 #include <Library/RegisterCpuFeaturesLib.h>
  57
  58 #include <AcpiCpuData.h>
  59 #include <CpuHotPlugData.h>
  60
  61 #include <Register/Cpuid.h>
  62 #include <Register/Msr.h>
  63
  64 #include "CpuService.h"
  65 #include "SmmProfile.h"
  66
  67 //
  68 // CET definition
  69 //
  70 #define CPUID_CET_SS   BIT7
  71 #define CPUID_CET_IBT  BIT20
  72
  73 #define CR4_CET_ENABLE  BIT23
  74
  75 #define MSR_IA32_S_CET                     0x6A2
  76 #define MSR_IA32_PL0_SSP                   0x6A4
  77 #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR  0x6A8
  78
  79 typedef union {
  80   struct {
  81     // enable shadow stacks
  82     UINT32  SH_STK_ENP:1;
  83     // enable the WRSS{D,Q}W instructions.
  84     UINT32  WR_SHSTK_EN:1;
  85     // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
  86     UINT32  ENDBR_EN:1;
  87     // enable legacy compatibility treatment for indirect call/jmp tracking.
  88     UINT32  LEG_IW_EN:1;
  89     // enable use of no-track prefix on indirect call/jmp.
  90     UINT32  NO_TRACK_EN:1;
  91     // disable suppression of CET indirect branch tracking on legacy compatibility.
  92     UINT32  SUPPRESS_DIS:1;
  93     UINT32  RSVD:4;
  94     // indirect branch tracking is suppressed.
  95     // This bit can be written to 1 only if TRACKER is written as IDLE.
  96     UINT32  SUPPRESS:1;
  97     // Value of the endbranch state machine
  98     // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
  99     UINT32  TRACKER:1;
 100     // linear address of a bitmap in memory indicating valid
 101     // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
 102     // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
 103     // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
 104     // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
 105     // (this automatically aligns the address on a 4-Kbyte boundary).
 106     UINT32  EB_LEG_BITMAP_BASE_low:12;
 107     UINT32  EB_LEG_BITMAP_BASE_high:32;
 108   } Bits;
 109   UINT64   Uint64;
 110 } MSR_IA32_CET;
 111
 112 //
 113 // MSRs required for configuration of SMM Code Access Check
 114 //
 115 #define EFI_MSR_SMM_MCA_CAP                    0x17D
 116 #define  SMM_CODE_ACCESS_CHK_BIT               BIT58
 117
 118 #define  SMM_FEATURE_CONTROL_LOCK_BIT          BIT0
 119 #define  SMM_CODE_CHK_EN_BIT                   BIT2
 120
 121 ///
 122 /// Page Table Entry
 123 ///
 124 #define IA32_PG_P                   BIT0
 125 #define IA32_PG_RW                  BIT1
 126 #define IA32_PG_U                   BIT2
 127 #define IA32_PG_WT                  BIT3
 128 #define IA32_PG_CD                  BIT4
 129 #define IA32_PG_A                   BIT5
 130 #define IA32_PG_D                   BIT6
 131 #define IA32_PG_PS                  BIT7
 132 #define IA32_PG_PAT_2M              BIT12
 133 #define IA32_PG_PAT_4K              IA32_PG_PS
 134 #define IA32_PG_PMNT                BIT62
 135 #define IA32_PG_NX                  BIT63
 136
 137 #define PAGE_ATTRIBUTE_BITS         (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
 138 //
 139 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
 140 // X64 PAE PDPTE does not have such restriction
 141 //
 142 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS    (IA32_PG_P)
 143
 144 #define PAGE_PROGATE_BITS           (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
 145
 146 #define PAGING_4K_MASK  0xFFF
 147 #define PAGING_2M_MASK  0x1FFFFF
 148 #define PAGING_1G_MASK  0x3FFFFFFF
 149
 150 #define PAGING_PAE_INDEX_MASK  0x1FF
 151
 152 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
 153 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
 154 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
 155
 156 #define SMRR_MAX_ADDRESS       BASE_4GB
 157
 158 typedef enum {
 159   PageNone,
 160   Page4K,
 161   Page2M,
 162   Page1G,
 163 } PAGE_ATTRIBUTE;
 164
 165 typedef struct {
 166   PAGE_ATTRIBUTE   Attribute;
 167   UINT64           Length;
 168   UINT64           AddressMask;
 169 } PAGE_ATTRIBUTE_TABLE;
 170
 171 //
 172 // Size of Task-State Segment defined in IA32 Manual
 173 //
 174 #define TSS_SIZE              104
 175 #define EXCEPTION_TSS_SIZE    (TSS_SIZE + 4) // Add 4 bytes SSP
 176 #define TSS_X64_IST1_OFFSET   36
 177 #define TSS_IA32_CR3_OFFSET   28
 178 #define TSS_IA32_ESP_OFFSET   56
 179 #define TSS_IA32_SSP_OFFSET   104
 180
 181 #define CR0_WP                BIT16
 182
 183 //
 184 // Code select value
 185 //
 186 #define PROTECT_MODE_CODE_SEGMENT          0x08
 187 #define LONG_MODE_CODE_SEGMENT             0x38
 188
 189 //
 190 // The size 0x20 must be bigger than
 191 // the size of template code of SmmInit. Currently,
 192 // the size of SmmInit requires the 0x16 Bytes buffer
 193 // at least.
 194 //
 195 #define BACK_BUF_SIZE  0x20
 196
 197 #define EXCEPTION_VECTOR_NUMBER     0x20
 198
 199 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
 200
 201 typedef UINT32                              SMM_CPU_ARRIVAL_EXCEPTIONS;
 202 #define ARRIVAL_EXCEPTION_BLOCKED           0x1
 203 #define ARRIVAL_EXCEPTION_DELAYED           0x2
 204 #define ARRIVAL_EXCEPTION_SMI_DISABLED      0x4
 205
 206 //
 207 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
 208 // Contains the SMM Configuration Protocols that is produced.
 209 // Contains a mix of DXE and SMM contents.  All the fields must be used properly.
 210 //
 211 #define SMM_CPU_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'c', 'p', 'u')
 212
 213 typedef struct {
 214   UINTN                           Signature;
 215
 216   EFI_HANDLE                      SmmCpuHandle;
 217
 218   EFI_PROCESSOR_INFORMATION       *ProcessorInfo;
 219   SMM_CPU_OPERATION               *Operation;
 220   UINTN                           *CpuSaveStateSize;
 221   VOID                            **CpuSaveState;
 222
 223   EFI_SMM_RESERVED_SMRAM_REGION   SmmReservedSmramRegion[1];
 224   EFI_SMM_ENTRY_CONTEXT           SmmCoreEntryContext;
 225   EFI_SMM_ENTRY_POINT             SmmCoreEntry;
 226
 227   EFI_SMM_CONFIGURATION_PROTOCOL  SmmConfiguration;
 228 } SMM_CPU_PRIVATE_DATA;
 229
 230 extern SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate;
 231 extern CPU_HOT_PLUG_DATA      mCpuHotPlugData;
 232 extern UINTN                  mMaxNumberOfCpus;
 233 extern UINTN                  mNumberOfCpus;
 234 extern EFI_SMM_CPU_PROTOCOL   mSmmCpu;
 235
 236 ///
 237 /// The mode of the CPU at the time an SMI occurs
 238 ///
 239 extern UINT8  mSmmSaveStateRegisterLma;
 240
 241 //
 242 // SMM CPU Protocol function prototypes.
 243 //
 244
 245 /**
 246   Read information from the CPU save state.
 247
 248   @param  This      EFI_SMM_CPU_PROTOCOL instance
 249   @param  Width     The number of bytes to read from the CPU save state.
 250   @param  Register  Specifies the CPU register to read form the save state.
 251   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 252   @param  Buffer    Upon return, this holds the CPU register value read from the save state.
 253
 254   @retval EFI_SUCCESS   The register was read from Save State
 255   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 256   @retval EFI_INVALID_PARAMTER   This or Buffer is NULL.
 257
 258 **/
 259 EFI_STATUS
 260 EFIAPI
 261 SmmReadSaveState (
 262   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 263   IN UINTN                              Width,
 264   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 265   IN UINTN                              CpuIndex,
 266   OUT VOID                              *Buffer
 267   );
 268
 269 /**
 270   Write data to the CPU save state.
 271
 272   @param  This      EFI_SMM_CPU_PROTOCOL instance
 273   @param  Width     The number of bytes to read from the CPU save state.
 274   @param  Register  Specifies the CPU register to write to the save state.
 275   @param  CpuIndex  Specifies the zero-based index of the CPU save state
 276   @param  Buffer    Upon entry, this holds the new CPU register value.
 277
 278   @retval EFI_SUCCESS   The register was written from Save State
 279   @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
 280   @retval EFI_INVALID_PARAMTER   ProcessorIndex or Width is not correct
 281
 282 **/
 283 EFI_STATUS
 284 EFIAPI
 285 SmmWriteSaveState (
 286   IN CONST EFI_SMM_CPU_PROTOCOL         *This,
 287   IN UINTN                              Width,
 288   IN EFI_SMM_SAVE_STATE_REGISTER        Register,
 289   IN UINTN                              CpuIndex,
 290   IN CONST VOID                         *Buffer
 291   );
 292
 293 /**
 294 Read a CPU Save State register on the target processor.
 295
 296 This function abstracts the differences that whether the CPU Save State register is in the
 297 IA32 CPU Save State Map or X64 CPU Save State Map.
 298
 299 This function supports reading a CPU Save State register in SMBase relocation handler.
 300
 301 @param[in]  CpuIndex       Specifies the zero-based index of the CPU save state.
 302 @param[in]  RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 303 @param[in]  Width          The number of bytes to read from the CPU save state.
 304 @param[out] Buffer         Upon return, this holds the CPU register value read from the save state.
 305
 306 @retval EFI_SUCCESS           The register was read from Save State.
 307 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 308 @retval EFI_INVALID_PARAMTER  This or Buffer is NULL.
 309
 310 **/
 311 EFI_STATUS
 312 EFIAPI
 313 ReadSaveStateRegister (
 314   IN UINTN                        CpuIndex,
 315   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 316   IN UINTN                        Width,
 317   OUT VOID                        *Buffer
 318   );
 319
 320 /**
 321 Write value to a CPU Save State register on the target processor.
 322
 323 This function abstracts the differences that whether the CPU Save State register is in the
 324 IA32 CPU Save State Map or X64 CPU Save State Map.
 325
 326 This function supports writing a CPU Save State register in SMBase relocation handler.
 327
 328 @param[in] CpuIndex       Specifies the zero-based index of the CPU save state.
 329 @param[in] RegisterIndex  Index into mSmmCpuWidthOffset[] look up table.
 330 @param[in] Width          The number of bytes to read from the CPU save state.
 331 @param[in] Buffer         Upon entry, this holds the new CPU register value.
 332
 333 @retval EFI_SUCCESS           The register was written to Save State.
 334 @retval EFI_NOT_FOUND         The register is not defined for the Save State of Processor.
 335 @retval EFI_INVALID_PARAMTER  ProcessorIndex or Width is not correct.
 336
 337 **/
 338 EFI_STATUS
 339 EFIAPI
 340 WriteSaveStateRegister (
 341   IN UINTN                        CpuIndex,
 342   IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 343   IN UINTN                        Width,
 344   IN CONST VOID                   *Buffer
 345   );
 346
 347 extern CONST UINT8                  gcSmmInitTemplate[];
 348 extern CONST UINT16                 gcSmmInitSize;
 349 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr0;
 350 extern UINT32                       mSmmCr0;
 351 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr3;
 352 extern UINT32                       mSmmCr4;
 353 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr4;
 354 X86_ASSEMBLY_PATCH_LABEL            gPatchSmmInitStack;
 355 X86_ASSEMBLY_PATCH_LABEL            mPatchCetSupported;
 356 extern BOOLEAN                      mCetSupported;
 357
 358 /**
 359   Semaphore operation for all processor relocate SMMBase.
 360 **/
 361 VOID
 362 EFIAPI
 363 SmmRelocationSemaphoreComplete (
 364   VOID
 365   );
 366
 367 ///
 368 /// The type of SMM CPU Information
 369 ///
 370 typedef struct {
 371   SPIN_LOCK                         *Busy;
 372   volatile EFI_AP_PROCEDURE         Procedure;
 373   volatile VOID                     *Parameter;
 374   volatile UINT32                   *Run;
 375   volatile BOOLEAN                  *Present;
 376 } SMM_CPU_DATA_BLOCK;
 377
 378 typedef enum {
 379   SmmCpuSyncModeTradition,
 380   SmmCpuSyncModeRelaxedAp,
 381   SmmCpuSyncModeMax
 382 } SMM_CPU_SYNC_MODE;
 383
 384 typedef struct {
 385   //
 386   // Pointer to an array. The array should be located immediately after this structure
 387   // so that UC cache-ability can be set together.
 388   //
 389   SMM_CPU_DATA_BLOCK            *CpuData;
 390   volatile UINT32               *Counter;
 391   volatile UINT32               BspIndex;
 392   volatile BOOLEAN              *InsideSmm;
 393   volatile BOOLEAN              *AllCpusInSync;
 394   volatile SMM_CPU_SYNC_MODE    EffectiveSyncMode;
 395   volatile BOOLEAN              SwitchBsp;
 396   volatile BOOLEAN              *CandidateBsp;
 397 } SMM_DISPATCHER_MP_SYNC_DATA;
 398
 399 #define SMM_PSD_OFFSET              0xfb00
 400
 401 ///
 402 /// All global semaphores' pointer
 403 ///
 404 typedef struct {
 405   volatile UINT32      *Counter;
 406   volatile BOOLEAN     *InsideSmm;
 407   volatile BOOLEAN     *AllCpusInSync;
 408   SPIN_LOCK            *PFLock;
 409   SPIN_LOCK            *CodeAccessCheckLock;
 410 } SMM_CPU_SEMAPHORE_GLOBAL;
 411
 412 ///
 413 /// All semaphores for each processor
 414 ///
 415 typedef struct {
 416   SPIN_LOCK                         *Busy;
 417   volatile UINT32                   *Run;
 418   volatile BOOLEAN                  *Present;
 419 } SMM_CPU_SEMAPHORE_CPU;
 420
 421 ///
 422 /// All semaphores' information
 423 ///
 424 typedef struct {
 425   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;
 426   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;
 427 } SMM_CPU_SEMAPHORES;
 428
 429 extern IA32_DESCRIPTOR                     gcSmiGdtr;
 430 extern EFI_PHYSICAL_ADDRESS                mGdtBuffer;
 431 extern UINTN                               mGdtBufferSize;
 432 extern IA32_DESCRIPTOR                     gcSmiIdtr;
 433 extern VOID                                *gcSmiIdtrPtr;
 434 extern UINT64                              gPhyMask;
 435 extern SMM_DISPATCHER_MP_SYNC_DATA         *mSmmMpSyncData;
 436 extern UINTN                               mSmmStackArrayBase;
 437 extern UINTN                               mSmmStackArrayEnd;
 438 extern UINTN                               mSmmStackSize;
 439 extern EFI_SMM_CPU_SERVICE_PROTOCOL        mSmmCpuService;
 440 extern IA32_DESCRIPTOR                     gcSmiInitGdtr;
 441 extern SMM_CPU_SEMAPHORES                  mSmmCpuSemaphores;
 442 extern UINTN                               mSemaphoreSize;
 443 extern SPIN_LOCK                           *mPFLock;
 444 extern SPIN_LOCK                           *mConfigSmmCodeAccessCheckLock;
 445 extern EFI_SMRAM_DESCRIPTOR                *mSmmCpuSmramRanges;
 446 extern UINTN                               mSmmCpuSmramRangeCount;
 447 extern UINT8                               mPhysicalAddressBits;
 448
 449 //
 450 // Copy of the PcdPteMemoryEncryptionAddressOrMask
 451 //
 452 extern UINT64  mAddressEncMask;
 453
 454 /**
 455   Create 4G PageTable in SMRAM.
 456
 457   @param[in]      Is32BitPageTable Whether the page table is 32-bit PAE
 458   @return         PageTable Address
 459
 460 **/
 461 UINT32
 462 Gen4GPageTable (
 463   IN      BOOLEAN                   Is32BitPageTable
 464   );
 465
 466
 467 /**
 468   Initialize global data for MP synchronization.
 469
 470   @param Stacks             Base address of SMI stack buffer for all processors.
 471   @param StackSize          Stack size for each processor in SMM.
 472   @param ShadowStackSize    Shadow Stack size for each processor in SMM.
 473
 474 **/
 475 UINT32
 476 InitializeMpServiceData (
 477   IN VOID        *Stacks,
 478   IN UINTN       StackSize,
 479   IN UINTN       ShadowStackSize
 480   );
 481
 482 /**
 483   Initialize Timer for SMM AP Sync.
 484
 485 **/
 486 VOID
 487 InitializeSmmTimer (
 488   VOID
 489   );
 490
 491 /**
 492   Start Timer for SMM AP Sync.
 493
 494 **/
 495 UINT64
 496 EFIAPI
 497 StartSyncTimer (
 498   VOID
 499   );
 500
 501 /**
 502   Check if the SMM AP Sync timer is timeout.
 503
 504   @param Timer  The start timer from the begin.
 505
 506 **/
 507 BOOLEAN
 508 EFIAPI
 509 IsSyncTimerTimeout (
 510   IN      UINT64                    Timer
 511   );
 512
 513 /**
 514   Initialize IDT for SMM Stack Guard.
 515
 516 **/
 517 VOID
 518 EFIAPI
 519 InitializeIDTSmmStackGuard (
 520   VOID
 521   );
 522
 523 /**
 524   Initialize Gdt for all processors.
 525
 526   @param[in]   Cr3          CR3 value.
 527   @param[out]  GdtStepSize  The step size for GDT table.
 528
 529   @return GdtBase for processor 0.
 530           GdtBase for processor X is: GdtBase + (GdtStepSize * X)
 531 **/
 532 VOID *
 533 InitGdt (
 534   IN  UINTN  Cr3,
 535   OUT UINTN  *GdtStepSize
 536   );
 537
 538 /**
 539
 540   Register the SMM Foundation entry point.
 541
 542   @param          This              Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
 543   @param          SmmEntryPoint     SMM Foundation EntryPoint
 544
 545   @retval         EFI_SUCCESS       Successfully to register SMM foundation entry point
 546
 547 **/
 548 EFI_STATUS
 549 EFIAPI
 550 RegisterSmmEntry (
 551   IN CONST EFI_SMM_CONFIGURATION_PROTOCOL  *This,
 552   IN EFI_SMM_ENTRY_POINT                   SmmEntryPoint
 553   );
 554
 555 /**
 556   Create PageTable for SMM use.
 557
 558   @return     PageTable Address
 559
 560 **/
 561 UINT32
 562 SmmInitPageTable (
 563   VOID
 564   );
 565
 566 /**
 567   Schedule a procedure to run on the specified CPU.
 568
 569   @param   Procedure        The address of the procedure to run
 570   @param   CpuIndex         Target CPU number
 571   @param   ProcArguments    The parameter to pass to the procedure
 572
 573   @retval   EFI_INVALID_PARAMETER    CpuNumber not valid
 574   @retval   EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 575   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 576   @retval   EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 577   @retval   EFI_SUCCESS - The procedure has been successfully scheduled
 578
 579 **/
 580 EFI_STATUS
 581 EFIAPI
 582 SmmStartupThisAp (
 583   IN      EFI_AP_PROCEDURE          Procedure,
 584   IN      UINTN                     CpuIndex,
 585   IN OUT  VOID                      *ProcArguments OPTIONAL
 586   );
 587
 588 /**
 589   Schedule a procedure to run on the specified CPU in a blocking fashion.
 590
 591   @param  Procedure                The address of the procedure to run
 592   @param  CpuIndex                 Target CPU Index
 593   @param  ProcArguments            The parameter to pass to the procedure
 594
 595   @retval EFI_INVALID_PARAMETER    CpuNumber not valid
 596   @retval EFI_INVALID_PARAMETER    CpuNumber specifying BSP
 597   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber did not enter SMM
 598   @retval EFI_INVALID_PARAMETER    The AP specified by CpuNumber is busy
 599   @retval EFI_SUCCESS              The procedure has been successfully scheduled
 600
 601 **/
 602 EFI_STATUS
 603 EFIAPI
 604 SmmBlockingStartupThisAp (
 605   IN      EFI_AP_PROCEDURE          Procedure,
 606   IN      UINTN                     CpuIndex,
 607   IN OUT  VOID                      *ProcArguments OPTIONAL
 608   );
 609
 610 /**
 611   This function sets the attributes for the memory region specified by BaseAddress and
 612   Length from their current attributes to the attributes specified by Attributes.
 613
 614   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 615   @param[in]  Length           The size in bytes of the memory region.
 616   @param[in]  Attributes       The bit mask of attributes to set for the memory region.
 617
 618   @retval EFI_SUCCESS           The attributes were set for the memory region.
 619   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 620                                 BaseAddress and Length cannot be modified.
 621   @retval EFI_INVALID_PARAMETER Length is zero.
 622                                 Attributes specified an illegal combination of attributes that
 623                                 cannot be set together.
 624   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 625                                 the memory resource range.
 626   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 627                                 resource range specified by BaseAddress and Length.
 628                                 The bit mask of attributes is not support for the memory resource
 629                                 range specified by BaseAddress and Length.
 630
 631 **/
 632 EFI_STATUS
 633 EFIAPI
 634 SmmSetMemoryAttributes (
 635   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 636   IN  UINT64                                     Length,
 637   IN  UINT64                                     Attributes
 638   );
 639
 640 /**
 641   This function clears the attributes for the memory region specified by BaseAddress and
 642   Length from their current attributes to the attributes specified by Attributes.
 643
 644   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
 645   @param[in]  Length           The size in bytes of the memory region.
 646   @param[in]  Attributes       The bit mask of attributes to clear for the memory region.
 647
 648   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 649   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 650                                 BaseAddress and Length cannot be modified.
 651   @retval EFI_INVALID_PARAMETER Length is zero.
 652                                 Attributes specified an illegal combination of attributes that
 653                                 cannot be set together.
 654   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 655                                 the memory resource range.
 656   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 657                                 resource range specified by BaseAddress and Length.
 658                                 The bit mask of attributes is not support for the memory resource
 659                                 range specified by BaseAddress and Length.
 660
 661 **/
 662 EFI_STATUS
 663 EFIAPI
 664 SmmClearMemoryAttributes (
 665   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 666   IN  UINT64                                     Length,
 667   IN  UINT64                                     Attributes
 668   );
 669
 670 /**
 671   Initialize MP synchronization data.
 672
 673 **/
 674 VOID
 675 EFIAPI
 676 InitializeMpSyncData (
 677   VOID
 678   );
 679
 680 /**
 681
 682   Find out SMRAM information including SMRR base and SMRR size.
 683
 684   @param          SmrrBase          SMRR base
 685   @param          SmrrSize          SMRR size
 686
 687 **/
 688 VOID
 689 FindSmramInfo (
 690   OUT UINT32   *SmrrBase,
 691   OUT UINT32   *SmrrSize
 692   );
 693
 694 /**
 695   Relocate SmmBases for each processor.
 696
 697   Execute on first boot and all S3 resumes
 698
 699 **/
 700 VOID
 701 EFIAPI
 702 SmmRelocateBases (
 703   VOID
 704   );
 705
 706 /**
 707   Page Fault handler for SMM use.
 708
 709   @param  InterruptType    Defines the type of interrupt or exception that
 710                            occurred on the processor.This parameter is processor architecture specific.
 711   @param  SystemContext    A pointer to the processor context when
 712                            the interrupt occurred on the processor.
 713 **/
 714 VOID
 715 EFIAPI
 716 SmiPFHandler (
 717   IN EFI_EXCEPTION_TYPE   InterruptType,
 718   IN EFI_SYSTEM_CONTEXT   SystemContext
 719   );
 720
 721 /**
 722   Perform the remaining tasks.
 723
 724 **/
 725 VOID
 726 PerformRemainingTasks (
 727   VOID
 728   );
 729
 730 /**
 731   Perform the pre tasks.
 732
 733 **/
 734 VOID
 735 PerformPreTasks (
 736   VOID
 737   );
 738
 739 /**
 740   Initialize MSR spin lock by MSR index.
 741
 742   @param  MsrIndex       MSR index value.
 743
 744 **/
 745 VOID
 746 InitMsrSpinLockByIndex (
 747   IN UINT32      MsrIndex
 748   );
 749
 750 /**
 751   Hook return address of SMM Save State so that semaphore code
 752   can be executed immediately after AP exits SMM to indicate to
 753   the BSP that an AP has exited SMM after SMBASE relocation.
 754
 755   @param[in] CpuIndex     The processor index.
 756   @param[in] RebasedFlag  A pointer to a flag that is set to TRUE
 757                           immediately after AP exits SMM.
 758
 759 **/
 760 VOID
 761 SemaphoreHook (
 762   IN UINTN             CpuIndex,
 763   IN volatile BOOLEAN  *RebasedFlag
 764   );
 765
 766 /**
 767 Configure SMM Code Access Check feature for all processors.
 768 SMM Feature Control MSR will be locked after configuration.
 769 **/
 770 VOID
 771 ConfigSmmCodeAccessCheck (
 772   VOID
 773   );
 774
 775 /**
 776   Hook the code executed immediately after an RSM instruction on the currently
 777   executing CPU.  The mode of code executed immediately after RSM must be
 778   detected, and the appropriate hook must be selected.  Always clear the auto
 779   HALT restart flag if it is set.
 780
 781   @param[in] CpuIndex                 The processor index for the currently
 782                                       executing CPU.
 783   @param[in] CpuState                 Pointer to SMRAM Save State Map for the
 784                                       currently executing CPU.
 785   @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
 786                                       32-bit mode from 64-bit SMM.
 787   @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
 788                                       same mode as SMM.
 789
 790   @retval The value of the original instruction pointer before it was hooked.
 791
 792 **/
 793 UINT64
 794 EFIAPI
 795 HookReturnFromSmm (
 796   IN UINTN              CpuIndex,
 797   SMRAM_SAVE_STATE_MAP  *CpuState,
 798   UINT64                NewInstructionPointer32,
 799   UINT64                NewInstructionPointer
 800   );
 801
 802 /**
 803   Get the size of the SMI Handler in bytes.
 804
 805   @retval The size, in bytes, of the SMI Handler.
 806
 807 **/
 808 UINTN
 809 EFIAPI
 810 GetSmiHandlerSize (
 811   VOID
 812   );
 813
 814 /**
 815   Install the SMI handler for the CPU specified by CpuIndex.  This function
 816   is called by the CPU that was elected as monarch during System Management
 817   Mode initialization.
 818
 819   @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
 820                         The value must be between 0 and the NumberOfCpus field
 821                         in the System Management System Table (SMST).
 822   @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
 823   @param[in] SmiStack   The stack to use when an SMI is processed by the
 824                         the CPU specified by CpuIndex.
 825   @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
 826                         processed by the CPU specified by CpuIndex.
 827   @param[in] GdtBase    The base address of the GDT to use when an SMI is
 828                         processed by the CPU specified by CpuIndex.
 829   @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
 830                         processed by the CPU specified by CpuIndex.
 831   @param[in] IdtBase    The base address of the IDT to use when an SMI is
 832                         processed by the CPU specified by CpuIndex.
 833   @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
 834                         processed by the CPU specified by CpuIndex.
 835   @param[in] Cr3        The base address of the page tables to use when an SMI
 836                         is processed by the CPU specified by CpuIndex.
 837 **/
 838 VOID
 839 EFIAPI
 840 InstallSmiHandler (
 841   IN UINTN   CpuIndex,
 842   IN UINT32  SmBase,
 843   IN VOID    *SmiStack,
 844   IN UINTN   StackSize,
 845   IN UINTN   GdtBase,
 846   IN UINTN   GdtSize,
 847   IN UINTN   IdtBase,
 848   IN UINTN   IdtSize,
 849   IN UINT32  Cr3
 850   );
 851
 852 /**
 853   Search module name by input IP address and output it.
 854
 855   @param CallerIpAddress   Caller instruction pointer.
 856
 857 **/
 858 VOID
 859 DumpModuleInfoByIp (
 860   IN  UINTN              CallerIpAddress
 861   );
 862
 863 /**
 864   This function sets memory attribute according to MemoryAttributesTable.
 865 **/
 866 VOID
 867 SetMemMapAttributes (
 868   VOID
 869   );
 870
 871 /**
 872   This function sets UEFI memory attribute according to UEFI memory map.
 873 **/
 874 VOID
 875 SetUefiMemMapAttributes (
 876   VOID
 877   );
 878
 879 /**
 880   Return if the Address is forbidden as SMM communication buffer.
 881
 882   @param[in] Address the address to be checked
 883
 884   @return TRUE  The address is forbidden as SMM communication buffer.
 885   @return FALSE The address is allowed as SMM communication buffer.
 886 **/
 887 BOOLEAN
 888 IsSmmCommBufferForbiddenAddress (
 889   IN UINT64  Address
 890   );
 891
 892 /**
 893   This function caches the UEFI memory map information.
 894 **/
 895 VOID
 896 GetUefiMemoryMap (
 897   VOID
 898   );
 899
 900 /**
 901   This function sets memory attribute for page table.
 902 **/
 903 VOID
 904 SetPageTableAttributes (
 905   VOID
 906   );
 907
 908 /**
 909   Return page table base.
 910
 911   @return page table base.
 912 **/
 913 UINTN
 914 GetPageTableBase (
 915   VOID
 916   );
 917
 918 /**
 919   This function sets the attributes for the memory region specified by BaseAddress and
 920   Length from their current attributes to the attributes specified by Attributes.
 921
 922   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 923   @param[in]   Length           The size in bytes of the memory region.
 924   @param[in]   Attributes       The bit mask of attributes to set for the memory region.
 925   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 926
 927   @retval EFI_SUCCESS           The attributes were set for the memory region.
 928   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 929                                 BaseAddress and Length cannot be modified.
 930   @retval EFI_INVALID_PARAMETER Length is zero.
 931                                 Attributes specified an illegal combination of attributes that
 932                                 cannot be set together.
 933   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 934                                 the memory resource range.
 935   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 936                                 resource range specified by BaseAddress and Length.
 937                                 The bit mask of attributes is not support for the memory resource
 938                                 range specified by BaseAddress and Length.
 939
 940 **/
 941 EFI_STATUS
 942 EFIAPI
 943 SmmSetMemoryAttributesEx (
 944   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 945   IN  UINT64                                     Length,
 946   IN  UINT64                                     Attributes,
 947   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 948   );
 949
 950 /**
 951   This function clears the attributes for the memory region specified by BaseAddress and
 952   Length from their current attributes to the attributes specified by Attributes.
 953
 954   @param[in]   BaseAddress      The physical address that is the start address of a memory region.
 955   @param[in]   Length           The size in bytes of the memory region.
 956   @param[in]   Attributes       The bit mask of attributes to clear for the memory region.
 957   @param[out]  IsSplitted       TRUE means page table splitted. FALSE means page table not splitted.
 958
 959   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
 960   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
 961                                 BaseAddress and Length cannot be modified.
 962   @retval EFI_INVALID_PARAMETER Length is zero.
 963                                 Attributes specified an illegal combination of attributes that
 964                                 cannot be set together.
 965   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
 966                                 the memory resource range.
 967   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
 968                                 resource range specified by BaseAddress and Length.
 969                                 The bit mask of attributes is not support for the memory resource
 970                                 range specified by BaseAddress and Length.
 971
 972 **/
 973 EFI_STATUS
 974 EFIAPI
 975 SmmClearMemoryAttributesEx (
 976   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
 977   IN  UINT64                                     Length,
 978   IN  UINT64                                     Attributes,
 979   OUT BOOLEAN                                    *IsSplitted  OPTIONAL
 980   );
 981
 982 /**
 983   This API provides a way to allocate memory for page table.
 984
 985   This API can be called more once to allocate memory for page tables.
 986
 987   Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
 988   allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
 989   is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
 990   returned.
 991
 992   @param  Pages                 The number of 4 KB pages to allocate.
 993
 994   @return A pointer to the allocated buffer or NULL if allocation fails.
 995
 996 **/
 997 VOID *
 998 AllocatePageTableMemory (
 999   IN UINTN           Pages
1000   );
1001
1002 /**
1003   Allocate pages for code.
1004
1005   @param[in]  Pages Number of pages to be allocated.
1006
1007   @return Allocated memory.
1008 **/
1009 VOID *
1010 AllocateCodePages (
1011   IN UINTN           Pages
1012   );
1013
1014 /**
1015   Allocate aligned pages for code.
1016
1017   @param[in]  Pages                 Number of pages to be allocated.
1018   @param[in]  Alignment             The requested alignment of the allocation.
1019                                     Must be a power of two.
1020                                     If Alignment is zero, then byte alignment is used.
1021
1022   @return Allocated memory.
1023 **/
1024 VOID *
1025 AllocateAlignedCodePages (
1026   IN UINTN            Pages,
1027   IN UINTN            Alignment
1028   );
1029
1030
1031 //
1032 // S3 related global variable and function prototype.
1033 //
1034
1035 extern BOOLEAN                mSmmS3Flag;
1036
1037 /**
1038   Initialize SMM S3 resume state structure used during S3 Resume.
1039
1040   @param[in] Cr3    The base address of the page tables to use in SMM.
1041
1042 **/
1043 VOID
1044 InitSmmS3ResumeState (
1045   IN UINT32  Cr3
1046   );
1047
1048 /**
1049   Get ACPI CPU data.
1050
1051 **/
1052 VOID
1053 GetAcpiCpuData (
1054   VOID
1055   );
1056
1057 /**
1058   Restore SMM Configuration in S3 boot path.
1059
1060 **/
1061 VOID
1062 RestoreSmmConfigurationInS3 (
1063   VOID
1064   );
1065
1066 /**
1067   Get ACPI S3 enable flag.
1068
1069 **/
1070 VOID
1071 GetAcpiS3EnableFlag (
1072   VOID
1073   );
1074
1075 /**
1076   Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1077
1078   @param[in] ApHltLoopCode          The address of the safe hlt-loop function.
1079   @param[in] TopOfStack             A pointer to the new stack to use for the ApHltLoopCode.
1080   @param[in] NumberToFinishAddress  Address of Semaphore of APs finish count.
1081
1082 **/
1083 VOID
1084 TransferApToSafeState (
1085   IN UINTN  ApHltLoopCode,
1086   IN UINTN  TopOfStack,
1087   IN UINTN  NumberToFinishAddress
1088   );
1089
1090 /**
1091   Set ShadowStack memory.
1092
1093   @param[in]  Cr3              The page table base address.
1094   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
1095   @param[in]  Length           The size in bytes of the memory region.
1096
1097   @retval EFI_SUCCESS           The shadow stack memory is set.
1098 **/
1099 EFI_STATUS
1100 SetShadowStack (
1101   IN  UINTN                                      Cr3,
1102   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
1103   IN  UINT64                                     Length
1104   );
1105
1106 /**
1107   Set not present memory.
1108
1109   @param[in]  Cr3              The page table base address.
1110   @param[in]  BaseAddress      The physical address that is the start address of a memory region.
1111   @param[in]  Length           The size in bytes of the memory region.
1112
1113   @retval EFI_SUCCESS           The not present memory is set.
1114 **/
1115 EFI_STATUS
1116 SetNotPresentPage (
1117   IN  UINTN                                      Cr3,
1118   IN  EFI_PHYSICAL_ADDRESS                       BaseAddress,
1119   IN  UINT64                                     Length
1120   );
1121
1122 /**
1123   Initialize the shadow stack related data structure.
1124
1125   @param CpuIndex     The index of CPU.
1126   @param ShadowStack  The bottom of the shadow stack for this CPU.
1127 **/
1128 VOID
1129 InitShadowStack (
1130   IN UINTN  CpuIndex,
1131   IN VOID   *ShadowStack
1132   );
1133
1134 /**
1135   This function set given attributes of the memory region specified by
1136   BaseAddress and Length.
1137
1138   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1139   @param  BaseAddress       The physical address that is the start address of
1140                             a memory region.
1141   @param  Length            The size in bytes of the memory region.
1142   @param  Attributes        The bit mask of attributes to set for the memory
1143                             region.
1144
1145   @retval EFI_SUCCESS           The attributes were set for the memory region.
1146   @retval EFI_INVALID_PARAMETER Length is zero.
1147                                 Attributes specified an illegal combination of
1148                                 attributes that cannot be set together.
1149   @retval EFI_UNSUPPORTED       The processor does not support one or more
1150                                 bytes of the memory resource range specified
1151                                 by BaseAddress and Length.
1152                                 The bit mask of attributes is not supported for
1153                                 the memory resource range specified by
1154                                 BaseAddress and Length.
1155
1156 **/
1157 EFI_STATUS
1158 EFIAPI
1159 EdkiiSmmSetMemoryAttributes (
1160   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1161   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1162   IN  UINT64                                Length,
1163   IN  UINT64                                Attributes
1164   );
1165
1166 /**
1167   This function clears given attributes of the memory region specified by
1168   BaseAddress and Length.
1169
1170   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1171   @param  BaseAddress       The physical address that is the start address of
1172                             a memory region.
1173   @param  Length            The size in bytes of the memory region.
1174   @param  Attributes        The bit mask of attributes to clear for the memory
1175                             region.
1176
1177   @retval EFI_SUCCESS           The attributes were cleared for the memory region.
1178   @retval EFI_INVALID_PARAMETER Length is zero.
1179                                 Attributes specified an illegal combination of
1180                                 attributes that cannot be cleared together.
1181   @retval EFI_UNSUPPORTED       The processor does not support one or more
1182                                 bytes of the memory resource range specified
1183                                 by BaseAddress and Length.
1184                                 The bit mask of attributes is not supported for
1185                                 the memory resource range specified by
1186                                 BaseAddress and Length.
1187
1188 **/
1189 EFI_STATUS
1190 EFIAPI
1191 EdkiiSmmClearMemoryAttributes (
1192   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1193   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1194   IN  UINT64                                Length,
1195   IN  UINT64                                Attributes
1196   );
1197
1198 /**
1199   This function retrieves the attributes of the memory region specified by
1200   BaseAddress and Length. If different attributes are got from different part
1201   of the memory region, EFI_NO_MAPPING will be returned.
1202
1203   @param  This              The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1204   @param  BaseAddress       The physical address that is the start address of
1205                             a memory region.
1206   @param  Length            The size in bytes of the memory region.
1207   @param  Attributes        Pointer to attributes returned.
1208
1209   @retval EFI_SUCCESS           The attributes got for the memory region.
1210   @retval EFI_INVALID_PARAMETER Length is zero.
1211                                 Attributes is NULL.
1212   @retval EFI_NO_MAPPING        Attributes are not consistent cross the memory
1213                                 region.
1214   @retval EFI_UNSUPPORTED       The processor does not support one or more
1215                                 bytes of the memory resource range specified
1216                                 by BaseAddress and Length.
1217
1218 **/
1219 EFI_STATUS
1220 EFIAPI
1221 EdkiiSmmGetMemoryAttributes (
1222   IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL   *This,
1223   IN  EFI_PHYSICAL_ADDRESS                  BaseAddress,
1224   IN  UINT64                                Length,
1225   IN  UINT64                                *Attributes
1226   );
1227
1228 /**
1229   This function fixes up the address of the global variable or function
1230   referred in SmmInit assembly files to be the absoute address.
1231 **/
1232 VOID
1233 EFIAPI
1234 PiSmmCpuSmmInitFixupAddress (
1235  );
1236
1237 /**
1238   This function fixes up the address of the global variable or function
1239   referred in SmiEntry assembly files to be the absoute address.
1240 **/
1241 VOID
1242 EFIAPI
1243 PiSmmCpuSmiEntryFixupAddress (
1244  );
1245
1246 #endif