a2babb987732ea15b5a712d19b0852cbe510e6ee
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / PiSmmCpuDxeSmm.h
1 /** @file
2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _CPU_PISMMCPUDXESMM_H_
18 #define _CPU_PISMMCPUDXESMM_H_
19
20 #include <PiSmm.h>
21
22 #include <Protocol/MpService.h>
23 #include <Protocol/SmmConfiguration.h>
24 #include <Protocol/SmmCpu.h>
25 #include <Protocol/SmmAccess2.h>
26 #include <Protocol/SmmReadyToLock.h>
27 #include <Protocol/SmmCpuService.h>
28 #include <Protocol/SmmMemoryAttribute.h>
29
30 #include <Guid/AcpiS3Context.h>
31 #include <Guid/PiSmmMemoryAttributesTable.h>
32
33 #include <Library/BaseLib.h>
34 #include <Library/IoLib.h>
35 #include <Library/TimerLib.h>
36 #include <Library/SynchronizationLib.h>
37 #include <Library/DebugLib.h>
38 #include <Library/BaseMemoryLib.h>
39 #include <Library/PcdLib.h>
40 #include <Library/CacheMaintenanceLib.h>
41 #include <Library/MtrrLib.h>
42 #include <Library/SmmCpuPlatformHookLib.h>
43 #include <Library/SmmServicesTableLib.h>
44 #include <Library/MemoryAllocationLib.h>
45 #include <Library/UefiBootServicesTableLib.h>
46 #include <Library/UefiRuntimeServicesTableLib.h>
47 #include <Library/DebugAgentLib.h>
48 #include <Library/HobLib.h>
49 #include <Library/LocalApicLib.h>
50 #include <Library/UefiCpuLib.h>
51 #include <Library/CpuExceptionHandlerLib.h>
52 #include <Library/ReportStatusCodeLib.h>
53 #include <Library/SmmCpuFeaturesLib.h>
54 #include <Library/PeCoffGetEntryPointLib.h>
55
56 #include <AcpiCpuData.h>
57 #include <CpuHotPlugData.h>
58
59 #include <Register/Cpuid.h>
60 #include <Register/Msr.h>
61
62 #include "CpuService.h"
63 #include "SmmProfile.h"
64
65 //
66 // MSRs required for configuration of SMM Code Access Check
67 //
68 #define EFI_MSR_SMM_MCA_CAP 0x17D
69 #define SMM_CODE_ACCESS_CHK_BIT BIT58
70
71 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
72 #define SMM_CODE_CHK_EN_BIT BIT2
73
74 ///
75 /// Page Table Entry
76 ///
77 #define IA32_PG_P BIT0
78 #define IA32_PG_RW BIT1
79 #define IA32_PG_U BIT2
80 #define IA32_PG_WT BIT3
81 #define IA32_PG_CD BIT4
82 #define IA32_PG_A BIT5
83 #define IA32_PG_D BIT6
84 #define IA32_PG_PS BIT7
85 #define IA32_PG_PAT_2M BIT12
86 #define IA32_PG_PAT_4K IA32_PG_PS
87 #define IA32_PG_PMNT BIT62
88 #define IA32_PG_NX BIT63
89
90 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
91 //
92 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
93 // X64 PAE PDPTE does not have such restriction
94 //
95 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
96
97 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
98
99 #define PAGING_4K_MASK 0xFFF
100 #define PAGING_2M_MASK 0x1FFFFF
101 #define PAGING_1G_MASK 0x3FFFFFFF
102
103 #define PAGING_PAE_INDEX_MASK 0x1FF
104
105 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
106 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
107 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
108
109 #define SMRR_MAX_ADDRESS BASE_4GB
110
111 typedef enum {
112 PageNone,
113 Page4K,
114 Page2M,
115 Page1G,
116 } PAGE_ATTRIBUTE;
117
118 typedef struct {
119 PAGE_ATTRIBUTE Attribute;
120 UINT64 Length;
121 UINT64 AddressMask;
122 } PAGE_ATTRIBUTE_TABLE;
123
124 //
125 // Size of Task-State Segment defined in IA32 Manual
126 //
127 #define TSS_SIZE 104
128 #define TSS_X64_IST1_OFFSET 36
129 #define TSS_IA32_CR3_OFFSET 28
130 #define TSS_IA32_ESP_OFFSET 56
131
132 #define CR0_WP BIT16
133
134 //
135 // Code select value
136 //
137 #define PROTECT_MODE_CODE_SEGMENT 0x08
138 #define LONG_MODE_CODE_SEGMENT 0x38
139
140 //
141 // The size 0x20 must be bigger than
142 // the size of template code of SmmInit. Currently,
143 // the size of SmmInit requires the 0x16 Bytes buffer
144 // at least.
145 //
146 #define BACK_BUF_SIZE 0x20
147
148 #define EXCEPTION_VECTOR_NUMBER 0x20
149
150 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
151
152 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;
153 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
154 #define ARRIVAL_EXCEPTION_DELAYED 0x2
155 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
156
157 //
158 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
159 // Contains the SMM Configuration Protocols that is produced.
160 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
161 //
162 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
163
164 typedef struct {
165 UINTN Signature;
166
167 EFI_HANDLE SmmCpuHandle;
168
169 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
170 SMM_CPU_OPERATION *Operation;
171 UINTN *CpuSaveStateSize;
172 VOID **CpuSaveState;
173
174 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
175 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
176 EFI_SMM_ENTRY_POINT SmmCoreEntry;
177
178 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
179 } SMM_CPU_PRIVATE_DATA;
180
181 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
182 extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
183 extern UINTN mMaxNumberOfCpus;
184 extern UINTN mNumberOfCpus;
185 extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
186
187 ///
188 /// The mode of the CPU at the time an SMI occurs
189 ///
190 extern UINT8 mSmmSaveStateRegisterLma;
191
192 //
193 // SMM CPU Protocol function prototypes.
194 //
195
196 /**
197 Read information from the CPU save state.
198
199 @param This EFI_SMM_CPU_PROTOCOL instance
200 @param Width The number of bytes to read from the CPU save state.
201 @param Register Specifies the CPU register to read form the save state.
202 @param CpuIndex Specifies the zero-based index of the CPU save state
203 @param Buffer Upon return, this holds the CPU register value read from the save state.
204
205 @retval EFI_SUCCESS The register was read from Save State
206 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
207 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
208
209 **/
210 EFI_STATUS
211 EFIAPI
212 SmmReadSaveState (
213 IN CONST EFI_SMM_CPU_PROTOCOL *This,
214 IN UINTN Width,
215 IN EFI_SMM_SAVE_STATE_REGISTER Register,
216 IN UINTN CpuIndex,
217 OUT VOID *Buffer
218 );
219
220 /**
221 Write data to the CPU save state.
222
223 @param This EFI_SMM_CPU_PROTOCOL instance
224 @param Width The number of bytes to read from the CPU save state.
225 @param Register Specifies the CPU register to write to the save state.
226 @param CpuIndex Specifies the zero-based index of the CPU save state
227 @param Buffer Upon entry, this holds the new CPU register value.
228
229 @retval EFI_SUCCESS The register was written from Save State
230 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
231 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct
232
233 **/
234 EFI_STATUS
235 EFIAPI
236 SmmWriteSaveState (
237 IN CONST EFI_SMM_CPU_PROTOCOL *This,
238 IN UINTN Width,
239 IN EFI_SMM_SAVE_STATE_REGISTER Register,
240 IN UINTN CpuIndex,
241 IN CONST VOID *Buffer
242 );
243
244 /**
245 Read a CPU Save State register on the target processor.
246
247 This function abstracts the differences that whether the CPU Save State register is in the
248 IA32 CPU Save State Map or X64 CPU Save State Map.
249
250 This function supports reading a CPU Save State register in SMBase relocation handler.
251
252 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
253 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
254 @param[in] Width The number of bytes to read from the CPU save state.
255 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
256
257 @retval EFI_SUCCESS The register was read from Save State.
258 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
259 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
260
261 **/
262 EFI_STATUS
263 EFIAPI
264 ReadSaveStateRegister (
265 IN UINTN CpuIndex,
266 IN EFI_SMM_SAVE_STATE_REGISTER Register,
267 IN UINTN Width,
268 OUT VOID *Buffer
269 );
270
271 /**
272 Write value to a CPU Save State register on the target processor.
273
274 This function abstracts the differences that whether the CPU Save State register is in the
275 IA32 CPU Save State Map or X64 CPU Save State Map.
276
277 This function supports writing a CPU Save State register in SMBase relocation handler.
278
279 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
280 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
281 @param[in] Width The number of bytes to read from the CPU save state.
282 @param[in] Buffer Upon entry, this holds the new CPU register value.
283
284 @retval EFI_SUCCESS The register was written to Save State.
285 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
286 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct.
287
288 **/
289 EFI_STATUS
290 EFIAPI
291 WriteSaveStateRegister (
292 IN UINTN CpuIndex,
293 IN EFI_SMM_SAVE_STATE_REGISTER Register,
294 IN UINTN Width,
295 IN CONST VOID *Buffer
296 );
297
298 //
299 //
300 //
301 typedef struct {
302 UINT32 Offset;
303 UINT16 Segment;
304 UINT16 Reserved;
305 } IA32_FAR_ADDRESS;
306
307 extern IA32_FAR_ADDRESS gSmmJmpAddr;
308
309 extern CONST UINT8 gcSmmInitTemplate[];
310 extern CONST UINT16 gcSmmInitSize;
311 extern UINT32 gSmmCr0;
312 extern UINT32 gSmmCr3;
313 extern UINT32 gSmmCr4;
314 extern UINTN gSmmInitStack;
315
316 /**
317 Semaphore operation for all processor relocate SMMBase.
318 **/
319 VOID
320 EFIAPI
321 SmmRelocationSemaphoreComplete (
322 VOID
323 );
324
325 ///
326 /// The type of SMM CPU Information
327 ///
328 typedef struct {
329 SPIN_LOCK *Busy;
330 volatile EFI_AP_PROCEDURE Procedure;
331 volatile VOID *Parameter;
332 volatile UINT32 *Run;
333 volatile BOOLEAN *Present;
334 } SMM_CPU_DATA_BLOCK;
335
336 typedef enum {
337 SmmCpuSyncModeTradition,
338 SmmCpuSyncModeRelaxedAp,
339 SmmCpuSyncModeMax
340 } SMM_CPU_SYNC_MODE;
341
342 typedef struct {
343 //
344 // Pointer to an array. The array should be located immediately after this structure
345 // so that UC cache-ability can be set together.
346 //
347 SMM_CPU_DATA_BLOCK *CpuData;
348 volatile UINT32 *Counter;
349 volatile UINT32 BspIndex;
350 volatile BOOLEAN *InsideSmm;
351 volatile BOOLEAN *AllCpusInSync;
352 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
353 volatile BOOLEAN SwitchBsp;
354 volatile BOOLEAN *CandidateBsp;
355 } SMM_DISPATCHER_MP_SYNC_DATA;
356
357 #define MSR_SPIN_LOCK_INIT_NUM 15
358
359 typedef struct {
360 SPIN_LOCK *SpinLock;
361 UINT32 MsrIndex;
362 } MP_MSR_LOCK;
363
364 #define SMM_PSD_OFFSET 0xfb00
365
366 ///
367 /// All global semaphores' pointer
368 ///
369 typedef struct {
370 volatile UINT32 *Counter;
371 volatile BOOLEAN *InsideSmm;
372 volatile BOOLEAN *AllCpusInSync;
373 SPIN_LOCK *PFLock;
374 SPIN_LOCK *CodeAccessCheckLock;
375 SPIN_LOCK *MemoryMappedLock;
376 } SMM_CPU_SEMAPHORE_GLOBAL;
377
378 ///
379 /// All semaphores for each processor
380 ///
381 typedef struct {
382 SPIN_LOCK *Busy;
383 volatile UINT32 *Run;
384 volatile BOOLEAN *Present;
385 } SMM_CPU_SEMAPHORE_CPU;
386
387 ///
388 /// All MSRs semaphores' pointer and counter
389 ///
390 typedef struct {
391 SPIN_LOCK *Msr;
392 UINTN AvailableCounter;
393 } SMM_CPU_SEMAPHORE_MSR;
394
395 ///
396 /// All semaphores' information
397 ///
398 typedef struct {
399 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
400 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
401 SMM_CPU_SEMAPHORE_MSR SemaphoreMsr;
402 } SMM_CPU_SEMAPHORES;
403
404 extern IA32_DESCRIPTOR gcSmiGdtr;
405 extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
406 extern UINTN mGdtBufferSize;
407 extern IA32_DESCRIPTOR gcSmiIdtr;
408 extern VOID *gcSmiIdtrPtr;
409 extern UINT64 gPhyMask;
410 extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
411 extern UINTN mSmmStackArrayBase;
412 extern UINTN mSmmStackArrayEnd;
413 extern UINTN mSmmStackSize;
414 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
415 extern IA32_DESCRIPTOR gcSmiInitGdtr;
416 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
417 extern UINTN mSemaphoreSize;
418 extern SPIN_LOCK *mPFLock;
419 extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
420 extern SPIN_LOCK *mMemoryMappedLock;
421 extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
422 extern UINTN mSmmCpuSmramRangeCount;
423 extern UINT8 mPhysicalAddressBits;
424
425 //
426 // Copy of the PcdPteMemoryEncryptionAddressOrMask
427 //
428 extern UINT64 mAddressEncMask;
429
430 /**
431 Create 4G PageTable in SMRAM.
432
433 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
434 @return PageTable Address
435
436 **/
437 UINT32
438 Gen4GPageTable (
439 IN BOOLEAN Is32BitPageTable
440 );
441
442
443 /**
444 Initialize global data for MP synchronization.
445
446 @param Stacks Base address of SMI stack buffer for all processors.
447 @param StackSize Stack size for each processor in SMM.
448
449 **/
450 UINT32
451 InitializeMpServiceData (
452 IN VOID *Stacks,
453 IN UINTN StackSize
454 );
455
456 /**
457 Initialize Timer for SMM AP Sync.
458
459 **/
460 VOID
461 InitializeSmmTimer (
462 VOID
463 );
464
465 /**
466 Start Timer for SMM AP Sync.
467
468 **/
469 UINT64
470 EFIAPI
471 StartSyncTimer (
472 VOID
473 );
474
475 /**
476 Check if the SMM AP Sync timer is timeout.
477
478 @param Timer The start timer from the begin.
479
480 **/
481 BOOLEAN
482 EFIAPI
483 IsSyncTimerTimeout (
484 IN UINT64 Timer
485 );
486
487 /**
488 Initialize IDT for SMM Stack Guard.
489
490 **/
491 VOID
492 EFIAPI
493 InitializeIDTSmmStackGuard (
494 VOID
495 );
496
497 /**
498 Initialize Gdt for all processors.
499
500 @param[in] Cr3 CR3 value.
501 @param[out] GdtStepSize The step size for GDT table.
502
503 @return GdtBase for processor 0.
504 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
505 **/
506 VOID *
507 InitGdt (
508 IN UINTN Cr3,
509 OUT UINTN *GdtStepSize
510 );
511
512 /**
513
514 Register the SMM Foundation entry point.
515
516 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
517 @param SmmEntryPoint SMM Foundation EntryPoint
518
519 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
520
521 **/
522 EFI_STATUS
523 EFIAPI
524 RegisterSmmEntry (
525 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
526 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
527 );
528
529 /**
530 Create PageTable for SMM use.
531
532 @return PageTable Address
533
534 **/
535 UINT32
536 SmmInitPageTable (
537 VOID
538 );
539
540 /**
541 Schedule a procedure to run on the specified CPU.
542
543 @param Procedure The address of the procedure to run
544 @param CpuIndex Target CPU number
545 @param ProcArguments The parameter to pass to the procedure
546
547 @retval EFI_INVALID_PARAMETER CpuNumber not valid
548 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
549 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
550 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
551 @retval EFI_SUCCESS - The procedure has been successfully scheduled
552
553 **/
554 EFI_STATUS
555 EFIAPI
556 SmmStartupThisAp (
557 IN EFI_AP_PROCEDURE Procedure,
558 IN UINTN CpuIndex,
559 IN OUT VOID *ProcArguments OPTIONAL
560 );
561
562 /**
563 Schedule a procedure to run on the specified CPU in a blocking fashion.
564
565 @param Procedure The address of the procedure to run
566 @param CpuIndex Target CPU Index
567 @param ProcArguments The parameter to pass to the procedure
568
569 @retval EFI_INVALID_PARAMETER CpuNumber not valid
570 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
571 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
572 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
573 @retval EFI_SUCCESS The procedure has been successfully scheduled
574
575 **/
576 EFI_STATUS
577 EFIAPI
578 SmmBlockingStartupThisAp (
579 IN EFI_AP_PROCEDURE Procedure,
580 IN UINTN CpuIndex,
581 IN OUT VOID *ProcArguments OPTIONAL
582 );
583
584 /**
585 This function sets the attributes for the memory region specified by BaseAddress and
586 Length from their current attributes to the attributes specified by Attributes.
587
588 @param[in] BaseAddress The physical address that is the start address of a memory region.
589 @param[in] Length The size in bytes of the memory region.
590 @param[in] Attributes The bit mask of attributes to set for the memory region.
591
592 @retval EFI_SUCCESS The attributes were set for the memory region.
593 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
594 BaseAddress and Length cannot be modified.
595 @retval EFI_INVALID_PARAMETER Length is zero.
596 Attributes specified an illegal combination of attributes that
597 cannot be set together.
598 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
599 the memory resource range.
600 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
601 resource range specified by BaseAddress and Length.
602 The bit mask of attributes is not support for the memory resource
603 range specified by BaseAddress and Length.
604
605 **/
606 EFI_STATUS
607 EFIAPI
608 SmmSetMemoryAttributes (
609 IN EFI_PHYSICAL_ADDRESS BaseAddress,
610 IN UINT64 Length,
611 IN UINT64 Attributes
612 );
613
614 /**
615 This function clears the attributes for the memory region specified by BaseAddress and
616 Length from their current attributes to the attributes specified by Attributes.
617
618 @param[in] BaseAddress The physical address that is the start address of a memory region.
619 @param[in] Length The size in bytes of the memory region.
620 @param[in] Attributes The bit mask of attributes to clear for the memory region.
621
622 @retval EFI_SUCCESS The attributes were cleared for the memory region.
623 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
624 BaseAddress and Length cannot be modified.
625 @retval EFI_INVALID_PARAMETER Length is zero.
626 Attributes specified an illegal combination of attributes that
627 cannot be set together.
628 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
629 the memory resource range.
630 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
631 resource range specified by BaseAddress and Length.
632 The bit mask of attributes is not support for the memory resource
633 range specified by BaseAddress and Length.
634
635 **/
636 EFI_STATUS
637 EFIAPI
638 SmmClearMemoryAttributes (
639 IN EFI_PHYSICAL_ADDRESS BaseAddress,
640 IN UINT64 Length,
641 IN UINT64 Attributes
642 );
643
644 /**
645 Initialize MP synchronization data.
646
647 **/
648 VOID
649 EFIAPI
650 InitializeMpSyncData (
651 VOID
652 );
653
654 /**
655
656 Find out SMRAM information including SMRR base and SMRR size.
657
658 @param SmrrBase SMRR base
659 @param SmrrSize SMRR size
660
661 **/
662 VOID
663 FindSmramInfo (
664 OUT UINT32 *SmrrBase,
665 OUT UINT32 *SmrrSize
666 );
667
668 /**
669 Relocate SmmBases for each processor.
670
671 Execute on first boot and all S3 resumes
672
673 **/
674 VOID
675 EFIAPI
676 SmmRelocateBases (
677 VOID
678 );
679
680 /**
681 Page Fault handler for SMM use.
682
683 @param InterruptType Defines the type of interrupt or exception that
684 occurred on the processor.This parameter is processor architecture specific.
685 @param SystemContext A pointer to the processor context when
686 the interrupt occurred on the processor.
687 **/
688 VOID
689 EFIAPI
690 SmiPFHandler (
691 IN EFI_EXCEPTION_TYPE InterruptType,
692 IN EFI_SYSTEM_CONTEXT SystemContext
693 );
694
695 /**
696 Perform the remaining tasks.
697
698 **/
699 VOID
700 PerformRemainingTasks (
701 VOID
702 );
703
704 /**
705 Perform the pre tasks.
706
707 **/
708 VOID
709 PerformPreTasks (
710 VOID
711 );
712
713 /**
714 Initialize MSR spin lock by MSR index.
715
716 @param MsrIndex MSR index value.
717
718 **/
719 VOID
720 InitMsrSpinLockByIndex (
721 IN UINT32 MsrIndex
722 );
723
724 /**
725 Hook return address of SMM Save State so that semaphore code
726 can be executed immediately after AP exits SMM to indicate to
727 the BSP that an AP has exited SMM after SMBASE relocation.
728
729 @param[in] CpuIndex The processor index.
730 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
731 immediately after AP exits SMM.
732
733 **/
734 VOID
735 SemaphoreHook (
736 IN UINTN CpuIndex,
737 IN volatile BOOLEAN *RebasedFlag
738 );
739
740 /**
741 Configure SMM Code Access Check feature for all processors.
742 SMM Feature Control MSR will be locked after configuration.
743 **/
744 VOID
745 ConfigSmmCodeAccessCheck (
746 VOID
747 );
748
749 /**
750 Hook the code executed immediately after an RSM instruction on the currently
751 executing CPU. The mode of code executed immediately after RSM must be
752 detected, and the appropriate hook must be selected. Always clear the auto
753 HALT restart flag if it is set.
754
755 @param[in] CpuIndex The processor index for the currently
756 executing CPU.
757 @param[in] CpuState Pointer to SMRAM Save State Map for the
758 currently executing CPU.
759 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
760 32-bit mode from 64-bit SMM.
761 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
762 same mode as SMM.
763
764 @retval The value of the original instruction pointer before it was hooked.
765
766 **/
767 UINT64
768 EFIAPI
769 HookReturnFromSmm (
770 IN UINTN CpuIndex,
771 SMRAM_SAVE_STATE_MAP *CpuState,
772 UINT64 NewInstructionPointer32,
773 UINT64 NewInstructionPointer
774 );
775
776 /**
777 Get the size of the SMI Handler in bytes.
778
779 @retval The size, in bytes, of the SMI Handler.
780
781 **/
782 UINTN
783 EFIAPI
784 GetSmiHandlerSize (
785 VOID
786 );
787
788 /**
789 Install the SMI handler for the CPU specified by CpuIndex. This function
790 is called by the CPU that was elected as monarch during System Management
791 Mode initialization.
792
793 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
794 The value must be between 0 and the NumberOfCpus field
795 in the System Management System Table (SMST).
796 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
797 @param[in] SmiStack The stack to use when an SMI is processed by the
798 the CPU specified by CpuIndex.
799 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
800 processed by the CPU specified by CpuIndex.
801 @param[in] GdtBase The base address of the GDT to use when an SMI is
802 processed by the CPU specified by CpuIndex.
803 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
804 processed by the CPU specified by CpuIndex.
805 @param[in] IdtBase The base address of the IDT to use when an SMI is
806 processed by the CPU specified by CpuIndex.
807 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
808 processed by the CPU specified by CpuIndex.
809 @param[in] Cr3 The base address of the page tables to use when an SMI
810 is processed by the CPU specified by CpuIndex.
811 **/
812 VOID
813 EFIAPI
814 InstallSmiHandler (
815 IN UINTN CpuIndex,
816 IN UINT32 SmBase,
817 IN VOID *SmiStack,
818 IN UINTN StackSize,
819 IN UINTN GdtBase,
820 IN UINTN GdtSize,
821 IN UINTN IdtBase,
822 IN UINTN IdtSize,
823 IN UINT32 Cr3
824 );
825
826 /**
827 Search module name by input IP address and output it.
828
829 @param CallerIpAddress Caller instruction pointer.
830
831 **/
832 VOID
833 DumpModuleInfoByIp (
834 IN UINTN CallerIpAddress
835 );
836
837 /**
838 This function sets memory attribute according to MemoryAttributesTable.
839 **/
840 VOID
841 SetMemMapAttributes (
842 VOID
843 );
844
845 /**
846 This function sets UEFI memory attribute according to UEFI memory map.
847 **/
848 VOID
849 SetUefiMemMapAttributes (
850 VOID
851 );
852
853 /**
854 Return if the Address is forbidden as SMM communication buffer.
855
856 @param[in] Address the address to be checked
857
858 @return TRUE The address is forbidden as SMM communication buffer.
859 @return FALSE The address is allowed as SMM communication buffer.
860 **/
861 BOOLEAN
862 IsSmmCommBufferForbiddenAddress (
863 IN UINT64 Address
864 );
865
866 /**
867 This function caches the UEFI memory map information.
868 **/
869 VOID
870 GetUefiMemoryMap (
871 VOID
872 );
873
874 /**
875 This function sets memory attribute for page table.
876 **/
877 VOID
878 SetPageTableAttributes (
879 VOID
880 );
881
882 /**
883 Return page table base.
884
885 @return page table base.
886 **/
887 UINTN
888 GetPageTableBase (
889 VOID
890 );
891
892 /**
893 This function sets the attributes for the memory region specified by BaseAddress and
894 Length from their current attributes to the attributes specified by Attributes.
895
896 @param[in] BaseAddress The physical address that is the start address of a memory region.
897 @param[in] Length The size in bytes of the memory region.
898 @param[in] Attributes The bit mask of attributes to set for the memory region.
899 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
900
901 @retval EFI_SUCCESS The attributes were set for the memory region.
902 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
903 BaseAddress and Length cannot be modified.
904 @retval EFI_INVALID_PARAMETER Length is zero.
905 Attributes specified an illegal combination of attributes that
906 cannot be set together.
907 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
908 the memory resource range.
909 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
910 resource range specified by BaseAddress and Length.
911 The bit mask of attributes is not support for the memory resource
912 range specified by BaseAddress and Length.
913
914 **/
915 EFI_STATUS
916 EFIAPI
917 SmmSetMemoryAttributesEx (
918 IN EFI_PHYSICAL_ADDRESS BaseAddress,
919 IN UINT64 Length,
920 IN UINT64 Attributes,
921 OUT BOOLEAN *IsSplitted OPTIONAL
922 );
923
924 /**
925 This function clears the attributes for the memory region specified by BaseAddress and
926 Length from their current attributes to the attributes specified by Attributes.
927
928 @param[in] BaseAddress The physical address that is the start address of a memory region.
929 @param[in] Length The size in bytes of the memory region.
930 @param[in] Attributes The bit mask of attributes to clear for the memory region.
931 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
932
933 @retval EFI_SUCCESS The attributes were cleared for the memory region.
934 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
935 BaseAddress and Length cannot be modified.
936 @retval EFI_INVALID_PARAMETER Length is zero.
937 Attributes specified an illegal combination of attributes that
938 cannot be set together.
939 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
940 the memory resource range.
941 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
942 resource range specified by BaseAddress and Length.
943 The bit mask of attributes is not support for the memory resource
944 range specified by BaseAddress and Length.
945
946 **/
947 EFI_STATUS
948 EFIAPI
949 SmmClearMemoryAttributesEx (
950 IN EFI_PHYSICAL_ADDRESS BaseAddress,
951 IN UINT64 Length,
952 IN UINT64 Attributes,
953 OUT BOOLEAN *IsSplitted OPTIONAL
954 );
955
956 /**
957 This API provides a way to allocate memory for page table.
958
959 This API can be called more once to allocate memory for page tables.
960
961 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
962 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
963 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
964 returned.
965
966 @param Pages The number of 4 KB pages to allocate.
967
968 @return A pointer to the allocated buffer or NULL if allocation fails.
969
970 **/
971 VOID *
972 AllocatePageTableMemory (
973 IN UINTN Pages
974 );
975
976 /**
977 Allocate pages for code.
978
979 @param[in] Pages Number of pages to be allocated.
980
981 @return Allocated memory.
982 **/
983 VOID *
984 AllocateCodePages (
985 IN UINTN Pages
986 );
987
988 /**
989 Allocate aligned pages for code.
990
991 @param[in] Pages Number of pages to be allocated.
992 @param[in] Alignment The requested alignment of the allocation.
993 Must be a power of two.
994 If Alignment is zero, then byte alignment is used.
995
996 @return Allocated memory.
997 **/
998 VOID *
999 AllocateAlignedCodePages (
1000 IN UINTN Pages,
1001 IN UINTN Alignment
1002 );
1003
1004
1005 //
1006 // S3 related global variable and function prototype.
1007 //
1008
1009 extern BOOLEAN mSmmS3Flag;
1010
1011 /**
1012 Initialize SMM S3 resume state structure used during S3 Resume.
1013
1014 @param[in] Cr3 The base address of the page tables to use in SMM.
1015
1016 **/
1017 VOID
1018 InitSmmS3ResumeState (
1019 IN UINT32 Cr3
1020 );
1021
1022 /**
1023 Get ACPI CPU data.
1024
1025 **/
1026 VOID
1027 GetAcpiCpuData (
1028 VOID
1029 );
1030
1031 /**
1032 Restore SMM Configuration in S3 boot path.
1033
1034 **/
1035 VOID
1036 RestoreSmmConfigurationInS3 (
1037 VOID
1038 );
1039
1040 /**
1041 Get ACPI S3 enable flag.
1042
1043 **/
1044 VOID
1045 GetAcpiS3EnableFlag (
1046 VOID
1047 );
1048
1049 /**
1050 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1051
1052 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1053 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1054 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1055
1056 **/
1057 VOID
1058 TransferApToSafeState (
1059 IN UINTN ApHltLoopCode,
1060 IN UINTN TopOfStack,
1061 IN UINTN NumberToFinishAddress
1062 );
1063
1064 /**
1065 This function set given attributes of the memory region specified by
1066 BaseAddress and Length.
1067
1068 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1069 @param BaseAddress The physical address that is the start address of
1070 a memory region.
1071 @param Length The size in bytes of the memory region.
1072 @param Attributes The bit mask of attributes to set for the memory
1073 region.
1074
1075 @retval EFI_SUCCESS The attributes were set for the memory region.
1076 @retval EFI_INVALID_PARAMETER Length is zero.
1077 Attributes specified an illegal combination of
1078 attributes that cannot be set together.
1079 @retval EFI_UNSUPPORTED The processor does not support one or more
1080 bytes of the memory resource range specified
1081 by BaseAddress and Length.
1082 The bit mask of attributes is not support for
1083 the memory resource range specified by
1084 BaseAddress and Length.
1085
1086 **/
1087 EFI_STATUS
1088 EFIAPI
1089 EdkiiSmmSetMemoryAttributes (
1090 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1091 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1092 IN UINT64 Length,
1093 IN UINT64 Attributes
1094 );
1095
1096 /**
1097 This function clears given attributes of the memory region specified by
1098 BaseAddress and Length.
1099
1100 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1101 @param BaseAddress The physical address that is the start address of
1102 a memory region.
1103 @param Length The size in bytes of the memory region.
1104 @param Attributes The bit mask of attributes to set for the memory
1105 region.
1106
1107 @retval EFI_SUCCESS The attributes were set for the memory region.
1108 @retval EFI_INVALID_PARAMETER Length is zero.
1109 Attributes specified an illegal combination of
1110 attributes that cannot be set together.
1111 @retval EFI_UNSUPPORTED The processor does not support one or more
1112 bytes of the memory resource range specified
1113 by BaseAddress and Length.
1114 The bit mask of attributes is not support for
1115 the memory resource range specified by
1116 BaseAddress and Length.
1117
1118 **/
1119 EFI_STATUS
1120 EFIAPI
1121 EdkiiSmmClearMemoryAttributes (
1122 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1123 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1124 IN UINT64 Length,
1125 IN UINT64 Attributes
1126 );
1127
1128 /**
1129 This function retrieve the attributes of the memory region specified by
1130 BaseAddress and Length. If different attributes are got from different part
1131 of the memory region, EFI_NO_MAPPING will be returned.
1132
1133 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1134 @param BaseAddress The physical address that is the start address of
1135 a memory region.
1136 @param Length The size in bytes of the memory region.
1137 @param Attributes Pointer to attributes returned.
1138
1139 @retval EFI_SUCCESS The attributes got for the memory region.
1140 @retval EFI_INVALID_PARAMETER Length is zero.
1141 Attributes is NULL.
1142 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1143 region.
1144 @retval EFI_UNSUPPORTED The processor does not support one or more
1145 bytes of the memory resource range specified
1146 by BaseAddress and Length.
1147 The bit mask of attributes is not support for
1148 the memory resource range specified by
1149 BaseAddress and Length.
1150
1151 **/
1152 EFI_STATUS
1153 EFIAPI
1154 EdkiiSmmGetMemoryAttributes (
1155 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1156 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1157 IN UINT64 Length,
1158 IN UINT64 *Attributes
1159 );
1160
1161 /**
1162 This function fixes up the address of the global variable or function
1163 referred in SmmInit assembly files to be the absoute address.
1164 **/
1165 VOID
1166 EFIAPI
1167 PiSmmCpuSmmInitFixupAddress (
1168 );
1169
1170 /**
1171 This function fixes up the address of the global variable or function
1172 referred in SmiEntry assembly files to be the absoute address.
1173 **/
1174 VOID
1175 EFIAPI
1176 PiSmmCpuSmiEntryFixupAddress (
1177 );
1178
1179 #endif