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1 /** @file
2 Coreboot PEI module include file.
3
4 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 /*
10 * This file is part of the libpayload project.
11 *
12 * Copyright (C) 2008 Advanced Micro Devices, Inc.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. The name of the author may not be used to endorse or promote products
23 * derived from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 */
37
38 #ifndef _COREBOOT_PEI_H_INCLUDED_
39 #define _COREBOOT_PEI_H_INCLUDED_
40
41 #if defined (_MSC_VER)
42 #pragma warning( disable : 4200 )
43 #endif
44
45 #define DYN_CBMEM_ALIGN_SIZE (4096)
46
47 #define IMD_ENTRY_MAGIC (~0xC0389481)
48 #define CBMEM_ENTRY_MAGIC (~0xC0389479)
49
50 struct cbmem_entry {
51 UINT32 magic;
52 UINT32 start;
53 UINT32 size;
54 UINT32 id;
55 };
56
57 struct cbmem_root {
58 UINT32 max_entries;
59 UINT32 num_entries;
60 UINT32 locked;
61 UINT32 size;
62 struct cbmem_entry entries[0];
63 };
64
65 struct imd_entry {
66 UINT32 magic;
67 UINT32 start_offset;
68 UINT32 size;
69 UINT32 id;
70 };
71
72 struct imd_root {
73 UINT32 max_entries;
74 UINT32 num_entries;
75 UINT32 flags;
76 UINT32 entry_align;
77 UINT32 max_offset;
78 struct imd_entry entries[0];
79 };
80
81 struct cbuint64 {
82 UINT32 lo;
83 UINT32 hi;
84 };
85
86 #define CB_HEADER_SIGNATURE 0x4F49424C
87
88 struct cb_header {
89 UINT32 signature;
90 UINT32 header_bytes;
91 UINT32 header_checksum;
92 UINT32 table_bytes;
93 UINT32 table_checksum;
94 UINT32 table_entries;
95 };
96
97 struct cb_record {
98 UINT32 tag;
99 UINT32 size;
100 };
101
102 #define CB_TAG_UNUSED 0x0000
103 #define CB_TAG_MEMORY 0x0001
104
105 struct cb_memory_range {
106 struct cbuint64 start;
107 struct cbuint64 size;
108 UINT32 type;
109 };
110
111 #define CB_MEM_RAM 1
112 #define CB_MEM_RESERVED 2
113 #define CB_MEM_ACPI 3
114 #define CB_MEM_NVS 4
115 #define CB_MEM_UNUSABLE 5
116 #define CB_MEM_VENDOR_RSVD 6
117 #define CB_MEM_TABLE 16
118
119 struct cb_memory {
120 UINT32 tag;
121 UINT32 size;
122 struct cb_memory_range map[0];
123 };
124
125 #define CB_TAG_MAINBOARD 0x0003
126
127 struct cb_mainboard {
128 UINT32 tag;
129 UINT32 size;
130 UINT8 vendor_idx;
131 UINT8 part_number_idx;
132 UINT8 strings[0];
133 };
134
135 #define CB_TAG_VERSION 0x0004
136 #define CB_TAG_EXTRA_VERSION 0x0005
137 #define CB_TAG_BUILD 0x0006
138 #define CB_TAG_COMPILE_TIME 0x0007
139 #define CB_TAG_COMPILE_BY 0x0008
140 #define CB_TAG_COMPILE_HOST 0x0009
141 #define CB_TAG_COMPILE_DOMAIN 0x000a
142 #define CB_TAG_COMPILER 0x000b
143 #define CB_TAG_LINKER 0x000c
144 #define CB_TAG_ASSEMBLER 0x000d
145
146 struct cb_string {
147 UINT32 tag;
148 UINT32 size;
149 UINT8 string[0];
150 };
151
152 #define CB_TAG_SERIAL 0x000f
153
154 struct cb_serial {
155 UINT32 tag;
156 UINT32 size;
157 #define CB_SERIAL_TYPE_IO_MAPPED 1
158 #define CB_SERIAL_TYPE_MEMORY_MAPPED 2
159 UINT32 type;
160 UINT32 baseaddr;
161 UINT32 baud;
162 UINT32 regwidth;
163
164 // Crystal or input frequency to the chip containing the UART.
165 // Provide the board specific details to allow the payload to
166 // initialize the chip containing the UART and make independent
167 // decisions as to which dividers to select and their values
168 // to eventually arrive at the desired console baud-rate.
169 UINT32 input_hertz;
170
171 // UART PCI address: bus, device, function
172 // 1 << 31 - Valid bit, PCI UART in use
173 // Bus << 20
174 // Device << 15
175 // Function << 12
176 UINT32 uart_pci_addr;
177 };
178
179 #define CB_TAG_CONSOLE 0x00010
180
181 struct cb_console {
182 UINT32 tag;
183 UINT32 size;
184 UINT16 type;
185 };
186
187 #define CB_TAG_CONSOLE_SERIAL8250 0
188 #define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
189 #define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
190 #define CB_TAG_CONSOLE_LOGBUF 3
191 #define CB_TAG_CONSOLE_SROM 4// OBSOLETE
192 #define CB_TAG_CONSOLE_EHCI 5
193
194 #define CB_TAG_FORWARD 0x00011
195
196 struct cb_forward {
197 UINT32 tag;
198 UINT32 size;
199 UINT64 forward;
200 };
201
202 struct cb_cbmem_ref {
203 UINT32 tag;
204 // Field contains size of this struct == 0x0010
205 UINT32 size;
206 UINT64 cbmem_addr;
207 };
208
209 #define CB_TAG_FRAMEBUFFER 0x0012
210 struct cb_framebuffer {
211 UINT32 tag;
212 UINT32 size;
213
214 UINT64 physical_address;
215 UINT32 x_resolution;
216 UINT32 y_resolution;
217 UINT32 bytes_per_line;
218 UINT8 bits_per_pixel;
219 UINT8 red_mask_pos;
220 UINT8 red_mask_size;
221 UINT8 green_mask_pos;
222 UINT8 green_mask_size;
223 UINT8 blue_mask_pos;
224 UINT8 blue_mask_size;
225 UINT8 reserved_mask_pos;
226 UINT8 reserved_mask_size;
227 };
228
229 #define CB_TAG_VDAT 0x0015
230 struct cb_vdat {
231 UINT32 tag;
232 UINT32 size; /* size of the entire entry */
233 UINT64 vdat_addr;
234 UINT32 vdat_size;
235 };
236
237 #define CB_TAG_TIMESTAMPS 0x0016
238 #define CB_TAG_CBMEM_CONSOLE 0x0017
239 struct cbmem_console {
240 UINT32 size;
241 UINT32 cursor;
242 UINT8 body[0];
243 } __attribute__ ((packed));
244
245 #define CB_TAG_MRC_CACHE 0x0018
246 struct cb_cbmem_tab {
247 UINT32 tag;
248 UINT32 size;
249 UINT64 cbmem_tab;
250 };
251
252 /* Helpful macros */
253
254 #define MEM_RANGE_COUNT(_rec) \
255 (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
256
257 #define MEM_RANGE_PTR(_rec, _idx) \
258 (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \
259 + (sizeof((_rec)->map[0]) * (_idx)))
260
261 typedef struct cb_memory CB_MEMORY;
262
263 #endif // _COREBOOT_PEI_H_INCLUDED_