UnixPkg/Library/UnixBaseLib/X64/Thunk16.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   4 # This program and the accompanying materials
   5 # are licensed and made available under the terms and conditions of the BSD License
   6 # which accompanies this distribution.  The full text of the license may be found at
   7 # http://opensource.org/licenses/bsd-license.php.
   8 #
   9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 # Module Name:
  13 #
  14 #   Thunk16.S
  15 #
  16 # Abstract:
  17 #
  18 #   Real mode thunk
  19 #
  20 #------------------------------------------------------------------------------
  21
  22 #include <Library/BaseLib.h>
  23
  24 ASM_GLOBAL ASM_PFX(m16Start)
  25 ASM_GLOBAL ASM_PFX(m16Size)
  26 ASM_GLOBAL ASM_PFX(mThunk16Attr)
  27 ASM_GLOBAL ASM_PFX(m16Gdt)
  28 ASM_GLOBAL ASM_PFX(m16GdtrBase)
  29 ASM_GLOBAL ASM_PFX(mTransition)
  30 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
  31
  32 # define the structure of IA32_REGS
  33 #define  _EDI  0       // size 4
  34 #define  _ESI  4       // size 4
  35 #define  _EBP  8       // size 4
  36 #define  _ESP  12      // size 4
  37 #define  _EBX  16      // size 4
  38 #define  _EDX  20      // size 4
  39 #define  _ECX  24      // size 4
  40 #define  _EAX  28      // size 4
  41 #define  _DS   32      // size 2
  42 #define  _ES   34      // size 2
  43 #define  _FS   36      // size 2
  44 #define  _GS   38      // size 2
  45 #define  _EFLAGS  40   // size 8
  46 #define  _EIP  48      // size 4
  47 #define  _CS  52       // size 2
  48 #define  _SS  54       // size 2
  49 #define  IA32_REGS_SIZE  56
  50
  51     .data
  52
  53 .set L_m16SizeSym,      ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
  54 .set L_mThunk16AttrSym, _ThunkAttr - ASM_PFX(m16Start)
  55 .set L_m16GdtSym,       ASM_PFX(NullSeg) - ASM_PFX(m16Start)
  56 .set L_m16GdtrBaseSym,  _16GdtrBase - ASM_PFX(m16Start)
  57 .set L_mTransitionSym,  _EntryPoint - ASM_PFX(m16Start)
  58
  59 ASM_PFX(m16Size):         .word      L_m16SizeSym
  60 ASM_PFX(mThunk16Attr):    .word      L_mThunk16AttrSym
  61 ASM_PFX(m16Gdt):          .word      L_m16GdtSym
  62 ASM_PFX(m16GdtrBase):     .word      L_m16GdtrBaseSym
  63 ASM_PFX(mTransition):     .word      L_mTransitionSym
  64
  65     .text
  66
  67 ASM_PFX(m16Start):
  68
  69 SavedGdt:    .space 10
  70
  71 #------------------------------------------------------------------------------
  72 # _BackFromUserCode() takes control in real mode after 'retf' has been executed
  73 # by user code. It will be shadowed to somewhere in memory below 1MB.
  74 #------------------------------------------------------------------------------
  75 ASM_GLOBAL ASM_PFX(BackFromUserCode)
  76 ASM_PFX(BackFromUserCode):
  77     #
  78     # The order of saved registers on the stack matches the order they appears
  79     # in IA32_REGS structure. This facilitates wrapper function to extract them
  80     # into that structure.
  81     #
  82     # Some instructions for manipulation of segment registers have to be written
  83     # in opcode since 64-bit MASM prevents accesses to those registers.
  84     #
  85     .byte 0x16                          # push ss
  86     .byte 0xe                           # push cs
  87     .byte 0x66
  88     call    L_Base                       # push eip
  89 L_Base:
  90     .byte 0x66
  91     pushq   $0                          # reserved high order 32 bits of EFlags
  92     .byte 0x66, 0x9c                    # pushfd actually
  93     cli                                 # disable interrupts
  94     push    %gs
  95     push    %fs
  96     .byte 6                             # push es
  97     .byte 0x1e                          # push ds
  98     .byte 0x66,0x60                     # pushad
  99     .byte 0x66,0xba                     # mov edx, imm32
 100 _ThunkAttr:  .space  4
 101     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
 102     jz      L_1
 103     movl    $0x15cd2401,%eax            # mov ax, 2401h & int 15h
 104     cli                                 # disable interrupts
 105     jnc     L_2
 106 L_1:
 107     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
 108     jz      L_2
 109     inb     $0x92,%al
 110     orb     $2,%al
 111     outb    %al, $0x92                   # deactivate A20M#
 112 L_2:
 113     movw    %ss,%ax
 114     lea     IA32_REGS_SIZE(%esp), %bp
 115     #
 116     # rsi in the following 2 instructions is indeed bp in 16-bit code
 117     #
 118     movw    %bp, (_ESP - IA32_REGS_SIZE)(%rsi)
 119     .byte 0x66
 120     movl    (_EIP - IA32_REGS_SIZE)(%rsi), %ebx
 121     shlw    $4,%ax                      # shl eax, 4
 122     addw    %ax,%bp                     # add ebp, eax
 123     movw    %cs,%ax
 124     shlw    $4,%ax
 125     lea     (L_64BitCode - L_Base)(%ebx, %eax), %ax
 126     .byte 0x66,0x2e,0x89,0x87           # mov cs:[bx + (L_64Eip - L_Base)], eax
 127 .set EipOffset,  L_64Eip - L_Base
 128     .word   EipOffset
 129     .byte 0x66,0xb8                     # mov eax, imm32
 130 SavedCr4:   .space  4
 131     movq    %rax, %cr4
 132     #
 133     # rdi in the instruction below is indeed bx in 16-bit code
 134     #
 135     .byte 0x66,0x2e                     # 2eh is "cs:" segment override
 136     lgdt    (SavedGdt - L_Base)(%rdi)
 137     .byte 0x66
 138     movl    $0xc0000080,%ecx
 139     rdmsr
 140     orb     $1,%ah
 141     wrmsr
 142     .byte 0x66,0xb8                     # mov eax, imm32
 143 SavedCr0:    .space      4
 144     movq    %rax, %cr0
 145     .byte 0x66,0xea                     # jmp far cs:L_64Bit
 146 L_64Eip:     .space      4
 147 SavedCs:     .space      2
 148 L_64BitCode:
 149     .byte   0x90
 150     .byte   0x67,0xbc                  # mov esp, imm32
 151 SavedSp:    .space 4                   # restore stack
 152     nop
 153     ret
 154
 155 _EntryPoint: .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
 156              .word      CODE16
 157 _16Gdtr:     .word      L_GDT_SIZE - 1
 158 _16GdtrBase: .quad      ASM_PFX(NullSeg)
 159 _16Idtr:     .word      0x3ff
 160              .long      0
 161
 162 #------------------------------------------------------------------------------
 163 # _ToUserCode() takes control in real mode before passing control to user code.
 164 # It will be shadowed to somewhere in memory below 1MB.
 165 #------------------------------------------------------------------------------
 166 ASM_GLOBAL ASM_PFX(ToUserCode)
 167 ASM_PFX(ToUserCode):
 168     movl    %edx,%ss                    # set new segment selectors
 169     movl    %edx,%ds
 170     movl    %edx,%es
 171     movl    %edx,%fs
 172     movl    %edx,%gs
 173     .byte 0x66
 174     movl    $0xc0000080,%ecx
 175     movq    %rax, %cr0
 176     rdmsr
 177     andb    $0xfe, %ah                  # $0b11111110
 178     wrmsr
 179     movq    %rbp, %cr4
 180     movl    %esi,%ss                    # set up 16-bit stack segment
 181     movw    %bx,%sp                     # set up 16-bit stack pointer
 182     .byte 0x66                          # make the following call 32-bit
 183     call    L_Base1                       # push eip
 184 L_Base1:
 185     popw    %bp                         # ebp <- address of L_Base1
 186     pushq   (IA32_REGS_SIZE + 2)(%esp)
 187     lea     0x0c(%rsi), %eax
 188     pushq   %rax
 189     lret                                # execution begins at next instruction
 190 L_RealMode:
 191     .byte 0x66,0x2e                     # CS and operand size override
 192     lidt    (_16Idtr - L_Base1)(%rsi)
 193     .byte 0x66,0x61                     # popad
 194     .byte 0x1f                          # pop ds
 195     .byte 0x7                           # pop es
 196     .byte 0x0f, 0xa1                    # pop fs
 197     .byte 0x0f, 0xa9                    # pop gs
 198     .byte 0x66, 0x9d                    # popfd
 199     leaw    4(%esp),%sp                 # skip high order 32 bits of EFlags
 200     .byte 0x66                          # make the following retf 32-bit
 201     lret                                # transfer control to user code
 202
 203 .set  CODE16,  ASM_PFX(_16Code) - .
 204 .set  DATA16,  ASM_PFX(_16Data) - .
 205 .set  DATA32,  ASM_PFX(_32Data) - .
 206
 207 ASM_PFX(NullSeg):   .quad      0
 208 ASM_PFX(_16Code):
 209             .word -1
 210             .word 0
 211             .byte 0
 212             .byte 0x9b
 213             .byte 0x8f                  # 16-bit segment, 4GB limit
 214             .byte 0
 215 ASM_PFX(_16Data):
 216             .word -1
 217             .word 0
 218             .byte 0
 219             .byte 0x93
 220             .byte 0x8f                  # 16-bit segment, 4GB limit
 221             .byte 0
 222 ASM_PFX(_32Data):
 223             .word -1
 224             .word 0
 225             .byte 0
 226             .byte 0x93
 227             .byte 0xcf                  # 16-bit segment, 4GB limit
 228             .byte 0
 229
 230 .set  L_GDT_SIZE, . - ASM_PFX(NullSeg)
 231
 232 #------------------------------------------------------------------------------
 233 # IA32_REGISTER_SET *
 234 # EFIAPI
 235 # InternalAsmThunk16 (
 236 #   IN      IA32_REGISTER_SET         *RegisterSet,
 237 #   IN OUT  VOID                      *Transition
 238 #   );
 239 #------------------------------------------------------------------------------
 240
 241 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
 242 ASM_PFX(InternalAsmThunk16):
 243     pushq   %rbp
 244     pushq   %rbx
 245     pushq   %rsi
 246     pushq   %rdi
 247
 248     movl    %ds, %ebx
 249     pushq   %rbx      # Save ds segment register on the stack
 250     movl    %es, %ebx
 251     pushq   %rbx      # Save es segment register on the stack
 252     movl    %ss, %ebx
 253     pushq   %rbx      # Save ss segment register on the stack
 254
 255     .byte   0x0f, 0xa0                  #push   fs
 256     .byte   0x0f, 0xa8                  #push   gs
 257     movq    %rcx, %rsi
 258     movzwl  _SS(%rsi), %r8d
 259     movl    _ESP(%rsi), %edi
 260     lea     -(IA32_REGS_SIZE + 4)(%edi), %rdi
 261     imul    $16, %r8d, %eax
 262     movl    %edi,%ebx                   # ebx <- stack for 16-bit code
 263     pushq   $(IA32_REGS_SIZE / 4)
 264     addl    %eax,%edi                   # edi <- linear address of 16-bit stack
 265     popq    %rcx
 266     rep
 267     movsl                               # copy RegSet
 268     lea     (SavedCr4 - ASM_PFX(m16Start))(%rdx), %ecx
 269     movl    %edx,%eax                   # eax <- transition code address
 270     andl    $0xf,%edx
 271     shll    $12,%eax                    # segment address in high order 16 bits
 272     lea     (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%rdx), %ax
 273     stosl                               # [edi] <- return address of user code
 274     sgdt    0x60(%rsp)                  # save GDT stack in argument space
 275     movzwq  0x60(%rsp), %r10            # r10 <- GDT limit
 276     lea     ((ASM_PFX(InternalAsmThunk16) - SavedCr4) + 0xf)(%rcx), %r11
 277     andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer
 278
 279     movw    %r10w, (SavedGdt - SavedCr4)(%rcx)       # save the limit of shadowed GDT table
 280     movq    %r11, (SavedGdt - SavedCr4 + 0x2)(%rcx)  # save the base address of shadowed GDT table
 281
 282     movq    0x62(%rsp) ,%rsi            # rsi <- the original GDT base address
 283     xchg   %r10, %rcx                   # save rcx to r10 and initialize rcx to be the limit of GDT table
 284     incq   %rcx                         # rcx <- the size of memory to copy
 285     xchg   %r11, %rdi                   # save rdi to r11 and initialize rdi to the base address of shadowed GDT table
 286     rep
 287     movsb                               # perform memory copy to shadow GDT table
 288     movq   %r10, %rcx                   # restore the orignal rcx before memory copy
 289     movq   %r11, %rdi                   # restore the original rdi before memory copy
 290
 291     sidt    0x50(%rsp)
 292     movq    %cr0, %rax
 293     movl    %eax, (SavedCr0 - SavedCr4)(%rcx)
 294     andl    $0x7ffffffe,%eax            # clear PE, PG bits
 295     movq    %cr4, %rbp
 296     movl    %ebp, (%rcx)                # save CR4 in SavedCr4
 297     andl    $0x300,%ebp                 # clear all but PCE and OSFXSR bits
 298     movl    %r8d, %esi                  # esi <- 16-bit stack segment
 299     .byte      0x6a, DATA32
 300     popq    %rdx
 301     lgdt    (_16Gdtr - SavedCr4)(%rcx)
 302     movl    %edx,%ss
 303     pushfq
 304     lea     -8(%rdx), %edx
 305     lea     L_RetFromRealMode(%rip), %r8
 306     pushq   %r8
 307     movl    %cs, %r8d
 308     movw    %r8w, (SavedCs - SavedCr4)(%rcx)
 309     movl    %esp, (SavedSp - SavedCr4)(%rcx)
 310     .byte   0xff, 0x69                  #  jmp (_EntryPoint - SavedCr4)(%rcx)
 311 .set EntryPointSavedCr4Offset, _EntryPoint - SavedCr4
 312     .byte   EntryPointSavedCr4Offset
 313 L_RetFromRealMode:
 314     popfq
 315     lgdt    0x60(%rsp)                  # restore protected mode GDTR
 316     lidt    0x50(%rsp)                  # restore protected mode IDTR
 317     lea     -IA32_REGS_SIZE(%rbp), %eax
 318     .byte 0x0f, 0xa9                    # pop gs
 319     .byte 0x0f, 0xa1                    # pop fs
 320
 321     popq     %rbx
 322     movl     %ebx, %ss
 323     popq     %rbx
 324     movl     %ebx, %es
 325     popq     %rbx
 326     movl     %ebx, %ds
 327
 328     popq    %rdi
 329     popq    %rsi
 330     popq    %rbx
 331     popq    %rbp
 332
 333     ret