Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs.h

   1 /**
   2
   3 Copyright (c) 2011  - 2014, Intel Corporation. All rights reserved
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7
   8
   9   @file
  10   PchRegs.h
  11
  12   @brief
  13   Register names for VLV SC.
  14
  15   Conventions:
  16
  17   - Prefixes:
  18     Definitions beginning with "R_" are registers
  19     Definitions beginning with "B_" are bits within registers
  20     Definitions beginning with "V_" are meaningful values of bits within the registers
  21     Definitions beginning with "S_" are register sizes
  22     Definitions beginning with "N_" are the bit position
  23   - In general, PCH registers are denoted by "_PCH_" in register names
  24   - Registers / bits that are different between PCH generations are denoted by
  25     "_PCH_<generation_name>_" in register/bit names. e.g., "_PCH_VLV_"
  26   - Registers / bits that are different between SKUs are denoted by "_<SKU_name>"
  27     at the end of the register/bit names
  28   - Registers / bits of new devices introduced in a PCH generation will be just named
  29     as "_PCH_" without <generation_name> inserted.
  30
  31 **/
  32 #ifndef _PCH_REGS_H_
  33 #define _PCH_REGS_H_
  34
  35 ///
  36 /// Bit Definitions. BUGBUG: drive these definitions to code base. Should not need
  37 /// to be part of chipset modules
  38 ///
  39 #ifndef BIT0
  40 #define BIT0  0x0001
  41 #define BIT1  0x0002
  42 #define BIT2  0x0004
  43 #define BIT3  0x0008
  44 #define BIT4  0x0010
  45 #define BIT5  0x0020
  46 #define BIT6  0x0040
  47 #define BIT7  0x0080
  48 #define BIT8  0x0100
  49 #define BIT9  0x0200
  50 #define BIT10 0x0400
  51 #define BIT11 0x0800
  52 #define BIT12 0x1000
  53 #define BIT13 0x2000
  54 #define BIT14 0x4000
  55 #define BIT15 0x8000
  56 #define BIT16 0x00010000
  57 #define BIT17 0x00020000
  58 #define BIT18 0x00040000
  59 #define BIT19 0x00080000
  60 #define BIT20 0x00100000
  61 #define BIT21 0x00200000
  62 #define BIT22 0x00400000
  63 #define BIT23 0x00800000
  64 #define BIT24 0x01000000
  65 #define BIT25 0x02000000
  66 #define BIT26 0x04000000
  67 #define BIT27 0x08000000
  68 #define BIT28 0x10000000
  69 #define BIT29 0x20000000
  70 #define BIT30 0x40000000
  71 #define BIT31 0x80000000
  72 #define BIT32 0x100000000
  73 #define BIT33 0x200000000
  74 #define BIT34 0x400000000
  75 #define BIT35 0x800000000
  76 #define BIT36 0x1000000000
  77 #define BIT37 0x2000000000
  78 #define BIT38 0x4000000000
  79 #define BIT39 0x8000000000
  80 #define BIT40 0x10000000000
  81 #define BIT41 0x20000000000
  82 #define BIT42 0x40000000000
  83 #define BIT43 0x80000000000
  84 #define BIT44 0x100000000000
  85 #define BIT45 0x200000000000
  86 #define BIT46 0x400000000000
  87 #define BIT47 0x800000000000
  88 #define BIT48 0x1000000000000
  89 #define BIT49 0x2000000000000
  90 #define BIT50 0x4000000000000
  91 #define BIT51 0x8000000000000
  92 #define BIT52 0x10000000000000
  93 #define BIT53 0x20000000000000
  94 #define BIT54 0x40000000000000
  95 #define BIT55 0x80000000000000
  96 #define BIT56 0x100000000000000
  97 #define BIT57 0x200000000000000
  98 #define BIT58 0x400000000000000
  99 #define BIT59 0x800000000000000
 100 #define BIT60 0x1000000000000000
 101 #define BIT61 0x2000000000000000
 102 #define BIT62 0x4000000000000000
 103 #define BIT63 0x8000000000000000
 104 #endif
 105 ///
 106 /// The default PCH PCI bus number
 107 ///
 108 #define DEFAULT_PCI_BUS_NUMBER_PCH  0
 109
 110 ///
 111 /// Default Vendor ID and Subsystem ID
 112 ///
 113 #define V_PCH_INTEL_VENDOR_ID   0x8086
 114 #define V_PCH_DEFAULT_SID       0x7270
 115 #define V_PCH_DEFAULT_SVID_SID  (V_PCH_INTEL_VENDOR_ID + (V_PCH_DEFAULT_SID << 16))
 116
 117 ///
 118 /// Include device register definitions
 119 ///
 120 #include "PchRegs/PchRegsHda.h"
 121 #include "PchRegs/PchRegsLpss.h"
 122 #include "PchRegs/PchRegsPcie.h"
 123 #include "PchRegs/PchRegsPcu.h"
 124 #include "PchRegs/PchRegsRcrb.h"
 125 #include "PchRegs/PchRegsSata.h"
 126 #include "PchRegs/PchRegsScc.h"
 127 #include "PchRegs/PchRegsSmbus.h"
 128 #include "PchRegs/PchRegsSpi.h"
 129 #include "PchRegs/PchRegsUsb.h"
 130 //#include "PchRegs/PchRegsLpe.h"
 131
 132 ///
 133 /// Device IDS that are PCH Server specific
 134 ///
 135 #define IS_PCH_DEVICE_ID(DeviceId) \
 136     ( \
 137       (DeviceId == V_PCH_LPC_DEVICE_ID_0) || \
 138       (DeviceId == V_PCH_LPC_DEVICE_ID_1) || \
 139       (DeviceId == V_PCH_LPC_DEVICE_ID_2) || \
 140       (DeviceId == V_PCH_LPC_DEVICE_ID_3) \
 141     )
 142
 143 #define IS_PCH_VLV_LPC_DEVICE_ID(DeviceId) \
 144     ( \
 145       IS_PCH_DEVICE_ID (DeviceId) \
 146     )
 147
 148 #define IS_PCH_VLV_SATA_DEVICE_ID(DeviceId) \
 149     ( \
 150       IS_PCH_VLV_SATA_AHCI_DEVICE_ID (DeviceId) || \
 151       IS_PCH_VLV_SATA_MODE_DEVICE_ID (DeviceId) || \
 152       IS_PCH_VLV_SATA_RAID_DEVICE_ID (DeviceId) \
 153     )
 154
 155 #define IS_PCH_VLV_SATA_AHCI_DEVICE_ID(DeviceId) \
 156     ( \
 157       (DeviceId == V_PCH_SATA_DEVICE_ID_D_AHCI) || \
 158       (DeviceId == V_PCH_SATA_DEVICE_ID_M_AHCI) \
 159     )
 160
 161 #define IS_PCH_VLV_SATA_RAID_DEVICE_ID(DeviceId) \
 162     ( \
 163       (DeviceId == V_PCH_SATA_DEVICE_ID_D_RAID) || \
 164       (DeviceId == V_PCH_SATA_DEVICE_ID_M_RAID) \
 165     )
 166
 167 #define IS_PCH_VLV_SATA_MODE_DEVICE_ID(DeviceId) \
 168     ( \
 169       (DeviceId == V_PCH_SATA_DEVICE_ID_D_IDE) || \
 170       (DeviceId == V_PCH_SATA_DEVICE_ID_M_IDE) \
 171     )
 172 #define IS_PCH_VLV_USB_DEVICE_ID(DeviceId) \
 173     ( \
 174       (DeviceId == V_PCH_USB_DEVICE_ID_0) || \
 175       (DeviceId == V_PCH_USB_DEVICE_ID_1) \
 176     )
 177 #define IS_PCH_VLV_PCIE_DEVICE_ID(DeviceId) \
 178     ( \
 179       (DeviceId == V_PCH_PCIE_DEVICE_ID_0) || \
 180       (DeviceId == V_PCH_PCIE_DEVICE_ID_1) || \
 181       (DeviceId == V_PCH_PCIE_DEVICE_ID_2) || \
 182       (DeviceId == V_PCH_PCIE_DEVICE_ID_3) || \
 183       (DeviceId == V_PCH_PCIE_DEVICE_ID_4) || \
 184       (DeviceId == V_PCH_PCIE_DEVICE_ID_5) || \
 185       (DeviceId == V_PCH_PCIE_DEVICE_ID_6) || \
 186       (DeviceId == V_PCH_PCIE_DEVICE_ID_7) \
 187     )
 188
 189 ///
 190 /// Any device ID that is Valleyview SC
 191 ///
 192 #define IS_PCH_VLV_DEVICE_ID(DeviceId) \
 193     ( \
 194       IS_PCH_VLV_LPC_DEVICE_ID (DeviceId) || \
 195       IS_PCH_VLV_SATA_DEVICE_ID (DeviceId) || \
 196       IS_PCH_VLV_USB_DEVICE_ID (DeviceId) || \
 197       IS_PCH_VLV_PCIE_DEVICE_ID (DeviceId) || \
 198       (DeviceId) == V_PCH_SMBUS_DEVICE_ID || \
 199       (DeviceId) == V_PCH_HDA_DEVICE_ID_0 || \
 200       (DeviceId) == V_PCH_HDA_DEVICE_ID_1 \
 201     )
 202
 203 #define IS_SUPPORTED_DEVICE_ID(DeviceId)  IS_PCH_VLV_DEVICE_ID (DeviceId)
 204
 205 #endif