Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/PchRegsHda.h

   1 /**
   2
   3 Copyright (c) 2012  - 2014, Intel Corporation. All rights reserved
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7
   8
   9   @file
  10   PchRegsHda.h
  11
  12   @brief
  13   Register names for PCH High Definition Audio device.
  14
  15   Conventions:
  16
  17   - Prefixes:
  18     Definitions beginning with "R_" are registers
  19     Definitions beginning with "B_" are bits within registers
  20     Definitions beginning with "V_" are meaningful values of bits within the registers
  21     Definitions beginning with "S_" are register sizes
  22     Definitions beginning with "N_" are the bit position
  23   - In general, PCH registers are denoted by "_PCH_" in register names
  24   - Registers / bits that are different between PCH generations are denoted by
  25     "_PCH_<generation_name>_" in register/bit names. e.g., "_PCH_VLV_"
  26   - Registers / bits that are different between SKUs are denoted by "_<SKU_name>"
  27     at the end of the register/bit names
  28   - Registers / bits of new devices introduced in a PCH generation will be just named
  29     as "_PCH_" without <generation_name> inserted.
  30
  31 **/
  32 #ifndef _PCH_REGS_HDA_H_
  33 #define _PCH_REGS_HDA_H_
  34
  35 ///
  36 /// Azalia Controller Registers (D27:F0)
  37 ///
  38 #define PCI_DEVICE_NUMBER_PCH_AZALIA       27
  39 #define PCI_FUNCTION_NUMBER_PCH_AZALIA     0
  40
  41 #define R_PCH_HDA_PCS                      0x54  // Power Management Control and Status
  42 #define B_PCH_HDA_PCS_DATA                 0xFF000000 // Data, does not apply
  43 #define B_PCH_HDA_PCS_CCE                  BIT23 // Bus Power Control Enable, does not apply
  44 #define B_PCH_HDA_PCS_PMES                 BIT15 // PME Status
  45 #define B_PCH_HDA_PCS_PMEE                 BIT8  // PME Enable
  46 #define B_PCH_HDA_PCS_PS                   (BIT1 | BIT0) // Power State - D0/D3 Hot
  47 #define V_PCH_HDA_PCS_PS0                  0x00
  48 #define V_PCH_HDA_PCS_PS3                  0x03
  49
  50 #endif