Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Ppi/PchUsbPolicy.h

   1 /**
   2 **/
   3 /**
   4
   5 Copyright (c) 2012  - 2014, Intel Corporation. All rights reserved
   6
   7   SPDX-License-Identifier: BSD-2-Clause-Patent
   8
   9
  10
  11   @file
  12   PchUsbPolicy.h
  13
  14   @brief
  15   PCH Usb policy PPI produced by a platform driver specifying
  16   various expected PCH Usb settings. This PPI is consumed by the
  17   PCH PEI drivers.
  18
  19 **/
  20 #ifndef _PCH_USB_POLICY_H_
  21 #define _PCH_USB_POLICY_H_
  22
  23 //
  24 // PCH Usb policy provided by platform for PEI phase
  25 //
  26
  27 #ifndef ECP_FLAG
  28 #include <PiPei.h>
  29 #endif
  30
  31 #include "PchRegs.h"
  32 #include <Protocol/PchPlatformPolicy.h>
  33
  34 #define PCH_USB_POLICY_PPI_GUID \
  35   { \
  36     0xc02b0573, 0x2b4e, 0x4a31, 0xa3, 0x1a, 0x94, 0x56, 0x7b, 0x50, 0x44, 0x2c \
  37   }
  38
  39 extern EFI_GUID                     gPchUsbPolicyPpiGuid;
  40
  41 typedef struct _PCH_USB_POLICY_PPI  PCH_USB_POLICY_PPI;
  42
  43 ///
  44 /// PPI revision number
  45 /// Any backwards compatible changes to this PPI will result in an update in the revision number
  46 /// Major changes will require publication of a new PPI
  47 ///
  48 /// Revision 1: Original version
  49 ///
  50 #define PCH_USB_POLICY_PPI_REVISION_1 1
  51
  52 ///
  53 /// Generic definitions for device enabling/disabling used by PCH code.
  54 ///
  55 #define PCH_DEVICE_ENABLE   1
  56 #define PCH_DEVICE_DISABLE  0
  57
  58 #define EHCI_MODE           1
  59
  60 struct _PCH_USB_POLICY_PPI {
  61   UINT8           Revision;
  62   PCH_USB_CONFIG  *UsbConfig;
  63   UINT8           Mode;
  64   UINTN           EhciMemBaseAddr;
  65   UINT32          EhciMemLength;
  66   UINTN           XhciMemBaseAddr;
  67 };
  68
  69 #endif