3 Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
5 SPDX-License-Identifier: BSD-2-Clause-Patent
18 Interface definition for EFI_SD_HOST_IO_PROTOCOL
26 // Global ID for the EFI_SD_HOST_IO_PROTOCOL
27 // {B63F8EC7-A9C9-4472-A4C0-4D8BF365CC51}
29 #define EFI_SD_HOST_IO_PROTOCOL_GUID \
30 { 0xb63f8ec7, 0xa9c9, 0x4472, { 0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51 } }
32 typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL
;
35 // TODO: Move to Pci22.h
37 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05
38 #define PCI_IF_STANDARD_HOST_NO_DMA 0x00
39 #define PCI_IF_STANDARD_HOST_SUPPORT_DMA 0x01
44 #define EFI_SD_HOST_IO_PROTOCOL_REVISION_01 0x01
47 // TODO: Do these belong in an Industry Standard include file?
49 // MMIO Registers definition for MMC/SDIO controller
51 #define MMIO_DMAADR 0x00
52 #define MMIO_BLKSZ 0x04
53 #define MMIO_BLKCNT 0x06
54 #define MMIO_CMDARG 0x08
55 #define MMIO_XFRMODE 0x0C
56 #define MMIO_SDCMD 0x0E
57 #define MMIO_RESP 0x10
58 #define MMIO_BUFDATA 0x20
59 #define MMIO_PSTATE 0x24
60 #define MMIO_HOSTCTL 0x28
61 #define MMIO_PWRCTL 0x29
62 #define MMIO_BLKGAPCTL 0x2A
63 #define MMIO_WAKECTL 0x2B
64 #define MMIO_CLKCTL 0x2C
65 #define MMIO_TOCTL 0x2E
66 #define MMIO_SWRST 0x2F
67 #define MMIO_NINTSTS 0x30
68 #define MMIO_ERINTSTS 0x32
69 #define MMIO_NINTEN 0x34
70 #define MMIO_ERINTEN 0x36
71 #define MMIO_NINTSIGEN 0x38
72 #define MMIO_ERINTSIGEN 0x3A
73 #define MMIO_AC12ERRSTS 0x3C
74 #define MMIO_HOST_CTL2 0x3E //hphang <- New in VLV2
76 #define MMIO_CAP2 0x44 //hphang <- New in VLV2
77 #define MMIO_MCCAP 0x48
78 #define MMIO_FORCEEVENTCMD12ERRSTAT 0x50 //hphang <- New in VLV2
79 #define MMIO_FORCEEVENTERRINTSTAT 0x52 //hphang <- New in VLV2
80 #define MMIO_ADMAERRSTAT 0x54 //hphang <- New in VLV2
81 #define MMIO_ADMASYSADDR 0x58 //hphang <- New in VLV2
82 #define MMIO_PRESETVALUE0 0x60 //hphang <- New in VLV2
83 #define MMIO_PRESETVALUE1 0x64 //hphang <- New in VLV2
84 #define MMIO_PRESETVALUE2 0x68 //hphang <- New in VLV2
85 #define MMIO_PRESETVALUE3 0x6C //hphang <- New in VLV2
86 #define MMIO_BOOTTIMEOUTCTRL 0x70 //hphang <- New in VLV2
87 #define MMIO_DEBUGSEL 0x74 //hphang <- New in VLV2
88 #define MMIO_SHAREDBUS 0xE0 //hphang <- New in VLV2
89 #define MMIO_SPIINTSUP 0xF0 //hphang <- New in VLV2
90 #define MMIO_SLTINTSTS 0xFC
91 #define MMIO_CTRLRVER 0xFE
129 UINT32 HighSpeedSupport
: 1; //High speed supported
130 UINT32 V18Support
: 1; //1.8V supported
131 UINT32 V30Support
: 1; //3.0V supported
132 UINT32 V33Support
: 1; //3.3V supported
133 UINT32 SDR50Support
: 1;
134 UINT32 SDR104Support
: 1;
135 UINT32 DDR50Support
: 1;
137 UINT32 BusWidth4
: 1; // 4 bit width
138 UINT32 BusWidth8
: 1; // 8 bit width
140 UINT32 SDMASupport
: 1;
141 UINT32 ADMA2Support
: 1;
143 UINT32 ReTuneTimer
: 4;
144 UINT32 ReTuneMode
: 2;
152 The main function used to send the command to the card inserted into the SD host
154 It will assemble the arguments to set the command register and wait for the command
155 and transfer completed until timeout. Then it will read the response register to fill
159 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
160 CommandIndex - The command index to set the command index field of command register
161 Argument - Command argument to set the argument field of command register
162 DataType - TRANSFER_TYPE, indicates no data, data in or data out
163 Buffer - Contains the data read from / write to the device
164 BufferSize - The size of the buffer
165 ResponseType - RESPONSE_TYPE
166 TimeOut - Time out value in 1 ms unit
167 ResponseData - Depending on the ResponseType, such as CSD or card status
171 EFI_INVALID_PARAMETER
179 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND
) (
180 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
181 IN UINT16 CommandIndex
,
183 IN TRANSFER_TYPE DataType
,
184 IN UINT8
*Buffer
, OPTIONAL
185 IN UINT32 BufferSize
,
186 IN RESPONSE_TYPE ResponseType
,
188 OUT UINT32
*ResponseData OPTIONAL
194 Set max clock frequency of the host, the actual frequency
195 may not be the same as MaxFrequency. It depends on
196 the max frequency the host can support, divider, and host
200 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
201 MaxFrequency - Max frequency in HZ
209 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY
) (
210 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
211 IN UINT32 MaxFrequency
217 Set bus width of the host
220 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
221 BusWidth - Bus width in 1, 4, 8 bits
225 EFI_INVALID_PARAMETER
230 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH
) (
231 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
238 Set voltage which could supported by the host.
239 Support 0(Power off the host), 1.8V, 3.0V, 3.3V
241 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
242 Voltage - Units in 0.1 V
246 EFI_INVALID_PARAMETER
251 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE
) (
252 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
261 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
262 HighSpeed - True for High Speed Mode set, false for normal mode
266 EFI_INVALID_PARAMETER
271 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE
) (
272 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
281 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
282 SetHostDdrMode - True for DDR Mode set, false for normal mode
286 EFI_INVALID_PARAMETER
291 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE
) (
292 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
303 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
304 ResetAll - TRUE to reset all
313 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST
) (
314 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
315 IN RESET_TYPE ResetType
324 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
325 Enable - TRUE to enable, FALSE to disable
334 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD
) (
335 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
342 Find whether these is a card inserted into the slot. If so
343 init the host. If not, return EFI_NOT_FOUND.
346 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
355 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST
) (
356 IN EFI_SD_HOST_IO_PROTOCOL
*This
365 This - Pointer to EFI_SD_HOST_IO_PROTOCOL
366 BlockLength - card supportes block length
375 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH
) (
376 IN EFI_SD_HOST_IO_PROTOCOL
*This
,
377 IN UINT32 BlockLength
381 (EFIAPI
*EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE
)(
382 IN EFI_SD_HOST_IO_PROTOCOL
*This
388 // Interface structure for the EFI SD Host I/O Protocol
390 struct _EFI_SD_HOST_IO_PROTOCOL
{
392 HOST_CAPABILITY HostCapability
;
393 EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND SendCommand
;
394 EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY SetClockFrequency
;
395 EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH SetBusWidth
;
396 EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE SetHostVoltage
;
397 EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE SetHostDdrMode
;
398 EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST ResetSdHost
;
399 EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD EnableAutoStopCmd
;
400 EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST DetectCardAndInitHost
;
401 EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH SetBlockLength
;
402 EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE SetupDevice
;
403 EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE SetHostSpeedMode
;
406 extern EFI_GUID gEfiSdHostIoProtocolGuid
;