2 Platform Flash Access library.
4 Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Library/BaseLib.h>
19 #include <Library/BaseMemoryLib.h>
20 #include <Library/DebugLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/PlatformFlashAccessLib.h>
23 //#include <Library/FlashDeviceLib.h>
24 #include <Library/MemoryAllocationLib.h>
25 #include <Protocol/Spi.h>
26 #include <Library/CacheMaintenanceLib.h>
27 #include "PchAccess.h"
28 #include <Library/IoLib.h>
29 #include <Library/UefiLib.h>
30 #include <Library/UefiBootServicesTableLib.h>
31 #include <Library/PrintLib.h>
33 //#define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
34 //#define ALINGED_SIZE SECTOR_SIZE_64KB
36 #define BLOCK_SIZE 0x1000
37 #define ALINGED_SIZE BLOCK_SIZE
39 #define R_PCH_LPC_BIOS_CNTL 0xDC
40 #define B_PCH_LPC_BIOS_CNTL_SMM_BWP 0x20 ///< SMM BIOS write protect disable
43 // Prefix Opcode Index on the host SPI controller
46 SPI_WREN
, // Prefix Opcode 0: Write Enable
47 SPI_EWSR
, // Prefix Opcode 1: Enable Write Status Register
48 } PREFIX_OPCODE_INDEX
;
50 // Opcode Menu Index on the host SPI controller
53 SPI_READ_ID
, // Opcode 0: READ ID, Read cycle with address
54 SPI_READ
, // Opcode 1: READ, Read cycle with address
55 SPI_RDSR
, // Opcode 2: Read Status Register, No address
56 SPI_WRDI_SFDP
, // Opcode 3: Write Disable or Discovery Parameters, No address
57 SPI_SERASE
, // Opcode 4: Sector Erase (4KB), Write cycle with address
58 SPI_BERASE
, // Opcode 5: Block Erase (32KB), Write cycle with address
59 SPI_PROG
, // Opcode 6: Byte Program, Write cycle with address
60 SPI_WRSR
, // Opcode 7: Write Status Register, No address
63 STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress
;
65 EFI_SPI_PROTOCOL
*mSpiProtocol
;
68 Read NumBytes bytes of data from the address specified by
71 @param[in] Address The starting physical address of the read.
72 @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
73 of bytes actually read.
74 @param[out] Buffer The destination data buffer for the read.
76 @retval EFI_SUCCESS Opertion is successful.
77 @retval EFI_DEVICE_ERROR If there is any device errors.
84 IN OUT UINT32
*NumBytes
,
88 EFI_STATUS Status
= EFI_SUCCESS
;
91 ASSERT ((NumBytes
!= NULL
) && (Buffer
!= NULL
));
94 //if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) {
95 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
97 Status
= mSpiProtocol
->Execute (
113 Write NumBytes bytes of data from Buffer to the address specified by
116 @param[in] Address The starting physical address of the write.
117 @param[in,out] NumBytes On input, the number of bytes to write. On output,
118 the actual number of bytes written.
119 @param[in] Buffer The source data buffer for the write.
121 @retval EFI_SUCCESS Opertion is successful.
122 @retval EFI_DEVICE_ERROR If there is any device errors.
129 IN OUT UINT32
*NumBytes
,
136 UINT32 RemainingBytes
;
138 ASSERT ((NumBytes
!= NULL
) && (Buffer
!= NULL
));
139 ASSERT (Address
>= (UINTN
)PcdGet32 (PcdFlashChipBase
));
141 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
143 ASSERT ((*NumBytes
+ Offset
) <= (UINTN
)PcdGet32 (PcdFlashChipSize
));
145 Status
= EFI_SUCCESS
;
146 RemainingBytes
= *NumBytes
;
148 while (RemainingBytes
> 0) {
149 if (RemainingBytes
> SIZE_4KB
) {
152 Length
= RemainingBytes
;
154 Status
= mSpiProtocol
->Execute (
166 if (EFI_ERROR (Status
)) {
169 RemainingBytes
-= Length
;
175 // Actual number of bytes written
177 *NumBytes
-= RemainingBytes
;
185 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
192 BlockSize
= BLOCK_SIZE
;
194 Status
= SpiFlashRead ((UINTN
) BaseAddress
, &BlockSize
, ReadBuffer
);
200 Erase the block starting at Address.
202 @param[in] Address The starting physical address of the block to be erased.
203 This library assume that caller garantee that the PAddress
204 is at the starting address of this block.
205 @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
206 On output, the actual number of bytes erased.
208 @retval EFI_SUCCESS. Opertion is successful.
209 @retval EFI_DEVICE_ERROR If there is any device errors.
221 UINTN RemainingBytes
;
223 ASSERT (NumBytes
!= NULL
);
224 ASSERT (Address
>= (UINTN
)PcdGet32 (PcdFlashChipBase
));
226 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
228 ASSERT ((*NumBytes
% SIZE_4KB
) == 0);
229 ASSERT ((*NumBytes
+ Offset
) <= (UINTN
)PcdGet32 (PcdFlashChipSize
));
231 Status
= EFI_SUCCESS
;
232 RemainingBytes
= *NumBytes
;
235 // To adjust the Offset with Bios/Gbe
237 // if (Address >= (UINTN)PcdGet32 (PcdFlashChipBase)) {
238 // Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
240 while (RemainingBytes
> 0) {
241 Status
= mSpiProtocol
->Execute (
253 if (EFI_ERROR (Status
)) {
256 RemainingBytes
-= SIZE_4KB
;
262 // Actual number of bytes erased
264 *NumBytes
-= RemainingBytes
;
273 Erase the whole block.
277 BaseAddress - Base address of the block to be erased.
281 EFI_SUCCESS - The command completed successfully.
282 Other - Device error or wirte-locked, operation failed.
287 IN EFI_PHYSICAL_ADDRESS BaseAddress
293 NumBytes
= BLOCK_SIZE
;
295 Status
= SpiFlashBlockErase ((UINTN
) BaseAddress
, &NumBytes
);
301 InternalCompareBlock (
302 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
311 NumBytes
= BLOCK_SIZE
;
312 CompareBuffer
= AllocatePool (NumBytes
);
313 if (CompareBuffer
== NULL
) {
314 Status
= EFI_OUT_OF_RESOURCES
;
318 Status
= SpiFlashRead ((UINTN
) BaseAddress
, &NumBytes
, CompareBuffer
);
319 if (EFI_ERROR (Status
)) {
322 CompareResult
= CompareMem (CompareBuffer
, Buffer
, BLOCK_SIZE
);
323 if (CompareResult
!= 0) {
324 Status
= EFI_VOLUME_CORRUPTED
;
328 if (CompareBuffer
!= NULL
) {
329 FreePool (CompareBuffer
);
339 Write a block of data.
343 BaseAddress - Base address of the block.
344 Buffer - Data buffer.
345 BufferSize - Size of the buffer.
349 EFI_SUCCESS - The command completed successfully.
350 EFI_INVALID_PARAMETER - Invalid parameter, can not proceed.
351 Other - Device error or wirte-locked, operation failed.
356 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
363 Status
= SpiFlashWrite ((UINTN
) BaseAddress
, &BufferSize
, Buffer
);
365 if (EFI_ERROR (Status
)) {
366 DEBUG((DEBUG_ERROR
, "\nFlash write error."));
370 WriteBackInvalidateDataCacheRange ((VOID
*) (UINTN
) BaseAddress
, BLOCK_SIZE
);
372 Status
= InternalCompareBlock (BaseAddress
, Buffer
);
373 if (EFI_ERROR (Status
)) {
374 DEBUG((DEBUG_ERROR
, "\nError when writing to BaseAddress %x with different at offset %x.", BaseAddress
, Status
));
376 DEBUG((DEBUG_INFO
, "\nVerified data written to Block at %x is correct.", BaseAddress
));
384 Perform flash write operation with progress indicator. The start and end
385 completion percentage values are passed into this function. If the requested
386 flash write operation is broken up, then completion percentage between the
387 start and end values may be passed to the provided Progress function. The
388 caller of this function is required to call the Progress function for the
389 start and end completion percentage values. This allows the Progress,
390 StartPercentage, and EndPercentage parameters to be ignored if the requested
391 flash write operation can not be broken up
393 @param[in] FirmwareType The type of firmware.
394 @param[in] FlashAddress The address of flash device to be accessed.
395 @param[in] FlashAddressType The type of flash device address.
396 @param[in] Buffer The pointer to the data buffer.
397 @param[in] Length The length of data buffer in bytes.
398 @param[in] Progress A function used report the progress of the
399 firmware update. This is an optional parameter
401 @param[in] StartPercentage The start completion percentage value that may
402 be used to report progress during the flash
404 @param[in] EndPercentage The end completion percentage value that may
405 be used to report progress during the flash
408 @retval EFI_SUCCESS The operation returns successfully.
409 @retval EFI_WRITE_PROTECTED The flash device is read only.
410 @retval EFI_UNSUPPORTED The flash device access is unsupported.
411 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
415 PerformFlashWriteWithProgress (
416 IN PLATFORM_FIRMWARE_TYPE FirmwareType
,
417 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
418 IN FLASH_ADDRESS_TYPE FlashAddressType
,
421 IN EFI_FIRMWARE_MANAGEMENT_UPDATE_IMAGE_PROGRESS Progress
, OPTIONAL
422 IN UINTN StartPercentage
,
423 IN UINTN EndPercentage
426 EFI_STATUS Status
= EFI_SUCCESS
;
428 EFI_PHYSICAL_ADDRESS Address
;
433 UINTN LpcBaseAddress
;
444 DEBUG((DEBUG_INFO
| DEBUG_ERROR
, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN
)FlashAddress
, (UINTN
)FlashAddressType
, Length
));
445 if (FlashAddressType
== FlashAddressTypeRelativeAddress
) {
446 FlashAddress
= FlashAddress
+ mInternalFdAddress
;
449 CountOfBlocks
= (UINTN
) (Length
/ BLOCK_SIZE
);
450 Address
= FlashAddress
;
452 LpcBaseAddress
= MmPciAddress (0,
453 DEFAULT_PCI_BUS_NUMBER_PCH
,
454 PCI_DEVICE_NUMBER_PCH_LPC
,
455 PCI_FUNCTION_NUMBER_PCH_LPC
,
458 BiosCntl
= MmioRead8 (LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
);
459 if ((BiosCntl
& B_PCH_LPC_BIOS_CNTL_SMM_BWP
) == B_PCH_LPC_BIOS_CNTL_SMM_BWP
) {
461 /// Clear SMM_BWP bit (D31:F0:RegDCh[5])
463 Data8And
= (UINT8
) ~B_PCH_LPC_BIOS_CNTL_SMM_BWP
;
467 LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
,
471 DEBUG((DEBUG_INFO
, "PerformFlashWrite Clear SMM_BWP bit\n"));
475 // Raise TPL to TPL_NOTIFY to block any event handler,
476 // while still allowing RaiseTPL(TPL_NOTIFY) within
477 // output driver during Print()
479 OldTpl
= gBS
->RaiseTPL (TPL_NOTIFY
);
480 for (Index
= 0; Index
< CountOfBlocks
; Index
++) {
481 if (Progress
!= NULL
) {
482 Progress (StartPercentage
+ ((Index
* (EndPercentage
- StartPercentage
)) / CountOfBlocks
));
485 // Handle block based on address and contents.
487 if (!EFI_ERROR (InternalCompareBlock (Address
, Buf
))) {
488 DEBUG((DEBUG_INFO
, "Skipping block at 0x%lx (already programmed)\n", Address
));
491 // Make updating process uninterruptable,
492 // so that the flash memory area is not accessed by other entities
493 // which may interfere with the updating process
495 Status
= InternalEraseBlock (Address
);
496 if (EFI_ERROR(Status
)) {
497 gBS
->RestoreTPL (OldTpl
);
501 Status
= InternalWriteBlock (
504 (UINT32
)(Length
> BLOCK_SIZE
? BLOCK_SIZE
: Length
)
506 if (EFI_ERROR(Status
)) {
507 gBS
->RestoreTPL (OldTpl
);
514 // Move to next block to update.
516 Address
+= BLOCK_SIZE
;
518 if (Length
> BLOCK_SIZE
) {
519 Length
-= BLOCK_SIZE
;
524 gBS
->RestoreTPL (OldTpl
);
527 if ((BiosCntl
& B_PCH_LPC_BIOS_CNTL_SMM_BWP
) == B_PCH_LPC_BIOS_CNTL_SMM_BWP
) {
529 // Restore original control setting
531 MmioWrite8 (LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
, BiosCntl
);
534 if (Progress
!= NULL
) {
535 Progress (EndPercentage
);
542 Perform flash write operation.
544 @param[in] FirmwareType The type of firmware.
545 @param[in] FlashAddress The address of flash device to be accessed.
546 @param[in] FlashAddressType The type of flash device address.
547 @param[in] Buffer The pointer to the data buffer.
548 @param[in] Length The length of data buffer in bytes.
550 @retval EFI_SUCCESS The operation returns successfully.
551 @retval EFI_WRITE_PROTECTED The flash device is read only.
552 @retval EFI_UNSUPPORTED The flash device access is unsupported.
553 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
558 IN PLATFORM_FIRMWARE_TYPE FirmwareType
,
559 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
560 IN FLASH_ADDRESS_TYPE FlashAddressType
,
565 return PerformFlashWriteWithProgress (
578 Perform microcode write operation.
580 @param[in] FlashAddress The address of flash device to be accessed.
581 @param[in] Buffer The pointer to the data buffer.
582 @param[in] Length The length of data buffer in bytes.
584 @retval EFI_SUCCESS The operation returns successfully.
585 @retval EFI_WRITE_PROTECTED The flash device is read only.
586 @retval EFI_UNSUPPORTED The flash device access is unsupported.
587 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
591 MicrocodeFlashWrite (
592 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
597 EFI_PHYSICAL_ADDRESS AlignedFlashAddress
;
604 DEBUG((DEBUG_INFO
, "MicrocodeFlashWrite - 0x%x - 0x%x\n", (UINTN
)FlashAddress
, Length
));
607 // Need make buffer 64K aligned to support ERASE
609 // [Aligned] FlashAddress [Aligned]
612 // +--------------+========+------------+
613 // | OffsetHeader | Length | OffsetTail |
614 // +--------------+========+------------+
616 // |<-----------AlignedLength----------->
618 // AlignedFlashAddress
620 OffsetHead
= FlashAddress
& (ALINGED_SIZE
- 1);
621 OffsetTail
= (FlashAddress
+ Length
) & (ALINGED_SIZE
- 1);
622 if (OffsetTail
!= 0) {
623 OffsetTail
= ALINGED_SIZE
- OffsetTail
;
626 if ((OffsetHead
!= 0) || (OffsetTail
!= 0)) {
627 AlignedFlashAddress
= FlashAddress
- OffsetHead
;
628 AlignedLength
= Length
+ OffsetHead
+ OffsetTail
;
630 AlignedBuffer
= AllocatePool(AlignedLength
);
631 if (AlignedBuffer
== NULL
) {
632 return EFI_OUT_OF_RESOURCES
;
635 // Save original buffer
637 if (OffsetHead
!= 0) {
638 CopyMem((UINT8
*)AlignedBuffer
, (VOID
*)(UINTN
)AlignedFlashAddress
, OffsetHead
);
640 if (OffsetTail
!= 0) {
641 CopyMem((UINT8
*)AlignedBuffer
+ OffsetHead
+ Length
, (VOID
*)(UINTN
)(AlignedFlashAddress
+ OffsetHead
+ Length
), OffsetTail
);
644 // Override new buffer
646 CopyMem((UINT8
*)AlignedBuffer
+ OffsetHead
, Buffer
, Length
);
648 AlignedFlashAddress
= FlashAddress
;
649 AlignedBuffer
= Buffer
;
650 AlignedLength
= Length
;
653 Status
= PerformFlashWrite(
654 PlatformFirmwareTypeSystemFirmware
,
656 FlashAddressTypeAbsoluteAddress
,
660 if ((OffsetHead
!= 0) || (OffsetTail
!= 0)) {
661 FreePool (AlignedBuffer
);
667 Platform Flash Access Lib Constructor.
671 PerformFlashAccessLibConstructor (
676 mInternalFdAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)PcdGet32(PcdFlashAreaBaseAddress
);
677 DEBUG((DEBUG_INFO
, "PcdFlashAreaBaseAddress - 0x%x\n", mInternalFdAddress
));
679 Status
= gBS
->LocateProtocol (
680 &gEfiSpiProtocolGuid
,
682 (VOID
**) &mSpiProtocol
684 ASSERT_EFI_ERROR(Status
);