2 Platform Flash Access library.
4 Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
12 #include <Library/BaseLib.h>
13 #include <Library/BaseMemoryLib.h>
14 #include <Library/DebugLib.h>
15 #include <Library/PcdLib.h>
16 #include <Library/PlatformFlashAccessLib.h>
17 //#include <Library/FlashDeviceLib.h>
18 #include <Library/MemoryAllocationLib.h>
19 #include <Protocol/Spi.h>
20 #include <Library/CacheMaintenanceLib.h>
21 #include "PchAccess.h"
22 #include <Library/IoLib.h>
23 #include <Library/UefiLib.h>
24 #include <Library/UefiBootServicesTableLib.h>
25 #include <Library/PrintLib.h>
27 //#define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
28 //#define ALINGED_SIZE SECTOR_SIZE_64KB
30 #define BLOCK_SIZE 0x1000
31 #define ALINGED_SIZE BLOCK_SIZE
33 #define R_PCH_LPC_BIOS_CNTL 0xDC
34 #define B_PCH_LPC_BIOS_CNTL_SMM_BWP 0x20 ///< SMM BIOS write protect disable
37 // Prefix Opcode Index on the host SPI controller
40 SPI_WREN
, // Prefix Opcode 0: Write Enable
41 SPI_EWSR
, // Prefix Opcode 1: Enable Write Status Register
42 } PREFIX_OPCODE_INDEX
;
44 // Opcode Menu Index on the host SPI controller
47 SPI_READ_ID
, // Opcode 0: READ ID, Read cycle with address
48 SPI_READ
, // Opcode 1: READ, Read cycle with address
49 SPI_RDSR
, // Opcode 2: Read Status Register, No address
50 SPI_WRDI_SFDP
, // Opcode 3: Write Disable or Discovery Parameters, No address
51 SPI_SERASE
, // Opcode 4: Sector Erase (4KB), Write cycle with address
52 SPI_BERASE
, // Opcode 5: Block Erase (32KB), Write cycle with address
53 SPI_PROG
, // Opcode 6: Byte Program, Write cycle with address
54 SPI_WRSR
, // Opcode 7: Write Status Register, No address
57 STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress
;
59 EFI_SPI_PROTOCOL
*mSpiProtocol
;
62 Read NumBytes bytes of data from the address specified by
65 @param[in] Address The starting physical address of the read.
66 @param[in,out] NumBytes On input, the number of bytes to read. On output, the number
67 of bytes actually read.
68 @param[out] Buffer The destination data buffer for the read.
70 @retval EFI_SUCCESS Opertion is successful.
71 @retval EFI_DEVICE_ERROR If there is any device errors.
78 IN OUT UINT32
*NumBytes
,
82 EFI_STATUS Status
= EFI_SUCCESS
;
85 ASSERT ((NumBytes
!= NULL
) && (Buffer
!= NULL
));
88 //if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) {
89 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
91 Status
= mSpiProtocol
->Execute (
107 Write NumBytes bytes of data from Buffer to the address specified by
110 @param[in] Address The starting physical address of the write.
111 @param[in,out] NumBytes On input, the number of bytes to write. On output,
112 the actual number of bytes written.
113 @param[in] Buffer The source data buffer for the write.
115 @retval EFI_SUCCESS Opertion is successful.
116 @retval EFI_DEVICE_ERROR If there is any device errors.
123 IN OUT UINT32
*NumBytes
,
130 UINT32 RemainingBytes
;
132 ASSERT ((NumBytes
!= NULL
) && (Buffer
!= NULL
));
133 ASSERT (Address
>= (UINTN
)PcdGet32 (PcdFlashChipBase
));
135 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
137 ASSERT ((*NumBytes
+ Offset
) <= (UINTN
)PcdGet32 (PcdFlashChipSize
));
139 Status
= EFI_SUCCESS
;
140 RemainingBytes
= *NumBytes
;
142 while (RemainingBytes
> 0) {
143 if (RemainingBytes
> SIZE_4KB
) {
146 Length
= RemainingBytes
;
148 Status
= mSpiProtocol
->Execute (
160 if (EFI_ERROR (Status
)) {
163 RemainingBytes
-= Length
;
169 // Actual number of bytes written
171 *NumBytes
-= RemainingBytes
;
179 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
186 BlockSize
= BLOCK_SIZE
;
188 Status
= SpiFlashRead ((UINTN
) BaseAddress
, &BlockSize
, ReadBuffer
);
194 Erase the block starting at Address.
196 @param[in] Address The starting physical address of the block to be erased.
197 This library assume that caller garantee that the PAddress
198 is at the starting address of this block.
199 @param[in] NumBytes On input, the number of bytes of the logical block to be erased.
200 On output, the actual number of bytes erased.
202 @retval EFI_SUCCESS. Opertion is successful.
203 @retval EFI_DEVICE_ERROR If there is any device errors.
215 UINTN RemainingBytes
;
217 ASSERT (NumBytes
!= NULL
);
218 ASSERT (Address
>= (UINTN
)PcdGet32 (PcdFlashChipBase
));
220 Offset
= Address
- (UINTN
)PcdGet32 (PcdFlashChipBase
);
222 ASSERT ((*NumBytes
% SIZE_4KB
) == 0);
223 ASSERT ((*NumBytes
+ Offset
) <= (UINTN
)PcdGet32 (PcdFlashChipSize
));
225 Status
= EFI_SUCCESS
;
226 RemainingBytes
= *NumBytes
;
229 // To adjust the Offset with Bios/Gbe
231 // if (Address >= (UINTN)PcdGet32 (PcdFlashChipBase)) {
232 // Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);
234 while (RemainingBytes
> 0) {
235 Status
= mSpiProtocol
->Execute (
247 if (EFI_ERROR (Status
)) {
250 RemainingBytes
-= SIZE_4KB
;
256 // Actual number of bytes erased
258 *NumBytes
-= RemainingBytes
;
267 Erase the whole block.
271 BaseAddress - Base address of the block to be erased.
275 EFI_SUCCESS - The command completed successfully.
276 Other - Device error or wirte-locked, operation failed.
281 IN EFI_PHYSICAL_ADDRESS BaseAddress
287 NumBytes
= BLOCK_SIZE
;
289 Status
= SpiFlashBlockErase ((UINTN
) BaseAddress
, &NumBytes
);
295 InternalCompareBlock (
296 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
305 NumBytes
= BLOCK_SIZE
;
306 CompareBuffer
= AllocatePool (NumBytes
);
307 if (CompareBuffer
== NULL
) {
308 Status
= EFI_OUT_OF_RESOURCES
;
312 Status
= SpiFlashRead ((UINTN
) BaseAddress
, &NumBytes
, CompareBuffer
);
313 if (EFI_ERROR (Status
)) {
316 CompareResult
= CompareMem (CompareBuffer
, Buffer
, BLOCK_SIZE
);
317 if (CompareResult
!= 0) {
318 Status
= EFI_VOLUME_CORRUPTED
;
322 if (CompareBuffer
!= NULL
) {
323 FreePool (CompareBuffer
);
333 Write a block of data.
337 BaseAddress - Base address of the block.
338 Buffer - Data buffer.
339 BufferSize - Size of the buffer.
343 EFI_SUCCESS - The command completed successfully.
344 EFI_INVALID_PARAMETER - Invalid parameter, can not proceed.
345 Other - Device error or wirte-locked, operation failed.
350 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
357 Status
= SpiFlashWrite ((UINTN
) BaseAddress
, &BufferSize
, Buffer
);
359 if (EFI_ERROR (Status
)) {
360 DEBUG((DEBUG_ERROR
, "\nFlash write error."));
364 WriteBackInvalidateDataCacheRange ((VOID
*) (UINTN
) BaseAddress
, BLOCK_SIZE
);
366 Status
= InternalCompareBlock (BaseAddress
, Buffer
);
367 if (EFI_ERROR (Status
)) {
368 DEBUG((DEBUG_ERROR
, "\nError when writing to BaseAddress %x with different at offset %x.", BaseAddress
, Status
));
370 DEBUG((DEBUG_INFO
, "\nVerified data written to Block at %x is correct.", BaseAddress
));
378 Perform flash write operation with progress indicator. The start and end
379 completion percentage values are passed into this function. If the requested
380 flash write operation is broken up, then completion percentage between the
381 start and end values may be passed to the provided Progress function. The
382 caller of this function is required to call the Progress function for the
383 start and end completion percentage values. This allows the Progress,
384 StartPercentage, and EndPercentage parameters to be ignored if the requested
385 flash write operation can not be broken up
387 @param[in] FirmwareType The type of firmware.
388 @param[in] FlashAddress The address of flash device to be accessed.
389 @param[in] FlashAddressType The type of flash device address.
390 @param[in] Buffer The pointer to the data buffer.
391 @param[in] Length The length of data buffer in bytes.
392 @param[in] Progress A function used report the progress of the
393 firmware update. This is an optional parameter
395 @param[in] StartPercentage The start completion percentage value that may
396 be used to report progress during the flash
398 @param[in] EndPercentage The end completion percentage value that may
399 be used to report progress during the flash
402 @retval EFI_SUCCESS The operation returns successfully.
403 @retval EFI_WRITE_PROTECTED The flash device is read only.
404 @retval EFI_UNSUPPORTED The flash device access is unsupported.
405 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
409 PerformFlashWriteWithProgress (
410 IN PLATFORM_FIRMWARE_TYPE FirmwareType
,
411 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
412 IN FLASH_ADDRESS_TYPE FlashAddressType
,
415 IN EFI_FIRMWARE_MANAGEMENT_UPDATE_IMAGE_PROGRESS Progress
, OPTIONAL
416 IN UINTN StartPercentage
,
417 IN UINTN EndPercentage
420 EFI_STATUS Status
= EFI_SUCCESS
;
422 EFI_PHYSICAL_ADDRESS Address
;
427 UINTN LpcBaseAddress
;
438 DEBUG((DEBUG_INFO
| DEBUG_ERROR
, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN
)FlashAddress
, (UINTN
)FlashAddressType
, Length
));
439 if (FlashAddressType
== FlashAddressTypeRelativeAddress
) {
440 FlashAddress
= FlashAddress
+ mInternalFdAddress
;
443 CountOfBlocks
= (UINTN
) (Length
/ BLOCK_SIZE
);
444 Address
= FlashAddress
;
446 LpcBaseAddress
= MmPciAddress (0,
447 DEFAULT_PCI_BUS_NUMBER_PCH
,
448 PCI_DEVICE_NUMBER_PCH_LPC
,
449 PCI_FUNCTION_NUMBER_PCH_LPC
,
452 BiosCntl
= MmioRead8 (LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
);
453 if ((BiosCntl
& B_PCH_LPC_BIOS_CNTL_SMM_BWP
) == B_PCH_LPC_BIOS_CNTL_SMM_BWP
) {
455 /// Clear SMM_BWP bit (D31:F0:RegDCh[5])
457 Data8And
= (UINT8
) ~B_PCH_LPC_BIOS_CNTL_SMM_BWP
;
461 LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
,
465 DEBUG((DEBUG_INFO
, "PerformFlashWrite Clear SMM_BWP bit\n"));
469 // Raise TPL to TPL_NOTIFY to block any event handler,
470 // while still allowing RaiseTPL(TPL_NOTIFY) within
471 // output driver during Print()
473 OldTpl
= gBS
->RaiseTPL (TPL_NOTIFY
);
474 for (Index
= 0; Index
< CountOfBlocks
; Index
++) {
475 if (Progress
!= NULL
) {
476 Progress (StartPercentage
+ ((Index
* (EndPercentage
- StartPercentage
)) / CountOfBlocks
));
479 // Handle block based on address and contents.
481 if (!EFI_ERROR (InternalCompareBlock (Address
, Buf
))) {
482 DEBUG((DEBUG_INFO
, "Skipping block at 0x%lx (already programmed)\n", Address
));
485 // Make updating process uninterruptable,
486 // so that the flash memory area is not accessed by other entities
487 // which may interfere with the updating process
489 Status
= InternalEraseBlock (Address
);
490 if (EFI_ERROR(Status
)) {
491 gBS
->RestoreTPL (OldTpl
);
495 Status
= InternalWriteBlock (
498 (UINT32
)(Length
> BLOCK_SIZE
? BLOCK_SIZE
: Length
)
500 if (EFI_ERROR(Status
)) {
501 gBS
->RestoreTPL (OldTpl
);
508 // Move to next block to update.
510 Address
+= BLOCK_SIZE
;
512 if (Length
> BLOCK_SIZE
) {
513 Length
-= BLOCK_SIZE
;
518 gBS
->RestoreTPL (OldTpl
);
521 if ((BiosCntl
& B_PCH_LPC_BIOS_CNTL_SMM_BWP
) == B_PCH_LPC_BIOS_CNTL_SMM_BWP
) {
523 // Restore original control setting
525 MmioWrite8 (LpcBaseAddress
+ R_PCH_LPC_BIOS_CNTL
, BiosCntl
);
528 if (Progress
!= NULL
) {
529 Progress (EndPercentage
);
533 return EFI_WRITE_PROTECTED
;
540 Perform flash write operation.
542 @param[in] FirmwareType The type of firmware.
543 @param[in] FlashAddress The address of flash device to be accessed.
544 @param[in] FlashAddressType The type of flash device address.
545 @param[in] Buffer The pointer to the data buffer.
546 @param[in] Length The length of data buffer in bytes.
548 @retval EFI_SUCCESS The operation returns successfully.
549 @retval EFI_WRITE_PROTECTED The flash device is read only.
550 @retval EFI_UNSUPPORTED The flash device access is unsupported.
551 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
556 IN PLATFORM_FIRMWARE_TYPE FirmwareType
,
557 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
558 IN FLASH_ADDRESS_TYPE FlashAddressType
,
563 return PerformFlashWriteWithProgress (
576 Perform microcode write operation.
578 @param[in] FlashAddress The address of flash device to be accessed.
579 @param[in] Buffer The pointer to the data buffer.
580 @param[in] Length The length of data buffer in bytes.
582 @retval EFI_SUCCESS The operation returns successfully.
583 @retval EFI_WRITE_PROTECTED The flash device is read only.
584 @retval EFI_UNSUPPORTED The flash device access is unsupported.
585 @retval EFI_INVALID_PARAMETER The input parameter is not valid.
589 MicrocodeFlashWrite (
590 IN EFI_PHYSICAL_ADDRESS FlashAddress
,
595 EFI_PHYSICAL_ADDRESS AlignedFlashAddress
;
602 DEBUG((DEBUG_INFO
, "MicrocodeFlashWrite - 0x%x - 0x%x\n", (UINTN
)FlashAddress
, Length
));
605 // Need make buffer 64K aligned to support ERASE
607 // [Aligned] FlashAddress [Aligned]
610 // +--------------+========+------------+
611 // | OffsetHeader | Length | OffsetTail |
612 // +--------------+========+------------+
614 // |<-----------AlignedLength----------->
616 // AlignedFlashAddress
618 OffsetHead
= FlashAddress
& (ALINGED_SIZE
- 1);
619 OffsetTail
= (FlashAddress
+ Length
) & (ALINGED_SIZE
- 1);
620 if (OffsetTail
!= 0) {
621 OffsetTail
= ALINGED_SIZE
- OffsetTail
;
624 if ((OffsetHead
!= 0) || (OffsetTail
!= 0)) {
625 AlignedFlashAddress
= FlashAddress
- OffsetHead
;
626 AlignedLength
= Length
+ OffsetHead
+ OffsetTail
;
628 AlignedBuffer
= AllocatePool(AlignedLength
);
629 if (AlignedBuffer
== NULL
) {
630 return EFI_OUT_OF_RESOURCES
;
633 // Save original buffer
635 if (OffsetHead
!= 0) {
636 CopyMem((UINT8
*)AlignedBuffer
, (VOID
*)(UINTN
)AlignedFlashAddress
, OffsetHead
);
638 if (OffsetTail
!= 0) {
639 CopyMem((UINT8
*)AlignedBuffer
+ OffsetHead
+ Length
, (VOID
*)(UINTN
)(AlignedFlashAddress
+ OffsetHead
+ Length
), OffsetTail
);
642 // Override new buffer
644 CopyMem((UINT8
*)AlignedBuffer
+ OffsetHead
, Buffer
, Length
);
646 AlignedFlashAddress
= FlashAddress
;
647 AlignedBuffer
= Buffer
;
648 AlignedLength
= Length
;
651 Status
= PerformFlashWrite(
652 PlatformFirmwareTypeSystemFirmware
,
654 FlashAddressTypeAbsoluteAddress
,
658 if ((OffsetHead
!= 0) || (OffsetTail
!= 0)) {
659 FreePool (AlignedBuffer
);
665 Platform Flash Access Lib Constructor.
669 PerformFlashAccessLibConstructor (
674 mInternalFdAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)PcdGet32(PcdFlashAreaBaseAddress
);
675 DEBUG((DEBUG_INFO
, "PcdFlashAreaBaseAddress - 0x%x\n", mInternalFdAddress
));
677 Status
= gBS
->LocateProtocol (
678 &gEfiSpiProtocolGuid
,
680 (VOID
**) &mSpiProtocol
682 ASSERT_EFI_ERROR(Status
);