Vlv2TbltDevicePkg/Include/Library/CpuIA32.h

   1 /*++
   2
   3   Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7
   8
   9
  10 Module Name:
  11
  12   CpuIA32.h
  13
  14 Abstract:
  15
  16 --*/
  17
  18 #ifndef _CPU_IA32_H
  19 #define _CPU_IA32_H
  20
  21 typedef struct {
  22   UINT32  RegEax;
  23   UINT32  RegEbx;
  24   UINT32  RegEcx;
  25   UINT32  RegEdx;
  26 } EFI_CPUID_REGISTER;
  27
  28 typedef struct {
  29   UINT32  HeaderVersion;
  30   UINT32  UpdateRevision;
  31   UINT32  Date;
  32   UINT32  ProcessorId;
  33   UINT32  Checksum;
  34   UINT32  LoaderRevision;
  35   UINT32  ProcessorFlags;
  36   UINT32  DataSize;
  37   UINT32  TotalSize;
  38   UINT8   Reserved[12];
  39 } EFI_CPU_MICROCODE_HEADER;
  40
  41 typedef struct {
  42   UINT32  ExtendedSignatureCount;
  43   UINT32  ExtendedTableChecksum;
  44   UINT8   Reserved[12];
  45 } EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
  46
  47 typedef struct {
  48   UINT32  ProcessorSignature;
  49   UINT32  ProcessorFlag;
  50   UINT32  ProcessorChecksum;
  51 } EFI_CPU_MICROCODE_EXTENDED_TABLE;
  52
  53 typedef struct {
  54   UINT32  Stepping       : 4;
  55   UINT32  Model          : 4;
  56   UINT32  Family         : 4;
  57   UINT32  Type           : 2;
  58   UINT32  Reserved1      : 2;
  59   UINT32  ExtendedModel  : 4;
  60   UINT32  ExtendedFamily : 8;
  61   UINT32  Reserved2      : 4;
  62 } EFI_CPU_VERSION;
  63
  64 #define EFI_CPUID_SIGNATURE                   0x0
  65 #define EFI_CPUID_VERSION_INFO                0x1
  66 #define EFI_CPUID_CACHE_INFO                  0x2
  67 #define EFI_CPUID_SERIAL_NUMBER               0x3
  68 #define EFI_CPUID_EXTENDED_FUNCTION           0x80000000
  69 #define EFI_CPUID_EXTENDED_CPU_SIG            0x80000001
  70 #define EFI_CPUID_BRAND_STRING1               0x80000002
  71 #define EFI_CPUID_BRAND_STRING2               0x80000003
  72 #define EFI_CPUID_BRAND_STRING3               0x80000004
  73
  74 #define EFI_MSR_IA32_PLATFORM_ID              0x17
  75 #define EFI_MSR_IA32_APIC_BASE                0x1B
  76 #define EFI_MSR_EBC_HARD_POWERON              0x2A
  77 #define EFI_MSR_EBC_SOFT_POWERON              0x2B
  78 #define BINIT_DRIVER_DISABLE                  0x40
  79 #define INTERNAL_MCERR_DISABLE                0x20
  80 #define INITIATOR_MCERR_DISABLE               0x10
  81 #define EFI_MSR_EBC_FREQUENCY_ID              0x2C
  82 #define EFI_MSR_IA32_BIOS_UPDT_TRIG           0x79
  83 #define EFI_MSR_IA32_BIOS_SIGN_ID             0x8B
  84 #define EFI_MSR_PSB_CLOCK_STATUS              0xCD
  85 #define EFI_APIC_GLOBAL_ENABLE                0x800
  86 #define EFI_MSR_IA32_MISC_ENABLE              0x1A0
  87 #define LIMIT_CPUID_MAXVAL_ENABLE_BIT         0x00400000
  88 #define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT  0x00000008
  89 #define COMPATIBLE_FPU_OPCODE_ENABLE_BIT      0x00000004
  90 #define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
  91 #define FAST_STRING_ENABLE_BIT                0x00000001
  92
  93 #define EFI_CACHE_VARIABLE_MTRR_BASE          0x200
  94 #define EFI_CACHE_VARIABLE_MTRR_END           0x20F
  95 #define EFI_CACHE_IA32_MTRR_DEF_TYPE          0x2FF
  96 #define EFI_CACHE_MTRR_VALID                  0x800
  97 #define EFI_CACHE_FIXED_MTRR_VALID            0x400
  98 #define EFI_CACHE_VALID_ADDRESS               0xFFFFFF000
  99 #define EFI_MSR_VALID_MASK                    0xFFFFFFFFF
 100 #define EFI_CACHE_VALID_EXTENDED_ADDRESS      0xFFFFFFFFFF000
 101 #define EFI_MSR_VALID_EXTENDED_MASK           0xFFFFFFFFFFFFF
 102
 103 #define EFI_IA32_MTRR_FIX64K_00000            0x250
 104 #define EFI_IA32_MTRR_FIX16K_80000            0x258
 105 #define EFI_IA32_MTRR_FIX16K_A0000            0x259
 106 #define EFI_IA32_MTRR_FIX4K_C0000             0x268
 107 #define EFI_IA32_MTRR_FIX4K_C8000             0x269
 108 #define EFI_IA32_MTRR_FIX4K_D0000             0x26A
 109 #define EFI_IA32_MTRR_FIX4K_D8000             0x26B
 110 #define EFI_IA32_MTRR_FIX4K_E0000             0x26C
 111 #define EFI_IA32_MTRR_FIX4K_E8000             0x26D
 112 #define EFI_IA32_MTRR_FIX4K_F0000             0x26E
 113 #define EFI_IA32_MTRR_FIX4K_F8000             0x26F
 114
 115 #define EFI_IA32_MCG_CAP                      0x179
 116 #define EFI_IA32_MCG_CTL                      0x17B
 117 #define EFI_IA32_MC0_CTL                      0x400
 118 #define EFI_IA32_MC0_STATUS                   0x401
 119
 120 #define EFI_IA32_PERF_STATUS                  0x198
 121 #define EFI_IA32_PERF_CTL                     0x199
 122
 123 #define EFI_CACHE_UNCACHEABLE                 0
 124 #define EFI_CACHE_WRITECOMBINING              1
 125 #define EFI_CACHE_WRITETHROUGH                4
 126 #define EFI_CACHE_WRITEPROTECTED              5
 127 #define EFI_CACHE_WRITEBACK                   6
 128
 129 //
 130 // Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
 131 //
 132 #define EfiMakeCpuVersion(f, m, s)         \
 133   (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
 134
 135 /**
 136   Halt the Cpu
 137
 138   @param[in] None
 139
 140   @retval None
 141
 142 **/
 143 VOID
 144 EFIAPI
 145 EfiHalt (
 146   VOID
 147   );
 148
 149 /**
 150   Write back and invalidate the Cpu cache
 151
 152   @param[in] None
 153
 154   @retval None
 155
 156 **/
 157 VOID
 158 EFIAPI
 159 EfiWbinvd (
 160   VOID
 161   );
 162
 163 /**
 164   Invalidate the Cpu cache
 165
 166    @param[in] None
 167
 168    @retval None
 169
 170 **/
 171 VOID
 172 EFIAPI
 173 EfiInvd (
 174   VOID
 175   );
 176
 177 /**
 178   Get the Cpu info by execute the CPUID instruction
 179
 180   @param[in] RegisterInEax The input value to put into register EAX
 181   @param[in] Regs          The Output value
 182
 183   @retval None
 184
 185 **/
 186 VOID
 187 EFIAPI
 188 EfiCpuid (
 189   IN  UINT32                 RegisterInEax,
 190   OUT EFI_CPUID_REGISTER     *Regs
 191   );
 192
 193 /**
 194   When RegisterInEax != 4, the functionality is the same as EfiCpuid.
 195   When RegisterInEax == 4, the function return the deterministic cache
 196   parameters by excuting the CPUID instruction.
 197
 198   @param[in]  RegisterInEax  The input value to put into register EAX.
 199   @param[in]  CacheLevel     The deterministic cache level.
 200   @param[in]  Regs           The Output value.
 201
 202   @retval None
 203
 204 **/
 205 VOID
 206 EFIAPI
 207 EfiCpuidExt (
 208   IN  UINT32                 RegisterInEax,
 209   IN  UINT32                 CacheLevel,
 210   OUT EFI_CPUID_REGISTER     *Regs
 211   );
 212
 213 /**
 214   Read Cpu MSR
 215
 216   @param[in] Index  The index value to select the register
 217
 218   @retval           Return the read data
 219
 220 **/
 221 UINT64
 222 EFIAPI
 223 EfiReadMsr (
 224   IN UINT32     Index
 225   );
 226
 227 /**
 228   Write Cpu MSR
 229
 230   @param[in] Index  The index value to select the register
 231   @param[in] Value  The value to write to the selected register
 232
 233   @retval None
 234
 235 **/
 236 VOID
 237 EFIAPI
 238 EfiWriteMsr (
 239   IN UINT32     Index,
 240   IN UINT64     Value
 241   );
 242
 243 /**
 244   Read Time stamp
 245
 246   @param[in] None
 247
 248   @retval Return the read data
 249
 250 **/
 251 UINT64
 252 EFIAPI
 253 EfiReadTsc (
 254   VOID
 255   );
 256
 257 /**
 258   Writing back and invalidate the cache,then diable it
 259
 260   @param[in] None
 261
 262   @retval None
 263
 264 **/
 265 VOID
 266 EFIAPI
 267 EfiDisableCache (
 268   VOID
 269   );
 270
 271 /**
 272   Invalidate the cache,then Enable it
 273
 274   @param[in] None
 275
 276   @retval None
 277
 278 **/
 279 VOID
 280 EFIAPI
 281 EfiEnableCache (
 282   VOID
 283   );
 284
 285 /**
 286   Get Eflags
 287
 288   @param[in] None
 289
 290   @retval Return the Eflags value
 291
 292 **/
 293 UINT32
 294 EFIAPI
 295 EfiGetEflags (
 296   VOID
 297   );
 298
 299 /**
 300   Disable Interrupts
 301
 302   @param[in] None
 303
 304   @retval None
 305
 306 **/
 307 VOID
 308 EFIAPI
 309 EfiDisableInterrupts (
 310   VOID
 311   );
 312
 313 /**
 314   Enable Interrupts
 315
 316   @param[in] None
 317
 318   @retval None
 319
 320 **/
 321 VOID
 322 EFIAPI
 323 EfiEnableInterrupts (
 324   VOID
 325   );
 326
 327 /**
 328   Extract CPU detail version infomation
 329
 330   @param[in] FamilyId    FamilyId, including ExtendedFamilyId
 331   @param[in] Model       Model, including ExtendedModel
 332   @param[in] SteppingId  SteppingId
 333   @param[in] Processor   Processor
 334
 335 **/
 336 VOID
 337 EFIAPI
 338 EfiCpuVersion (
 339   IN   UINT16  *FamilyId,    OPTIONAL
 340   IN   UINT8   *Model,       OPTIONAL
 341   IN   UINT8   *SteppingId,  OPTIONAL
 342   IN   UINT8   *Processor    OPTIONAL
 343   );
 344
 345 #endif