]> git.proxmox.com Git - mirror_edk2.git/blob - Vlv2TbltDevicePkg/Include/Library/SpiFlash.H
Vlv2TbltDevicePkg: Replace BSD License with BSD+Patent License
[mirror_edk2.git] / Vlv2TbltDevicePkg / Include / Library / SpiFlash.H
1 /*++
2
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
4
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7
8 **/
9
10 #ifndef _SPIFlash_H_
11 #define _SPIFlash_H_
12
13 #include <Protocol/Spi.h>
14
15 //EFI_STATUS SpiFlashLock(BOOLEAN Lock);
16 //EFI_STATUS SpiFlashInit(void);
17
18 typedef enum {
19 EnumSpiFlashW25Q64,
20 EnumSpiFlashAT25DF321A,
21 EnumSpiFlashAT26DF321,
22 EnumSpiFlashAT25DF641,
23 EnumSpiFlashW25Q16,
24 EnumSpiFlashW25Q32,
25 EnumSpiFlashW25X32,
26 EnumSpiFlashW25X64,
27 EnumSpiFlashW25Q128,
28 EnumSpiFlashMX25L16,
29 EnumSpiFlashMX25L32,
30 EnumSpiFlashMX25L64,
31 EnumSpiFlashMX25L128,
32 EnumSpiFlashMX25U6435F,
33 EnumSpiFlashSST25VF016B,
34 EnumSpiFlashSST25VF064C,
35 EnumSpiFlashN25Q064,
36 EnumSpiFlashM25PX16,
37 EnumSpiFlashN25Q032,
38 EnumSpiFlashM25PX32,
39 EnumSpiFlashM25PX64,
40 EnumSpiFlashN25Q128,
41 EnumSpiFlashEN25Q16,
42 EnumSpiFlashEN25Q32,
43 EnumSpiFlashEN25Q64,
44 EnumSpiFlashEN25Q128,
45 EnumSpiFlashA25L016,
46 EnumSpiFlashMax
47 } SPI_FLASH_TYPES_SUPPORTED;
48
49 //
50 // Serial Flash VendorId and DeviceId
51 //
52 #define SF_VENDOR_ID_ATMEL 0x1F
53 #define SF_DEVICE_ID0_AT26DF321 0x47
54 #define SF_DEVICE_ID1_AT26DF321 0x00
55 #define SF_DEVICE_ID0_AT25DF321A 0x47
56 #define SF_DEVICE_ID1_AT25DF321A 0x01
57 #define SF_DEVICE_ID0_AT25DF641 0x48
58 #define SF_DEVICE_ID1_AT25DF641 0x00
59
60 #define SF_VENDOR_ID_WINBOND 0xEF
61 #define SF_DEVICE_ID0_W25XXX 0x30
62 #define SF_DEVICE_ID1_W25X32 0x16
63 #define SF_DEVICE_ID1_W25X64 0x17
64 #define SF_DEVICE_ID0_W25QXX 0x40
65 #define SF_DEVICE_ID1_W25Q16 0x15
66 #define SF_DEVICE_ID1_W25Q32 0x16
67 #define SF_DEVICE_ID1_W25Q64 0x17
68 #define SF_DEVICE_ID1_W25Q128 0x18
69
70 #define SF_VENDOR_ID_MACRONIX 0xC2
71 #define SF_DEVICE_ID0_MX25LXX 0x20
72 #define SF_DEVICE_ID1_MX25L16 0x15
73 #define SF_DEVICE_ID1_MX25L32 0x16
74 #define SF_DEVICE_ID1_MX25L64 0x17
75 #define SF_DEVICE_ID1_MX25L128 0x18
76 #define SF_DEVICE_ID0_MX25UXX 0x25
77 #define SF_DEVICE_ID1_MX25U6435F 0x37
78
79 #define SF_VENDOR_ID_NUMONYX 0x20
80 #define SF_DEVICE_ID0_N25Q064 0xBB
81 #define SF_DEVICE_ID1_N25Q064 0x17
82 #define SF_DEVICE_ID0_M25PXXX 0x71
83 #define SF_DEVICE_ID0_N25QXXX 0xBA
84 #define SF_DEVICE_ID1_M25PX16 0x15
85 #define SF_DEVICE_ID1_N25Q032 0x16
86 #define SF_DEVICE_ID1_M25PX32 0x16
87 #define SF_DEVICE_ID1_M25PX64 0x17
88 #define SF_DEVICE_ID1_N25Q128 0x18
89
90 #define SF_VENDOR_ID_SST 0xBF
91 #define SF_DEVICE_ID0_SST25VF0XXX 0x25
92 #define SF_DEVICE_ID1_SST25VF016B 0x41
93 #define SF_DEVICE_ID1_SST25VF064C 0x4B
94
95 #define SF_VENDOR_ID_EON 0x1C
96 #define SF_DEVICE_ID0_EN25QXX 0x30
97 #define SF_DEVICE_ID1_EN25Q16 0x15
98 #define SF_DEVICE_ID1_EN25Q32 0x16
99 #define SF_DEVICE_ID1_EN25Q64 0x17
100 #define SF_DEVICE_ID1_EN25Q128 0x18
101
102 #define SF_VENDOR_ID_AMIC 0x37
103 #define SF_DEVICE_ID0_A25L016 0x30
104 #define SF_DEVICE_ID1_A25L016 0x15
105
106 #define ATMEL_AT26DF321_SIZE 0x00400000
107 #define ATMEL_AT25DF321A_SIZE 0x00400000
108 #define ATMEL_AT25DF641_SIZE 0x00800000
109 #define WINBOND_W25X32_SIZE 0x00400000
110 #define WINBOND_W25X64_SIZE 0x00800000
111 #define WINBOND_W25Q16_SIZE 0x00200000
112 #define WINBOND_W25Q32_SIZE 0x00400000
113 #define WINBOND_W25Q64_SIZE 0x00800000
114 #define WINBOND_W25Q128_SIZE 0x01000000
115 #define SST_SST25VF016B_SIZE 0x00200000
116 #define SST_SST25VF064C_SIZE 0x00800000
117 #define MACRONIX_MX25L16_SIZE 0x00200000
118 #define MACRONIX_MX25L32_SIZE 0x00400000
119 #define MACRONIX_MX25L64_SIZE 0x00800000
120 #define MACRONIX_MX25U64_SIZE 0x00800000
121 #define MACRONIX_MX25L128_SIZE 0x01000000
122 #define NUMONYX_M25PX16_SIZE 0x00400000
123 #define NUMONYX_N25Q032_SIZE 0x00400000
124 #define NUMONYX_M25PX32_SIZE 0x00400000
125 #define NUMONYX_M25PX64_SIZE 0x00800000
126 #define NUMONYX_N25Q064_SIZE 0x00800000
127 #define NUMONYX_N25Q128_SIZE 0x01000000
128 #define EON_EN25Q16_SIZE 0x00200000
129 #define EON_EN25Q32_SIZE 0x00400000
130 #define EON_EN25Q64_SIZE 0x00800000
131 #define EON_EN25Q128_SIZE 0x01000000
132 #define AMIC_A25L16_SIZE 0x00200000
133
134 #define SF_VENDOR_ID_SST 0xBF
135 #define SF_DEVICE_ID0_25LF080A 0x25
136 #define SF_DEVICE_ID1_25LF080A 0x8E
137 #define SF_DEVICE_ID0_25VF016B 0x25
138 #define SF_DEVICE_ID1_25VF016B 0x41
139
140 #define SF_VENDOR_ID_ATMEL 0x1F
141 #define SF_DEVICE_ID0_AT26DF321 0x47
142 #define SF_DEVICE_ID1_AT26DF321 0x00
143
144 #define SF_VENDOR_ID_STM 0x20
145 #define SF_DEVICE_ID0_M25P32 0x20
146 #define SF_DEVICE_ID1_M25P32 0x16
147
148 #define SF_VENDOR_ID_WINBOND 0xEF
149 #define SF_DEVICE_ID0_W25XXX 0x30
150
151 #define SF_DEVICE_ID1_W25X80 0x14
152 #define SF_DEVICE_ID1_W25X16 0x15
153 #define SF_DEVICE_ID1_W25X32 0x16
154 #define SF_DEVICE_ID1_W25X64 0x17
155
156 #define SF_VENDOR_ID_MX 0xC2
157 #define SF_DEVICE_ID0_25L1605A 0x20
158 #define SF_DEVICE_ID1_25L1605A 0x15
159
160 #define SF_VENDOR_ID_NUMONYX 0x20
161 #define SF_DEVICE_ID0_M25PX16 0x71
162 #define SF_DEVICE_ID1_M25PX16 0x15
163
164 #define SST_25LF080A_SIZE 0x00100000
165 #define SST_25LF016B_SIZE 0x00200000
166 #define ATMEL_AT26DF321_SIZE 0x00400000
167 #define STM_M25P32_SIZE 0x00400000
168 #define WINBOND_W25X80_SIZE 0x00100000
169 #define WINBOND_W25X16_SIZE 0x00200000
170 #define WINBOND_W25X32_SIZE 0x00400000
171 #define WINBOND_W25X64_SIZE 0x00800000
172 #define MX_25L1605A_SIZE 0x00200000
173
174 //
175 // Physical Sector Size on the Serial Flash device
176 //
177 #define SF_SECTOR_SIZE 0x1000
178 #define SF_BLOCK_SIZE 0x8000
179
180 //
181 // Serial Flash Status Register definitions
182 //
183 #define SF_SR_BUSY 0x01 // Indicates if internal write operation is in progress
184 #define SF_SR_WEL 0x02 // Indicates if device is memory write enabled
185 #define SF_SR_BP0 0x04 // Block protection bit 0
186 #define SF_SR_BP1 0x08 // Block protection bit 1
187 #define SF_SR_BP2 0x10 // Block protection bit 2
188 #define SF_SR_BP3 0x20 // Block protection bit 3
189 #define SF_SR_WPE 0x3C // Enable write protection on all blocks
190 #define SF_SR_AAI 0x40 // Auto Address Increment Programming status
191 #define SF_SR_BPL 0x80 // Block protection lock-down
192
193 //
194 // Operation Instruction definitions for the Serial Flash Device
195 //
196 #define SF_INST_WRSR 0x01 // Write Status Register
197 #define SF_INST_PROG 0x02 // Byte Program
198 #define SF_INST_READ 0x03 // Read
199 #define SF_INST_WRDI 0x04 // Write Disable
200 #define SF_INST_RDSR 0x05 // Read Status Register
201 #define SF_INST_WREN 0x06 // Write Enable
202 #define SF_INST_HS_READ 0x0B // High-speed Read
203 #define SF_INST_SERASE 0x20 // Sector Erase (4KB)
204 #define SF_INST_BERASE 0x52 // Block Erase (32KB)
205 #define SF_INST_64KB_ERASE 0xD8 // Block Erase (64KB)
206 #define SF_INST_EWSR 0x50 // Enable Write Status Register
207 #define SF_INST_READ_ID 0xAB // Read ID
208 #define SF_INST_JEDEC_READ_ID 0x9F // JEDEC Read ID
209 #define SF_INST_DOFR 0x3B // Dual Output Fast Read
210 #define SF_INST_SFDP 0x5A // Serial Flash Discovery Parameters
211
212 #define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
213 #define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
214 #define BLOCK_SIZE_64KB 0x00010000 // Common 64kBytes block size
215 #define MAX_FWH_SIZE 0x00100000 // 8Mbit (Note that this can also be used for the 4Mbit )
216
217 //
218 // Prefix Opcode Index on the host SPI controller
219 //
220 typedef enum {
221 SPI_WREN, // Prefix Opcode 0: Write Enable
222 SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register
223 } PREFIX_OPCODE_INDEX;
224
225 //
226 // Opcode Menu Index on the host SPI controller
227 //
228 typedef enum {
229 SPI_READ_ID, // Opcode 0: READ ID, Read cycle with address
230 SPI_READ, // Opcode 1: READ, Read cycle with address
231 SPI_RDSR, // Opcode 2: Read Status Register, No address
232 SPI_WRDI_SFDP, // Opcode 3: Write Disable or Discovery Parameters, No address
233 SPI_SERASE, // Opcode 4: Sector Erase (4KB), Write cycle with address
234 SPI_BERASE, // Opcode 5: Block Erase (32KB), Write cycle with address
235 SPI_PROG, // Opcode 6: Byte Program, Write cycle with address
236 SPI_WRSR, // Opcode 7: Write Status Register, No address
237 } SPI_OPCODE_INDEX;
238
239 #endif