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1 /*++
2
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
4
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7
8
9 **/
10
11 #ifndef __I2C_BUS_H__
12 #define __I2C_BUS_H__
13
14 #include <Protocol/I2cHostMcg.h>
15
16 //
17 // I2C bus protocol
18 //
19 typedef struct _EFI_I2C_BUS_PROTOCOL EFI_I2C_BUS_PROTOCOL;
20
21 /**
22 Perform an I2C operation on the device
23
24 This routine must be called at or below TPL_NOTIFY. For synchronous
25 requests this routine must be called at or below TPL_CALLBACK.
26
27 N.B. The typical consumers of this API are the third party I2C
28 drivers. Extreme care must be taken by other consumers of this
29 API to prevent confusing the third party I2C drivers due to a
30 state change at the I2C device which the third party I2C drivers
31 did not initiate. I2C platform drivers may use this API within
32 these guidelines.
33
34 This routine queues an operation to the I2C controller for execution
35 on the I2C bus.
36
37 As an upper layer driver writer, the following need to be provided
38 to the platform vendor:
39
40 1. ACPI CID value or string - this is used to connect the upper layer
41 driver to the device.
42 2. Slave address array guidance when the I2C device uses more than one
43 slave address. This is used to access the blocks of hardware within
44 the I2C device.
45
46 @param[in] This Address of an EFI_I2C_BUS_PROTOCOL
47 structure
48 @param[in] SlaveAddressIndex Index into an array of slave addresses for
49 the I2C device. The values in the array are
50 specified by the board designer, with the
51 I2C device driver writer providing the slave
52 address order.
53
54 For devices that have a single slave address,
55 this value must be zero. If the I2C device
56 uses more than one slave address then the third
57 party (upper level) I2C driver writer needs to
58 specify the order of entries in the slave address
59 array.
60
61 \ref ThirdPartyI2cDrivers "Third Party I2C Drivers"
62 section in I2cMaster.h.
63 @param[in] Event Event to set for asynchronous operations,
64 NULL for synchronous operations
65 @param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET
66 structure describing the I2C operation
67 @param[out] I2cStatus Optional buffer to receive the I2C operation
68 completion status
69
70 @retval EFI_SUCCESS The operation completed successfully.
71 @retval EFI_ABORTED The request did not complete because the driver
72 was shutdown.
73 @retval EFI_ACCESS_DENIED Invalid SlaveAddressIndex value
74 @retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.
75 @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.
76 This could indicate the slave device is not present.
77 @retval EFI_INVALID_PARAMETER RequestPacket is NULL
78 @retval EFI_INVALID_PARAMETER TPL is too high
79 @retval EFI_NO_RESPONSE The I2C device is not responding to the
80 slave address. EFI_DEVICE_ERROR may also be
81 returned if the controller can not distinguish
82 when the NACK occurred.
83 @retval EFI_NOT_FOUND I2C slave address exceeds maximum address
84 @retval EFI_NOT_READY I2C bus is busy or operation pending, wait for
85 the event and then read status pointed to by
86 the request packet.
87 @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation
88 @retval EFI_TIMEOUT The transaction did not complete within an internally
89 specified timeout period.
90
91 **/
92 typedef
93 EFI_STATUS
94 (EFIAPI *EFI_I2C_BUS_START_REQUEST) (
95 IN CONST EFI_I2C_BUS_PROTOCOL *This,
96 IN UINTN SlaveAddressIndex,
97 IN EFI_EVENT Event OPTIONAL,
98 IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
99 OUT EFI_STATUS *I2cStatus OPTIONAL
100 );
101
102 //
103 // The I2C bus protocol enables access to a specific device on the I2C bus.
104 //
105 // Each I2C device is described as an ACPI node (HID, UID and CID) within the
106 // platform layer. The I2C bus protocol enumerates the I2C devices in the
107 // platform and creates a unique handle and device path for each I2C device.
108 //
109 // I2C slave addressing is abstracted to validate addresses and limit operation
110 // to the specified I2C device. The third party providing the I2C device support
111 // provides an ordered list of slave addresses for the I2C device to the team
112 // building the platform layer. The platform team must preserve the order of the
113 // supplied list. SlaveAddressCount is the number of entries in this list or
114 // array within the platform layer. The third party device support references
115 // a slave address using an index into the list or array in the range of zero
116 // to SlaveAddressCount - 1.
117 //
118 struct _EFI_I2C_BUS_PROTOCOL {
119 //
120 // Start an I2C operation on the bus
121 //
122 EFI_I2C_BUS_START_REQUEST StartRequest;
123
124 //
125 // The maximum number of slave addresses for the I2C device. The caller may
126 // validate this value as a check on the platform layer's configuration. Slave
127 // address selection uses an index value in the range of zero to SlaveAddressCount - 1.
128 //
129 UINTN SlaveAddressCount;
130
131 //
132 // Hardware revision - Matches the ACPI _HRV value
133 //
134 // The HardwareRevision value allows a single driver to support multiple hardware
135 // revisions and implement the necessary workarounds for limitations within the
136 // hardware.
137 //
138 UINT32 HardwareRevision;
139
140 //
141 // The maximum number of bytes the I2C host controller
142 // is able to receive from the I2C bus.
143 ///
144 UINT32 MaximumReceiveBytes;
145
146 //
147 // The maximum number of bytes the I2C host controller
148 // is able to send on the I2C bus.
149 //
150 UINT32 MaximumTransmitBytes;
151
152 //
153 // The maximum number of bytes in the I2C bus transaction.
154 //
155 UINT32 MaximumTotalBytes;
156 };
157
158 //
159 // GUID for the I2C bus protocol
160 //
161 extern EFI_GUID gEfiI2cBusProtocolGuid;
162
163 #endif // __I2C_BUS_H__