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1 /*++
2
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
4
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7
8
9 **/
10
11 #ifndef __I2C_HOST_H__
12 #define __I2C_HOST_H__
13
14 #include <Protocol/I2cMasterMcg.h>
15
16 /**
17 Declare the forward references
18
19 **/
20 typedef struct _EFI_I2C_HOST_PROTOCOL EFI_I2C_HOST_PROTOCOL;
21 typedef struct _EFI_I2C_HOST_CALLBACKS EFI_I2C_HOST_CALLBACKS;
22
23
24 /**
25 Queue an I2C operation for execution on the I2C controller.
26
27 This routine must be called at or below TPL_NOTIFY. For synchronous
28 requests this routine must be called at or below TPL_CALLBACK.
29
30 N.B. The typical consumers of this API are the I2C bus driver and
31 on rare occasions the I2C test application. Extreme care must be
32 taken by other consumers of this API to prevent confusing the
33 third party I2C drivers due to a state change at the I2C device
34 which the third party I2C drivers did not initiate. I2C platform
35 drivers may use this API within these guidelines.
36
37 This layer uses the concept of I2C bus configurations to describe
38 the I2C bus. An I2C bus configuration is defined as a unique
39 setting of the multiplexers and switches in the I2C bus which
40 enable access to one or more I2C devices. When using a switch
41 to divide a bus, due to speed differences, the I2C platform layer
42 would define an I2C bus configuration for the I2C devices on each
43 side of the switch. When using a multiplexer, the I2C platform
44 layer defines an I2C bus configuration for each of the selector
45 values required to control the multiplexer. See Figure 1 in the
46 <a href="http://www.nxp.com/documents/user_manual/UM10204.pdf">I<sup>2</sup>C
47 Specification</a> for a complex I2C bus configuration.
48
49 The I2C host driver processes all operations in FIFO order. Prior to
50 performing the operation, the I2C host driver calls the I2C platform
51 driver to reconfigure the switches and multiplexers in the I2C bus
52 enabling access to the specified I2C device. The I2C platform driver
53 also selects the maximum bus speed for the device. After the I2C bus
54 is configured, the I2C host driver calls the I2C port driver to
55 initialize the I2C controller and start the I2C operation.
56
57 @param[in] This Address of an EFI_I2C_HOST_PROTOCOL instance.
58 @param[in] I2cBusConfiguration I2C bus configuration to access the I2C
59 device.
60 @param[in] SlaveAddress Address of the device on the I2C bus.
61 @param[in] Event Event to set for asynchronous operations,
62 NULL for synchronous operations
63 @param[in] RequestPacket Address of an EFI_I2C_REQUEST_PACKET
64 structure describing the I2C operation
65 @param[out] I2cStatus Optional buffer to receive the I2C operation
66 completion status
67
68 @retval EFI_SUCCESS The operation completed successfully.
69 @retval EFI_ABORTED The request did not complete because the driver
70 was shutdown.
71 @retval EFI_BAD_BUFFER_SIZE The WriteBytes or ReadBytes buffer size is too large.
72 @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the operation.
73 This could indicate the slave device is not present.
74 @retval EFI_INVALID_PARAMETER RequestPacket is NULL
75 @retval EFI_INVALID_PARAMETER TPL is too high
76 @retval EFI_NO_MAPPING Invalid I2cBusConfiguration value
77 @retval EFI_NO_RESPONSE The I2C device is not responding to the
78 slave address. EFI_DEVICE_ERROR may also be
79 returned if the controller cannot distinguish
80 when the NACK occurred.
81 @retval EFI_NOT_FOUND I2C slave address exceeds maximum address
82 @retval EFI_NOT_READY I2C bus is busy or operation pending, wait for
83 the event and then read status pointed to by
84 the request packet.
85 @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C operation
86 @retval EFI_TIMEOUT The transaction did not complete within an internally
87 specified timeout period.
88
89 **/
90 typedef
91 EFI_STATUS
92 (EFIAPI *EFI_I2C_HOST_QUEUE_REQUEST) (
93 IN CONST EFI_I2C_HOST_PROTOCOL *This,
94 IN UINTN I2cBusConfiguration,
95 IN UINTN SlaveAddress,
96 IN EFI_EVENT Event OPTIONAL,
97 IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
98 OUT EFI_STATUS *I2cStatus OPTIONAL
99 );
100
101 ///
102 /// Host access to the I2C bus.
103 ///
104 struct _EFI_I2C_HOST_PROTOCOL {
105 ///
106 /// Queue an operation for execution on the I2C bus
107 ///
108 EFI_I2C_HOST_QUEUE_REQUEST QueueRequest;
109
110 ///
111 /// The maximum number of I2C bus configurations
112 ///
113 UINTN I2cBusConfigurationCount;
114
115 ///
116 /// The maximum number of bytes the I2C host controller
117 /// is able to receive from the I2C bus.
118 ///
119 UINT32 MaximumReceiveBytes;
120
121 ///
122 /// The maximum number of bytes the I2C host controller
123 /// is able to send on the I2C bus.
124 ///
125 UINT32 MaximumTransmitBytes;
126
127 ///
128 /// The maximum number of bytes in the I2C bus transaction.
129 ///
130 UINT32 MaximumTotalBytes;
131 };
132
133 ///
134 /// GUID for the EFI_I2C_HOST_PROTOCOL
135 ///
136 extern EFI_GUID gEfiI2cHostProtocolGuid;
137
138 #endif // __I2C_HOST_H__