3 # Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
5 # SPDX-License-Identifier: BSD-2-Clause-Patent
21 #---------------------------------------------------------------------------
26 #---------------------------------------------------------------------------
28 .globl ASM_PFX(EfiHalt)
29 .globl ASM_PFX(EfiWbinvd)
30 .globl ASM_PFX(EfiInvd)
31 .globl ASM_PFX(EfiCpuid)
32 .globl ASM_PFX(EfiReadMsr)
33 .globl ASM_PFX(EfiWriteMsr)
34 .globl ASM_PFX(EfiReadTsc)
35 .globl ASM_PFX(EfiDisableCache)
36 .globl ASM_PFX(EfiEnableCache)
37 .globl ASM_PFX(EfiGetEflags)
38 .globl ASM_PFX(EfiDisableInterrupts)
39 .globl ASM_PFX(EfiEnableInterrupts)
40 .globl ASM_PFX(EfiCpuidExt)
71 #EfiCpuid (IN UINT32 RegisterInEax,
72 # OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
81 movl 8(%ebp), %eax #RegisterInEax
83 cmpl $0, 0xC(%ebp) # Reg
85 movl 0xC(%ebp), %edi # Reg
87 movl %eax, (%edi) # Reg->RegEax
88 movl %ebx, 4(%edi) # Reg->RegEbx
89 movl %ecx, 8(%edi) # Reg->RegEcx
90 movl %edx, 0xC(%edi) # Reg->RegEdx
108 movl 4(%esp), %ecx # Index
118 ASM_PFX(EfiWriteMsr):
119 movl 4(%esp), %ecx # Index
120 movl 8(%esp), %eax # DWORD PTR Value[0]
121 movl 0xC(%esp), %edx # DWORD PTR Value[4]
139 ASM_PFX(EfiDisableCache):
146 orl $0x60000000, %eax
151 #EfiDisableCache ENDP
157 ASM_PFX(EfiEnableCache):
160 andl $0x9fffffff, %eax
169 ASM_PFX(EfiGetEflags):
176 #EfiDisableInterrupts (
179 ASM_PFX(EfiDisableInterrupts):
182 #EfiDisableInterrupts ENDP
185 #EfiEnableInterrupts (
188 ASM_PFX(EfiEnableInterrupts):
191 #EfiEnableInterrupts ENDP
195 # IN UINT32 RegisterInEax,
196 # IN UINT32 CacheLevel,
197 # OUT EFI_CPUID_REGISTER *Regs
199 ASM_PFX(EfiCpuidExt):
205 movl 0x30(%esp), %eax # RegisterInEax
206 movl 0x34(%esp), %ecx # CacheLevel
208 movl 0x38(%esp), %edi # DWORD PTR Regs
210 movl %eax, (%edi) # Reg->RegEax
211 movl %ebx, 4(%edi) # Reg->RegEbx
212 movl %ecx, 8(%edi) # Reg->RegEcx
213 movl %edx, 0xC(%edi) # Reg->RegEdx