Vlv2TbltDevicePkg/Library/FlashDeviceLib/SpiChipDefinitions.h

   1 /** @file
   2
   3   Copyright (c) 2004  - 2016, Intel Corporation. All rights reserved.<BR>
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7
   8
   9 **/
  10
  11 #include <Library/SpiFlash.H>
  12
  13 #define FLASH_SIZE  0x400000
  14 #define FLASH_DEVICE_BASE_ADDRESS (0xFFFFFFFF-FLASH_SIZE+1)
  15
  16 //
  17 // Serial Flash device initialization data table provided to the
  18 // Intel(R) SPI Host Controller Compatibility Interface.
  19 //
  20 SPI_INIT_TABLE  mInitTable[] = {
  21   {
  22   SF_VENDOR_ID_WINBOND,     // VendorId
  23   SF_DEVICE_ID0_W25QXX,     // DeviceId 0
  24   SF_DEVICE_ID1_W25Q64,     // DeviceId 1
  25   {
  26     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
  27     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
  28   },
  29   {
  30     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
  31     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
  32     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
  33     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
  34     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
  35     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (64KB
  36     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
  37     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
  38   },
  39
  40   //
  41   // The offset of the start of the BIOS image in flash. This value is platform specific
  42   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
  43   //
  44   ((WINBOND_W25Q64_SIZE >= FLASH_SIZE) ? WINBOND_W25Q64_SIZE - FLASH_SIZE : (UINTN) (-1)),
  45
  46   //
  47   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
  48   //
  49   FLASH_SIZE
  50   },
  51   {
  52   SF_VENDOR_ID_ATMEL,       // VendorId
  53   SF_DEVICE_ID0_AT25DF321A,  // DeviceId 0
  54   SF_DEVICE_ID1_AT25DF321A, // DeviceId 1
  55   {
  56     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
  57     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
  58   },
  59   {
  60     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
  61     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
  62     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
  63     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable      },     // Opcode 3: Write Disable
  64     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
  65     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (32KB)
  66     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
  67     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
  68   },
  69
  70   //
  71   // The offset of the start of the BIOS image in flash. This value is platform specific
  72   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
  73   //
  74   ((ATMEL_AT25DF321A_SIZE >= FLASH_SIZE) ? ATMEL_AT25DF321A_SIZE - FLASH_SIZE : (UINTN) (-1)),
  75
  76   //
  77   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
  78   //
  79   FLASH_SIZE
  80   },
  81   {
  82   SF_VENDOR_ID_ATMEL,       // VendorId
  83   SF_DEVICE_ID0_AT26DF321,  // DeviceId 0
  84   SF_DEVICE_ID1_AT26DF321,  // DeviceId 1
  85   {
  86     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
  87     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
  88   },
  89   {
  90     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
  91     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
  92     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
  93     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable      },     // Opcode 3: Write Disable
  94     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
  95     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (32KB)
  96     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
  97     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
  98   },
  99
 100   //
 101   // The offset of the start of the BIOS image in flash. This value is platform specific
 102   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 103   //
 104   ((ATMEL_AT26DF321_SIZE >= FLASH_SIZE) ? ATMEL_AT26DF321_SIZE - FLASH_SIZE : (UINTN) (-1)),
 105
 106   //
 107   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 108   //
 109   FLASH_SIZE
 110   },
 111   {
 112   SF_VENDOR_ID_ATMEL,       // VendorId
 113   SF_DEVICE_ID0_AT25DF641,  // DeviceId 0
 114   SF_DEVICE_ID1_AT25DF641,  // DeviceId 1
 115   {
 116     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 117     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
 118   },
 119   {
 120     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 121     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 122     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 123     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable      },     // Opcode 3: Write Disable
 124     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 125     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (32KB)
 126     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 127     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 128   },
 129
 130   //
 131   // The offset of the start of the BIOS image in flash. This value is platform specific
 132   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 133   //
 134   ((ATMEL_AT25DF641_SIZE >= FLASH_SIZE) ? ATMEL_AT25DF641_SIZE - FLASH_SIZE : (UINTN) (-1)),
 135
 136   //
 137   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 138   //
 139   FLASH_SIZE
 140   },
 141   {
 142   SF_VENDOR_ID_WINBOND,     // VendorId
 143   SF_DEVICE_ID0_W25QXX,     // DeviceId 0
 144   SF_DEVICE_ID1_W25Q16,     // DeviceId 1
 145   {
 146     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 147     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
 148   },
 149   {
 150     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 151     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 152     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 153     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 154     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 155     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (64KB
 156     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 157     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 158   },
 159
 160   //
 161   // The offset of the start of the BIOS image in flash. This value is platform specific
 162   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 163   //
 164   ((WINBOND_W25Q16_SIZE >= FLASH_SIZE) ? WINBOND_W25Q16_SIZE - FLASH_SIZE : (UINTN) (-1)),
 165
 166   //
 167   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 168   //
 169   FLASH_SIZE
 170   },
 171   {
 172   SF_VENDOR_ID_WINBOND,     // VendorId
 173   SF_DEVICE_ID0_W25QXX,     // DeviceId 0
 174   SF_DEVICE_ID1_W25Q32,     // DeviceId 1
 175   {
 176     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 177     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register.
 178   },
 179   {
 180     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 181     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 182     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 183     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 184     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 185     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (64KB
 186     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 187     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 188   },
 189
 190   //
 191   // The offset of the start of the BIOS image in flash. This value is platform specific
 192   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 193   //
 194   ((WINBOND_W25Q32_SIZE >= FLASH_SIZE) ? WINBOND_W25Q32_SIZE - FLASH_SIZE : (UINTN) (-1)),
 195
 196   //
 197   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 198   //
 199   FLASH_SIZE
 200   },
 201   {
 202   SF_VENDOR_ID_WINBOND,     // VendorId
 203   SF_DEVICE_ID0_W25XXX,     // DeviceId 0
 204   SF_DEVICE_ID1_W25X32,     // DeviceId 1
 205   {
 206     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 207     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
 208   },
 209   {
 210     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 211     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 212     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 213     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 214     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 215     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (64KB
 216     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 217     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 218   },
 219
 220   //
 221   // The offset of the start of the BIOS image in flash. This value is platform specific
 222   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 223   //
 224   ((WINBOND_W25X32_SIZE >= FLASH_SIZE) ? WINBOND_W25X32_SIZE - FLASH_SIZE : (UINTN) (-1)),
 225
 226   //
 227   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 228   //
 229   FLASH_SIZE
 230   },
 231   {
 232   SF_VENDOR_ID_WINBOND,     // VendorId
 233   SF_DEVICE_ID0_W25XXX,     // DeviceId 0
 234   SF_DEVICE_ID1_W25X64,     // DeviceId 1
 235   {
 236     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 237     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
 238   },
 239   {
 240     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },     // Opcode 0: Read ID
 241     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData      },     // Opcode 1: Read
 242     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },     // Opcode 2: Read Status Register
 243     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 244     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },     // Opcode 4: Sector Erase (4KB)
 245     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },     // Opcode 5: Block Erase (64KB
 246     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},    // Opcode 6: Byte Program
 247     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },     // Opcode 7: Write Status Register
 248   },
 249
 250   //
 251   // The offset of the start of the BIOS image in flash. This value is platform specific
 252   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 253   //
 254   ((WINBOND_W25X64_SIZE >= FLASH_SIZE) ? WINBOND_W25X64_SIZE - FLASH_SIZE : (UINTN) (-1)),
 255
 256   //
 257   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 258   //
 259   FLASH_SIZE
 260   },
 261   {
 262   SF_VENDOR_ID_WINBOND,     // VendorId
 263   SF_DEVICE_ID0_W25QXX,     // DeviceId 0
 264   SF_DEVICE_ID1_W25Q128,    // DeviceId 1
 265   {
 266     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 267     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
 268   },
 269   {
 270     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 271     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 272     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 273     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 274     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 275     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (64KB
 276     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 277     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 278   },
 279
 280   //
 281   // The offset of the start of the BIOS image in flash. This value is platform specific
 282   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 283   //
 284   ((WINBOND_W25Q128_SIZE >= FLASH_SIZE) ? WINBOND_W25Q128_SIZE - FLASH_SIZE : (UINTN) (-1)),
 285
 286   //
 287   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 288   //
 289   FLASH_SIZE
 290   },
 291   {
 292   SF_VENDOR_ID_MACRONIX,    // VendorId
 293   SF_DEVICE_ID0_MX25LXX,    // DeviceId 0
 294   SF_DEVICE_ID1_MX25L16,    // DeviceId 1
 295   {
 296     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 297     SF_INST_EWSR            // Prefix Opcode 1:  Write Enable (this part doesn't support EWSR).
 298   },
 299   {
 300     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 301     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 302     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 303     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 304     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 305     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 306     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 307     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 308   },
 309
 310   //
 311   // The offset of the start of the BIOS image in flash. This value is platform specific
 312   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 313   //
 314   ((MACRONIX_MX25L16_SIZE >= FLASH_SIZE) ? MACRONIX_MX25L16_SIZE - FLASH_SIZE : (UINTN) (-1)),
 315
 316   //
 317   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 318   //
 319   FLASH_SIZE
 320   },
 321   {
 322   SF_VENDOR_ID_MACRONIX,    // VendorId
 323   SF_DEVICE_ID0_MX25LXX,    // DeviceId 0
 324   SF_DEVICE_ID1_MX25L32,    // DeviceId 1
 325   {
 326     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 327     SF_INST_EWSR            // Prefix Opcode 1:  Write Enable (this part doesn't support EWSR).
 328   },
 329   {
 330     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 331     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 332     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 333     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 334     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 335     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 336     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 337     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 338   },
 339
 340   //
 341   // The offset of the start of the BIOS image in flash. This value is platform specific
 342   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 343   //
 344   ((MACRONIX_MX25L32_SIZE >= FLASH_SIZE) ? MACRONIX_MX25L32_SIZE - FLASH_SIZE : (UINTN) (-1)),
 345
 346   //
 347   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 348   //
 349   FLASH_SIZE
 350   },
 351   {
 352   SF_VENDOR_ID_MACRONIX,    // VendorId
 353   SF_DEVICE_ID0_MX25LXX,    // DeviceId 0
 354   SF_DEVICE_ID1_MX25L64,    // DeviceId 1
 355   {
 356     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 357     SF_INST_EWSR            // Prefix Opcode 1:  Write Enable (this part doesn't support EWSR)
 358   },
 359   {
 360     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 361     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 362     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 363     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 364     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 365     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 366     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 367     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 368   },
 369
 370   //
 371   // The offset of the start of the BIOS image in flash. This value is platform specific
 372   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 373   //
 374   ((MACRONIX_MX25L64_SIZE >= FLASH_SIZE) ? MACRONIX_MX25L64_SIZE - FLASH_SIZE : (UINTN) (-1)),
 375
 376   //
 377   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 378   //
 379   FLASH_SIZE
 380   },
 381   {
 382   SF_VENDOR_ID_MACRONIX,    // VendorId
 383   SF_DEVICE_ID0_MX25LXX,    // DeviceId 0
 384   SF_DEVICE_ID1_MX25L128,   // DeviceId 1
 385   {
 386     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 387     SF_INST_EWSR            // Prefix Opcode 1:  Write Enable (this part doesn't support EWSR)
 388   },
 389   {
 390     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 391     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 392     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 393     {EnumSpiOpcodeRead,           SF_INST_SFDP,           EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},    // Opcode 3: Serial Flash Discovery Parameters
 394     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 395     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 396     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 397     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 398   },
 399
 400   //
 401   // The offset of the start of the BIOS image in flash. This value is platform specific
 402   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 403   //
 404   ((MACRONIX_MX25L128_SIZE >= FLASH_SIZE) ? MACRONIX_MX25L128_SIZE - FLASH_SIZE : (UINTN) (-1)),
 405
 406   //
 407   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 408   //
 409   FLASH_SIZE
 410   },
 411   {
 412   SF_VENDOR_ID_MACRONIX,          // VendorId
 413   SF_DEVICE_ID0_MX25UXX,          // DeviceId 0
 414   SF_DEVICE_ID1_MX25U6435F,   // DeviceId 1
 415   {
 416     SF_INST_WREN,                     // Prefix Opcode 0: Write Enable
 417     SF_INST_EWSR                          // Prefix Opcode 1:  Write Enable (this part doesn't support EWSR)
 418   },
 419   {
 420     {EnumSpiOpcodeReadNoAddr,   SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId              },              // Opcode 0: Read ID
 421     {EnumSpiOpcodeRead,                 SF_INST_READ,                   EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 422     {EnumSpiOpcodeReadNoAddr,   SF_INST_RDSR,                   EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 423     {EnumSpiOpcodeRead,                 SF_INST_SFDP,                   EnumSpiCycle50MHz, EnumSpiOperationDiscoveryParameters},        // Opcode 3: Serial Flash Discovery Parameters
 424     {EnumSpiOpcodeWrite,                SF_INST_SERASE,                 EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 425     {EnumSpiOpcodeWrite,                SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 426     {EnumSpiOpcodeWrite,                SF_INST_PROG,                   EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},         // Opcode 6: Byte Program
 427     {EnumSpiOpcodeWriteNoAddr,  SF_INST_WRSR,                   EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 428   },
 429
 430   //
 431   // The offset of the start of the BIOS image in flash. This value is platform specific
 432   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 433   //
 434   ((MACRONIX_MX25U64_SIZE >= FLASH_SIZE) ? MACRONIX_MX25U64_SIZE - FLASH_SIZE : (UINTN) (-1)),
 435
 436   //
 437   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 438   //
 439   FLASH_SIZE
 440   },
 441   {
 442   SF_VENDOR_ID_SST,         // VendorId
 443   SF_DEVICE_ID0_SST25VF0XXX,// DeviceId 0
 444   SF_DEVICE_ID1_SST25VF016B,// DeviceId 1
 445   {
 446     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 447     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
 448   },
 449   {
 450     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 451     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle20MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 452     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 453     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable      },     // Opcode 3: Write Disable
 454     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 455     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (32KB)
 456     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 457     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 458   },
 459
 460   //
 461   // The offset of the start of the BIOS image in flash. This value is platform specific
 462   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 463   //
 464   ((SST_SST25VF016B_SIZE >= FLASH_SIZE) ? SST_SST25VF016B_SIZE - FLASH_SIZE : (UINTN) (-1)),
 465
 466   //
 467   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 468   //
 469   FLASH_SIZE
 470   },
 471   {
 472   SF_VENDOR_ID_SST,         // VendorId
 473   SF_DEVICE_ID0_SST25VF0XXX,// DeviceId 0
 474   SF_DEVICE_ID1_SST25VF064C,// DeviceId 1
 475   {
 476     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 477     SF_INST_EWSR            // Prefix Opcode 1: Enable Write Status Register
 478   },
 479   {
 480     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId           },     // Opcode 0: Read ID
 481     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle20MHz, EnumSpiOperationReadData          },     // Opcode 1: Read
 482     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus        },     // Opcode 2: Read Status Register
 483     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable      },     // Opcode 3: Write Disable
 484     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte     },     // Opcode 4: Sector Erase (4KB)
 485     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte    },     // Opcode 5: Block Erase (32KB)
 486     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 487     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus       },     // Opcode 7: Write Status Register
 488   },
 489
 490   //
 491   // The offset of the start of the BIOS image in flash. This value is platform specific
 492   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 493   //
 494   ((SST_SST25VF064C_SIZE >= FLASH_SIZE) ? SST_SST25VF064C_SIZE - FLASH_SIZE : (UINTN) (-1)),
 495
 496   //
 497   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 498   //
 499   FLASH_SIZE
 500   },
 501   {
 502         //
 503         // Minnow2 SPI type
 504         //
 505   SF_VENDOR_ID_NUMONYX,     // VendorId
 506   SF_DEVICE_ID0_N25Q064,    // DeviceId 0
 507   SF_DEVICE_ID1_N25Q064,    // DeviceId 1
 508   {
 509     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 510     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 511   },
 512   {
 513     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle20MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 514     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle20MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 515     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle20MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 516     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle20MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 517     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle20MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 518     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle20MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 519     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle20MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 520     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle20MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 521   },
 522
 523   //
 524   // The offset of the start of the BIOS image in flash. This value is platform specific
 525   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 526   //
 527   ((NUMONYX_N25Q064_SIZE >= FLASH_SIZE) ? NUMONYX_N25Q064_SIZE - FLASH_SIZE : (UINTN) (-1)),
 528
 529   //
 530   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 531   //
 532   FLASH_SIZE
 533   },
 534   {
 535   SF_VENDOR_ID_NUMONYX,     // VendorId
 536   SF_DEVICE_ID0_M25PXXX,    // DeviceId 0
 537   SF_DEVICE_ID1_M25PX16,    // DeviceId 1
 538   {
 539     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 540     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
 541   },
 542   {
 543     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 544     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 545     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 546     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 547     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 548     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 549     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 550     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 551   },
 552
 553   //
 554   // The offset of the start of the BIOS image in flash. This value is platform specific
 555   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 556   //
 557   ((NUMONYX_M25PX16_SIZE >= FLASH_SIZE) ? NUMONYX_M25PX16_SIZE - FLASH_SIZE : (UINTN) (-1)),
 558
 559   //
 560   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 561   //
 562   FLASH_SIZE
 563   },
 564   {
 565   SF_VENDOR_ID_NUMONYX,     // VendorId
 566   SF_DEVICE_ID0_N25QXXX,    // DeviceId 0
 567   SF_DEVICE_ID1_N25Q032,    // DeviceId 1
 568   {
 569     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 570     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
 571   },
 572   {
 573     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },        // Opcode 0: Read ID
 574     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },        // Opcode 1: Read
 575     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },        // Opcode 2: Read Status Register
 576     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 577     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 578     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 579     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},   // Opcode 6: Byte Program
 580     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 581   },
 582
 583   //
 584   // The offset of the start of the BIOS image in flash. This value is platform specific
 585   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 586   //
 587   ((NUMONYX_N25Q032_SIZE >= FLASH_SIZE) ? NUMONYX_N25Q032_SIZE - FLASH_SIZE : (UINTN) (-1)),
 588
 589   //
 590   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 591   //
 592   FLASH_SIZE
 593   },
 594   {
 595   SF_VENDOR_ID_NUMONYX,     // VendorId
 596   SF_DEVICE_ID0_M25PXXX,    // DeviceId 0
 597   SF_DEVICE_ID1_M25PX32,    // DeviceId 1
 598   {
 599     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 600     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
 601   },
 602   {
 603     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 604     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 605     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 606     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 607     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 608     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 609     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 610     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 611   },
 612
 613   //
 614   // The offset of the start of the BIOS image in flash. This value is platform specific
 615   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 616   //
 617   ((NUMONYX_M25PX32_SIZE >= FLASH_SIZE) ? NUMONYX_M25PX32_SIZE - FLASH_SIZE : (UINTN) (-1)),
 618
 619   //
 620   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 621   //
 622   FLASH_SIZE
 623   },
 624   {
 625   SF_VENDOR_ID_NUMONYX,     // VendorId
 626   SF_DEVICE_ID0_M25PXXX,    // DeviceId 0
 627   SF_DEVICE_ID1_M25PX64,    // DeviceId 1
 628   {
 629     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 630     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 631   },
 632   {
 633     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 634     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 635     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 636     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 637     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 638     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 639     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 640     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 641   },
 642
 643   //
 644   // The offset of the start of the BIOS image in flash. This value is platform specific
 645   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 646   //
 647   ((NUMONYX_M25PX64_SIZE >= FLASH_SIZE) ? NUMONYX_M25PX64_SIZE - FLASH_SIZE : (UINTN) (-1)),
 648
 649   //
 650   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 651   //
 652   FLASH_SIZE
 653   },
 654   {
 655   SF_VENDOR_ID_NUMONYX,     // VendorId
 656   SF_DEVICE_ID0_N25QXXX,    // DeviceId 0
 657   SF_DEVICE_ID1_N25Q128,    // DeviceId 1
 658   {
 659     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 660     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 661   },
 662   {
 663     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 664     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 665     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 666     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 667     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 668     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 669     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 670     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 671   },
 672
 673   //
 674   // The offset of the start of the BIOS image in flash. This value is platform specific
 675   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 676   //
 677   ((NUMONYX_N25Q128_SIZE >= FLASH_SIZE) ? NUMONYX_N25Q128_SIZE - FLASH_SIZE : (UINTN) (-1)),
 678
 679   //
 680   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 681   //
 682   FLASH_SIZE
 683   },
 684   {
 685   SF_VENDOR_ID_EON,         // VendorId
 686   SF_DEVICE_ID0_EN25QXX,    // DeviceId 0
 687   SF_DEVICE_ID1_EN25Q16,    // DeviceId 1
 688   {
 689     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 690     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 691   },
 692   {
 693     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 694     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 695     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 696     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 697     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 698     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 699     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 700     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 701   },
 702
 703   //
 704   // The offset of the start of the BIOS image in flash. This value is platform specific
 705   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 706   //
 707   ((EON_EN25Q16_SIZE >= FLASH_SIZE) ? EON_EN25Q16_SIZE - FLASH_SIZE : (UINTN) (-1)),
 708
 709   //
 710   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 711   //
 712   FLASH_SIZE
 713   },
 714   {
 715   SF_VENDOR_ID_EON,         // VendorId
 716   SF_DEVICE_ID0_EN25QXX,    // DeviceId 0
 717   SF_DEVICE_ID1_EN25Q32,    // DeviceId 1
 718   {
 719     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 720     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 721   },
 722   {
 723     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 724     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle33MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 725     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 726     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 727     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 728     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 729     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 730     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 731   },
 732
 733   //
 734   // The offset of the start of the BIOS image in flash. This value is platform specific
 735   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 736   //
 737   ((EON_EN25Q32_SIZE >= FLASH_SIZE) ? EON_EN25Q32_SIZE - FLASH_SIZE : (UINTN) (-1)),
 738
 739   //
 740   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 741   //
 742   FLASH_SIZE
 743   },
 744   {
 745   SF_VENDOR_ID_EON,         // VendorId
 746   SF_DEVICE_ID0_EN25QXX,    // DeviceId 0
 747   SF_DEVICE_ID1_EN25Q64,    // DeviceId 1
 748   {
 749     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 750     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR).
 751   },
 752   {
 753     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 754     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 755     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 756     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 757     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 758     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 759     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 760     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 761   },
 762
 763   //
 764   // The offset of the start of the BIOS image in flash. This value is platform specific
 765   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 766   //
 767   ((EON_EN25Q64_SIZE >= FLASH_SIZE) ? EON_EN25Q64_SIZE - FLASH_SIZE : (UINTN) (-1)),
 768
 769   //
 770   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 771   //
 772   FLASH_SIZE
 773   },
 774   {
 775   SF_VENDOR_ID_EON,         // VendorId
 776   SF_DEVICE_ID0_EN25QXX,    // DeviceId 0
 777   SF_DEVICE_ID1_EN25Q128,   // DeviceId 1
 778   {
 779     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 780     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 781   },
 782   {
 783     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 784     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 785     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 786     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 787     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 788     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 789     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 790     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 791   },
 792
 793   //
 794   // The offset of the start of the BIOS image in flash. This value is platform specific
 795   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 796   //
 797   ((EON_EN25Q128_SIZE >= FLASH_SIZE) ? EON_EN25Q128_SIZE - FLASH_SIZE : (UINTN) (-1)),
 798
 799   //
 800   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 801   //
 802   FLASH_SIZE
 803   },
 804   {
 805   SF_VENDOR_ID_AMIC,        // VendorId
 806   SF_DEVICE_ID0_A25L016,    // DeviceId 0
 807   SF_DEVICE_ID1_A25L016,    // DeviceId 1
 808   {
 809     SF_INST_WREN,           // Prefix Opcode 0: Write Enable
 810     SF_INST_WREN            // Prefix Opcode 1: Write Enable (this part doesn't support EWSR)
 811   },
 812   {
 813     {EnumSpiOpcodeReadNoAddr,     SF_INST_JEDEC_READ_ID,  EnumSpiCycle50MHz, EnumSpiOperationJedecId      },      // Opcode 0: Read ID
 814     {EnumSpiOpcodeRead,           SF_INST_READ,           EnumSpiCycle50MHz, EnumSpiOperationReadData      },      // Opcode 1: Read
 815     {EnumSpiOpcodeReadNoAddr,     SF_INST_RDSR,           EnumSpiCycle50MHz, EnumSpiOperationReadStatus    },      // Opcode 2: Read Status Register
 816     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRDI,           EnumSpiCycle50MHz, EnumSpiOperationWriteDisable    },      // Opcode 3: Write Disable
 817     {EnumSpiOpcodeWrite,          SF_INST_SERASE,         EnumSpiCycle50MHz, EnumSpiOperationErase_4K_Byte  },      // Opcode 4: Sector Erase (4KB)
 818     {EnumSpiOpcodeWrite,          SF_INST_64KB_ERASE,     EnumSpiCycle50MHz, EnumSpiOperationErase_64K_Byte  },      // Opcode 5: Block Erase (64KB
 819     {EnumSpiOpcodeWrite,          SF_INST_PROG,           EnumSpiCycle50MHz, EnumSpiOperationProgramData_1_Byte},     // Opcode 6: Byte Program
 820     {EnumSpiOpcodeWriteNoAddr,    SF_INST_WRSR,           EnumSpiCycle50MHz, EnumSpiOperationWriteStatus    },      // Opcode 7: Write Status Register
 821   },
 822
 823   //
 824   // The offset of the start of the BIOS image in flash. This value is platform specific
 825   // and depends on the system flash map. If BIOS size is bigger than flash return -1.
 826   //
 827   ((AMIC_A25L16_SIZE >= FLASH_SIZE) ? AMIC_A25L16_SIZE - FLASH_SIZE : (UINTN) (-1)),
 828
 829   //
 830   // The size of the BIOS image in flash. This value is platform specific and depends on the system flash map.
 831   //
 832   FLASH_SIZE
 833   }
 834 };
 835