2 Multiplatform initialization.
4 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials are licensed and made available under
7 the terms and conditions of the BSD License that accompanies this distribution.
8 The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <MultiPlatformLib.h>
20 Platform Type detection. Because the PEI globle variable
21 is in the flash, it could not change directly.So use
22 2 PPIs to distinguish the platform type.
24 @param FfsHeader Pointer to Firmware File System file header.
25 @param PeiServices General purpose services available to every PEIM.
27 @retval EFI_SUCCESS Memory initialization completed successfully.
28 @retval Others All other error conditions encountered result in an ASSERT.
32 MultiPlatformInfoInit (
33 IN CONST EFI_PEI_SERVICES
**PeiServices
,
34 IN OUT EFI_PLATFORM_INFO_HOB
*PlatformInfoHob
40 PlatformInfoHob
->IohSku
= MmPci16(0, MC_BUS
, MC_DEV
, MC_FUN
, PCI_DEVICE_ID_OFFSET
);
42 PlatformInfoHob
->IohRevision
= MmPci8(0, MC_BUS
, MC_DEV
, MC_FUN
, PCI_REVISION_ID_OFFSET
);
50 PlatformInfoHob
->IchSku
= PchLpcPciCfg16(PCI_DEVICE_ID_OFFSET
);
52 PlatformInfoHob
->IchRevision
= PchLpcPciCfg8(PCI_REVISION_ID_OFFSET
);
57 PcieLength
= 0x04000000;
60 // Don't support BASE above 4GB currently.
62 PlatformInfoHob
->PciData
.PciExpressSize
= PcieLength
;
63 PlatformInfoHob
->PciData
.PciExpressBase
= PcdGet64 (PcdPciExpressBaseAddress
);
65 PlatformInfoHob
->PciData
.PciResourceMem32Base
= (UINT32
) (PlatformInfoHob
->PciData
.PciExpressBase
- RES_MEM32_MIN_LEN
);
66 PlatformInfoHob
->PciData
.PciResourceMem32Limit
= (UINT32
) (PlatformInfoHob
->PciData
.PciExpressBase
-1);
68 PlatformInfoHob
->PciData
.PciResourceMem64Base
= RES_MEM64_36_BASE
;
69 PlatformInfoHob
->PciData
.PciResourceMem64Limit
= RES_MEM64_36_LIMIT
;
70 PlatformInfoHob
->CpuData
.CpuAddressWidth
= 36;
72 PlatformInfoHob
->MemData
.MemMir0
= PlatformInfoHob
->PciData
.PciResourceMem64Base
;
73 PlatformInfoHob
->MemData
.MemMir1
= PlatformInfoHob
->PciData
.PciResourceMem64Limit
+ 1;
75 PlatformInfoHob
->PciData
.PciResourceMinSecBus
= 1; //can be changed by SystemConfiguration->PciMinSecondaryBus;
78 // Set MemMaxTolm to the lowest address between PCIe Base and PCI32 Base.
80 if (PlatformInfoHob
->PciData
.PciExpressBase
> PlatformInfoHob
->PciData
.PciResourceMem32Base
) {
81 PlatformInfoHob
->MemData
.MemMaxTolm
= (UINT32
) PlatformInfoHob
->PciData
.PciResourceMem32Base
;
83 PlatformInfoHob
->MemData
.MemMaxTolm
= (UINT32
) PlatformInfoHob
->PciData
.PciExpressBase
;
85 PlatformInfoHob
->MemData
.MemTolm
= PlatformInfoHob
->MemData
.MemMaxTolm
;
88 // Platform PCI MMIO Size in unit of 1MB.
90 PlatformInfoHob
->MemData
.MmioSize
= 0x1000 - (UINT16
)(PlatformInfoHob
->MemData
.MemMaxTolm
>> 20);
95 PlatformInfoHob
->SysData
.SysIoApicEnable
= ICH_IOAPIC
;
97 DEBUG ((EFI_D_ERROR
, "PlatformFlavor is %x (%x=tablet,%x=mobile,%x=desktop)\n",
98 PlatformInfoHob
->PlatformFlavor
,
104 // Get Platform Info and fill the Hob.
106 PlatformInfoHob
->RevisonId
= PLATFORM_INFO_HOB_REVISION
;
111 MultiPlatformGpioTableInit (PeiServices
, PlatformInfoHob
);
116 MultiPlatformGpioProgram (PeiServices
, PlatformInfoHob
);
121 InitializeBoardOemId (PeiServices
, PlatformInfoHob
);
122 InitializeBoardSsidSvid (PeiServices
, PlatformInfoHob
);