Vlv2TbltDevicePkg/Library/ResetSystemLib/ResetSystemLib.c

   1 /** @file
   2
   3   Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
   4   SPDX-License-Identifier: BSD-2-Clause-Patent
   5
   6
   7
   8
   9 Module Name:
  10
  11   IdeBus.h
  12
  13 Abstract:
  14
  15   System reset Library Services.  This library class provides a set of
  16   methods to reset whole system with manipulate ICH.
  17
  18 **/
  19
  20
  21 #include <Base.h>
  22
  23
  24 #include <Library/ResetSystemLib.h>
  25 #include <Library/BaseLib.h>
  26 #include <Library/IoLib.h>
  27 #include <Library/DebugLib.h>
  28 #include <Library/PciLib.h>
  29
  30 #include "PchRegs.h"
  31 #include "Rsci.h"
  32 #include "Platform.h"
  33
  34 #define RESET_GENERATOR_PORT R_PCH_RST_CNT
  35
  36 VOID
  37 EFIAPI
  38 PlatformResetHook (
  39   UINT8 ResetType
  40   )
  41 {
  42   //
  43   // Platform need to save OS reset request/types for next Android boot
  44   //
  45   IoWrite8 (0x72, CMOS_RESET_TYPE_BY_OS);
  46   IoWrite8 (0x73, ResetType);
  47 }
  48
  49 /**
  50   Calling this function causes a system-wide reset. This sets
  51   all circuitry within the system to its initial state. This type of reset
  52   is asynchronous to system operation and operates without regard to
  53   cycle boundaries.
  54
  55   System reset should not return, if it returns, it means the system does
  56   not support cold reset.
  57 **/
  58 VOID
  59 EFIAPI
  60 ResetCold (
  61   VOID
  62   )
  63 {
  64   PlatformResetHook(COLD_RESET);
  65   IoWrite8 (RESET_GENERATOR_PORT, 0x2);
  66   IoWrite8 (RESET_GENERATOR_PORT, 0x6);
  67 }
  68
  69 /**
  70   Calling this function causes a system-wide initialization. The processors
  71   are set to their initial state, and pending cycles are not corrupted.
  72
  73   System reset should not return, if it returns, it means the system does
  74   not support warm reset.
  75 **/
  76 VOID
  77 EFIAPI
  78 ResetWarm (
  79   VOID
  80   )
  81 {
  82   PlatformResetHook(WARM_RESET);
  83   IoWrite8 (RESET_GENERATOR_PORT, 0x0);
  84   IoWrite8 (RESET_GENERATOR_PORT, 0x4);
  85 }
  86
  87 /**
  88   Calling this function causes the system to enter a power state equivalent
  89   to the ACPI G2/S5 or G3 states.
  90
  91   System shutdown should not return, if it returns, it means the system does
  92   not support shut down reset.
  93 **/
  94 VOID
  95 EFIAPI
  96 ResetShutdown (
  97   VOID
  98   )
  99 {
 100   UINT16  PchPmioBase;
 101   UINT16  Data16;
 102   UINT32  Data32;
 103
 104   PchPmioBase = (UINT16) (PciRead16 (PCI_LIB_ADDRESS(0, PCI_DEVICE_NUMBER_PCH_LPC, 0, R_PCH_LPC_ACPI_BASE)) & ~BIT0);
 105
 106   //
 107   // Then, GPE0_EN should be disabled to avoid any GPI waking up the system from S5
 108   //
 109   Data16 = 0;
 110   IoWrite16 (
 111     (UINTN)(PchPmioBase + R_PCH_ACPI_GPE0a_EN),
 112     (UINT16)Data16
 113     );
 114
 115   //
 116   // Clear Sleep SMI Status
 117   //
 118   IoWrite16 (PchPmioBase + R_PCH_SMI_STS,
 119              (UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_STS) | B_PCH_SMI_STS_ON_SLP_EN));
 120   //
 121   // Clear Sleep Type Enable
 122   //
 123   IoWrite16 (PchPmioBase + R_PCH_SMI_EN,
 124              (UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_EN) & (~B_PCH_SMI_EN_ON_SLP_EN)));
 125   //
 126   // Clear Power Button Status
 127   //
 128   IoWrite16(PchPmioBase + R_PCH_ACPI_PM1_STS, B_PCH_ACPI_PM1_STS_PWRBTN);
 129
 130   //
 131   // Secondly, Power Button Status bit must be cleared
 132   //
 133   // Write a "1" to bit[8] of power button status register at
 134   // (ABASE + PM1_STS) to clear this bit
 135   // Clear it through SMI Status register
 136   //
 137   Data16 = B_PCH_SMI_STS_PM1_STS_REG;
 138   IoWrite16 ((UINTN) (PchPmioBase + R_PCH_SMI_STS), Data16);
 139
 140   //
 141   // Finally, transform system into S5 sleep state
 142   //
 143   Data32  = IoRead32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT));
 144
 145   Data32  = (UINT32) ((Data32 &~(B_PCH_ACPI_PM1_CNT_SLP_TYP + B_PCH_ACPI_PM1_CNT_SLP_EN)) | V_PCH_ACPI_PM1_CNT_S5);
 146
 147   IoWrite32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT), Data32);
 148
 149   Data32 = Data32 | B_PCH_ACPI_PM1_CNT_SLP_EN;
 150
 151   IoWrite32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT), Data32);
 152
 153   return;
 154 }
 155
 156 /**
 157   Calling this function causes the system to enter a power state for capsule
 158   update.
 159
 160   Reset update should not return, if it returns, it means the system does
 161   not support capsule update.
 162
 163 **/
 164 VOID
 165 EFIAPI
 166 EnterS3WithImmediateWake (
 167   VOID
 168   )
 169 {
 170   ASSERT (FALSE);
 171 }
 172
 173 /**
 174   This function causes a systemwide reset. The exact type of the reset is
 175   defined by the EFI_GUID that follows the Null-terminated Unicode string passed
 176   into ResetData. If the platform does not recognize the EFI_GUID in ResetData
 177   the platform must pick a supported reset type to perform.The platform may
 178   optionally log the parameters from any non-normal reset that occurs.
 179
 180   @param[in]  DataSize   The size, in bytes, of ResetData.
 181   @param[in]  ResetData  The data buffer starts with a Null-terminated string,
 182                          followed by the EFI_GUID.
 183 **/
 184 VOID
 185 EFIAPI
 186 ResetPlatformSpecific (
 187   IN UINTN   DataSize,
 188   IN VOID    *ResetData
 189   )
 190 {
 191   ResetCold ();
 192 }