3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
15 Sets platform/SKU specific expansion slot information.
22 #include "PlatformDxe.h"
23 #include <Protocol/SmbiosSlotPopulation.h>
24 #include <IndustryStandard/Pci22.h>
28 // Default bus number for the bridge
30 #define DEF_BUS_CONFIG 0x0101
34 // Data structures for slot information
42 } EFI_PCI_SLOT_BRIDGE_INFO
;
45 // Product specific bridge to slot routing information
47 EFI_PCI_SLOT_BRIDGE_INFO mSlotBridgeTable
[] = {
49 0x01, //PCIe x1 ICH (Bridge B0:D28:F1)
50 DEFAULT_PCI_BUS_NUMBER_PCH
,
51 PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS
,
52 PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2
,
57 UINTN mSlotBridgeTableSize
=
58 sizeof(mSlotBridgeTable
) / sizeof(EFI_PCI_SLOT_BRIDGE_INFO
);
61 // Slot entry table for IBX RVP
63 EFI_SMBIOS_SLOT_ENTRY mSlotEntries
[] = {
64 {0x06, FALSE
, TRUE
}, // PCIe x16 Slot 1 (NOT USED)
65 {0x04, FALSE
, TRUE
}, // PCIe x16 Slot 2 (NOT USED)
66 {0x03, FALSE
, TRUE
}, // PCIe x4 Slot (NOT USED)
67 {0x02, FALSE
, FALSE
}, // Mini PCIe x1 Slot
68 {0x15, FALSE
, TRUE
}, // PCIe x1 Slot 2 (NOT USED)
69 {0x16, FALSE
, TRUE
}, // PCIe x1 Slot 3 (NOT USED)
70 {0x07, FALSE
, FALSE
}, // PCI Slot 1
71 {0x18, FALSE
, TRUE
}, // PCI Slot 2 (NOT USED)
72 {0x17, FALSE
, TRUE
}, // PCI Slot 3 (NOT USED)
75 EFI_SMBIOS_SLOT_POPULATION_INFO mSlotInformation
= {
76 sizeof(mSlotEntries
) / sizeof(EFI_SMBIOS_SLOT_ENTRY
),