Vlv2TbltDevicePkg: Convert UNIX to DOS format.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x001A5000
52
53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x003A5000
54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002B000
55
56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003D0000
57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00030000
58
59 ################################################################################
60 #
61 # FD Section
62 # The [FD] Section is made up of the definition statements and a
63 # description of what goes into the Flash Device Image. Each FD section
64 # defines one flash "device" image. A flash device image may be one of
65 # the following: Removable media bootable image (like a boot floppy
66 # image,) an Option ROM image (that would be "flashed" into an add-in
67 # card,) a System "Flash" image (that would be burned into a system's
68 # flash) or an Update ("Capsule") image that will be used to update and
69 # existing system flash.
70 #
71 ################################################################################
72 [FD.Vlv]
73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75 ErasePolarity = 1
76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79 #
80 #Flash location override based on actual flash map
81 #
82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85 !if $(MINNOW2_FSP_BUILD) == TRUE
86 # put below PCD value setting into dsc file
87 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
88 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
89 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
91 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
94
95 !endif
96 ################################################################################
97 #
98 # Following are lists of FD Region layout which correspond to the locations of different
99 # images within the flash device.
100 #
101 # Regions must be defined in ascending order and may not overlap.
102 #
103 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
104 # the pipe "|" character, followed by the size of the region, also in hex with the leading
105 # "0x" characters. Like:
106 # Offset|Size
107 # PcdOffsetCName|PcdSizeCName
108 # RegionType <FV, DATA, or FILE>
109 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
110 #
111 ################################################################################
112 #
113 # CPU Microcodes
114 #
115
116 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
117 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
118 FV = MICROCODE_FV
119 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
120 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
121 #NV_VARIABLE_STORE
122 DATA = {
123 ## This is the EFI_FIRMWARE_VOLUME_HEADER
124 # ZeroVector []
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 # FileSystemGuid: gEfiSystemNvDataFvGuid =
128 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
129 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
130 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
131 # FvLength: 0x80000
132 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
133 #Signature "_FVH" #Attributes
134 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
135 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
136 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
137 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
138 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
139 #Blockmap[1]: End
140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
141 ## This is the VARIABLE_STORE_HEADER
142 !if $(SECURE_BOOT_ENABLE) == TRUE
143 #Signature: gEfiAuthenticatedVariableGuid =
144 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
145 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
146 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
147 !else
148 #Signature: gEfiVariableGuid =
149 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
150 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
151 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
152 !endif
153 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
154 # This can speed up the Variable Dispatch a bit.
155 0xB8, 0xDF, 0x03, 0x00,
156 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
157 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
158 }
159
160
161 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
162 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
163 #NV_FTW_WORKING
164 DATA = {
165 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
166 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
167 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
168 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
169
170 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
171 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
172 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
173 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
174 }
175
176 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
177 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
178
179 !if $(MINNOW2_FSP_BUILD) == TRUE
180
181 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
182 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
183 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
184
185
186 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
187 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
188
189 !endif
190
191 #
192 # Main Block
193 #
194 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
195 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
196 FV = FVMAIN_COMPACT
197
198 #
199 # FV Recovery#2
200 #
201 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
202 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
203 FV = FVRECOVERY2
204
205 #
206 # FV Recovery
207 #
208 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
209 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
210 FV = FVRECOVERY
211
212 ################################################################################
213 #
214 # FV Section
215 #
216 # [FV] section is used to define what components or modules are placed within a flash
217 # device file. This section also defines order the components and modules are positioned
218 # within the image. The [FV] section consists of define statements, set statements and
219 # module statements.
220 #
221 ################################################################################
222 [FV.MICROCODE_FV]
223 BlockSize = $(FLASH_BLOCK_SIZE)
224 FvAlignment = 16
225 ERASE_POLARITY = 1
226 MEMORY_MAPPED = TRUE
227 STICKY_WRITE = TRUE
228 LOCK_CAP = TRUE
229 LOCK_STATUS = FALSE
230 WRITE_DISABLED_CAP = TRUE
231 WRITE_ENABLED_CAP = TRUE
232 WRITE_STATUS = TRUE
233 WRITE_LOCK_CAP = TRUE
234 WRITE_LOCK_STATUS = TRUE
235 READ_DISABLED_CAP = TRUE
236 READ_ENABLED_CAP = TRUE
237 READ_STATUS = TRUE
238 READ_LOCK_CAP = TRUE
239 READ_LOCK_STATUS = TRUE
240
241 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
242 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin
243 }
244
245 ################################################################################
246 #
247 # FV Section
248 #
249 # [FV] section is used to define what components or modules are placed within a flash
250 # device file. This section also defines order the components and modules are positioned
251 # within the image. The [FV] section consists of define statements, set statements and
252 # module statements.
253 #
254 ################################################################################
255 [FV.FVRECOVERY2]
256 BlockSize = $(FLASH_BLOCK_SIZE)
257 FvAlignment = 16 #FV alignment and FV attributes setting.
258 ERASE_POLARITY = 1
259 MEMORY_MAPPED = TRUE
260 STICKY_WRITE = TRUE
261 LOCK_CAP = TRUE
262 LOCK_STATUS = TRUE
263 WRITE_DISABLED_CAP = TRUE
264 WRITE_ENABLED_CAP = TRUE
265 WRITE_STATUS = TRUE
266 WRITE_LOCK_CAP = TRUE
267 WRITE_LOCK_STATUS = TRUE
268 READ_DISABLED_CAP = TRUE
269 READ_ENABLED_CAP = TRUE
270 READ_STATUS = TRUE
271 READ_LOCK_CAP = TRUE
272 READ_LOCK_STATUS = TRUE
273 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
274
275
276
277 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
278
279 !if $(MINNOW2_FSP_BUILD) == FALSE
280 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
281 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
282 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
283 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
284 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
285 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
286 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
287 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
288 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
289 !endif
290
291 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
292 !if $(TPM_ENABLED) == TRUE
293 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
294 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
295 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
296 !endif
297 !if $(FTPM_ENABLE) == TRUE
298 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
299 !endif
300 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
301
302 !if $(ACPI50_ENABLE) == TRUE
303 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
304 !endif
305 !if $(PERFORMANCE_ENABLE) == TRUE
306 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
307 !endif
308
309 [FV.FVRECOVERY]
310 BlockSize = $(FLASH_BLOCK_SIZE)
311 FvAlignment = 16 #FV alignment and FV attributes setting.
312 ERASE_POLARITY = 1
313 MEMORY_MAPPED = TRUE
314 STICKY_WRITE = TRUE
315 LOCK_CAP = TRUE
316 LOCK_STATUS = TRUE
317 WRITE_DISABLED_CAP = TRUE
318 WRITE_ENABLED_CAP = TRUE
319 WRITE_STATUS = TRUE
320 WRITE_LOCK_CAP = TRUE
321 WRITE_LOCK_STATUS = TRUE
322 READ_DISABLED_CAP = TRUE
323 READ_ENABLED_CAP = TRUE
324 READ_STATUS = TRUE
325 READ_LOCK_CAP = TRUE
326 READ_LOCK_STATUS = TRUE
327 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
328
329
330 !if $(MINNOW2_FSP_BUILD) == TRUE
331 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
332 !else
333 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
334 !endif
335
336 INF MdeModulePkg/Core/Pei/PeiMain.inf
337 !if $(MINNOW2_FSP_BUILD) == TRUE
338 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
339 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
340 !endif
341 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
342 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
343 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
344
345 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
346
347 !if $(MINNOW2_FSP_BUILD) == FALSE
348 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
349 !endif
350
351 !if $(FTPM_ENABLE) == TRUE
352 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
353 !endif
354
355 !if $(SOURCE_DEBUG_ENABLE) == TRUE
356 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
357 !endif
358
359
360 !if $(CAPSULE_ENABLE) == TRUE
361 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
362 !if $(DXE_ARCHITECTURE) == "X64"
363 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
364 !endif
365 !endif
366
367 !if $(MINNOW2_FSP_BUILD) == FALSE
368 !if $(PCIESC_ENABLE) == TRUE
369 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
370 !endif
371 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
372 !endif
373
374 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
375
376 [FV.FVMAIN]
377 BlockSize = $(FLASH_BLOCK_SIZE)
378 FvAlignment = 16
379 ERASE_POLARITY = 1
380 MEMORY_MAPPED = TRUE
381 STICKY_WRITE = TRUE
382 LOCK_CAP = TRUE
383 LOCK_STATUS = TRUE
384 WRITE_DISABLED_CAP = TRUE
385 WRITE_ENABLED_CAP = TRUE
386 WRITE_STATUS = TRUE
387 WRITE_LOCK_CAP = TRUE
388 WRITE_LOCK_STATUS = TRUE
389 READ_DISABLED_CAP = TRUE
390 READ_ENABLED_CAP = TRUE
391 READ_STATUS = TRUE
392 READ_LOCK_CAP = TRUE
393 READ_LOCK_STATUS = TRUE
394 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
395
396 APRIORI DXE {
397 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
398 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
399 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
400 }
401
402 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
403 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
404 }
405
406 #
407 # EDK II Related Platform codes
408 #
409
410 !if $(MINNOW2_FSP_BUILD) == TRUE
411 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
412 !endif
413
414 INF MdeModulePkg/Core/Dxe/DxeMain.inf
415 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
416 !if $(ACPI50_ENABLE) == TRUE
417 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
418 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
419 !endif
420
421
422 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
423 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
424 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
425 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
426 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
427 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
428 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
429 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
430 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
431 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
432 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
433 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
434 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
435
436 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
437 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
438 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
439 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
440 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
441 !if $(SECURE_BOOT_ENABLE)
442 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
443 !endif
444
445 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
446
447 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
448 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
449 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
450 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
451
452
453 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
454
455 !if $(DATAHUB_ENABLE) == TRUE
456 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
457 !endif
458 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
459 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
460
461 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
462
463 #
464 # EDK II Related Silicon codes
465 #
466 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
467
468 !if $(USE_HPET_TIMER) == TRUE
469 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
470 !else
471 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
472 !endif
473 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
474
475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
476
477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
479
480 !if $(MINNOW2_FSP_BUILD) == FALSE
481 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
482 !endif
483 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
484 !if $(PCIESC_ENABLE) == TRUE
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
486 !endif
487
488 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
489 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
490 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
492 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
493 !if $(MINNOW2_FSP_BUILD) == FALSE
494 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
495 !else
496 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
497 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
498 !endif
499 !if $(MINNOW2_FSP_BUILD) == FALSE
500 !if $(SEC_ENABLE) == TRUE
501 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
502 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
503 !endif
504 !endif
505 !if $(TPM_ENABLED) == TRUE
506 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
507 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
508 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
509 !endif
510 !if $(FTPM_ENABLE) == TRUE
511 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
512 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
513 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
514 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
515 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
516 !endif
517
518 #
519 # EDK II Related Platform codes
520 #
521 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
522 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
523 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
524 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
525 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
526 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
527 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
528 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
529 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
530 !if $(GOP_DRIVER_ENABLE) == TRUE
531 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
532 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
533 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
534 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
535 SECTION UI = "IntelGopDriver"
536 }
537 !endif
538
539 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
540 #
541 # SMM
542 #
543 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
544 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
545 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
546
547 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
548 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
549 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
550 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
551 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
552 # INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
553 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
554 #
555 # ACPI
556 #
557 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
558 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
559 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
560 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
561
562 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
563
564 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
565
566 #
567 # PCI
568 #
569 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
570
571 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
572
573
574 #
575 # ISA
576 #
577 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
578 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
579 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
580 !if $(SOURCE_DEBUG_ENABLE) != TRUE
581 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
582 !endif
583 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
584 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
585
586 #
587 # SDIO
588 #
589 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
590 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
591 #
592 # IDE/SCSI/AHCI
593 #
594 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
595
596 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
597
598 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
599 !if $(SATA_ENABLE) == TRUE
600 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
601 #
602
603 #
604 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
605 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
606 !if $(SCSI_ENABLE) == TRUE
607 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
608 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
609 !endif
610 #
611 !endif
612 # Console
613 #
614 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
615 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
616 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
617 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
618 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
619 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
620 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
621 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
622 #
623 # USB
624 #
625 !if $(USB_ENABLE) == TRUE
626 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
627 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
628 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
629 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
630 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
631 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
632 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
633 !endif
634
635 #
636 # ECP
637 #
638 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
639 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
640 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
641 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
642 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
643 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
644 #
645 # SMBIOS
646 #
647 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
648 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
649
650 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
651
652 #
653 # Legacy Modules
654 #
655 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
656
657 #
658 # FAT file system
659 #
660 INF FatPkg/EnhancedFatDxe/Fat.inf
661
662 #
663 # UEFI Shell
664 #
665 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
666 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
667 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
668 }
669
670
671
672 !if $(GOP_DRIVER_ENABLE) == TRUE
673 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
674 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
675 SECTION UI = "IntelGopVbt"
676 }
677 !endif
678
679 #
680 # Network Modules
681 #
682 !if $(NETWORK_ENABLE) == TRUE
683 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
684 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
685 SECTION UI = "UNDI"
686 }
687 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
688 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
689 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
690 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
691 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
692 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
693 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
694 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
695 !if $(NETWORK_IP6_ENABLE) == TRUE
696 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
697 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
698 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
699 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
700 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
701 !endif
702 !if $(NETWORK_IP6_ENABLE) == TRUE
703 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
704 INF NetworkPkg/TcpDxe/TcpDxe.inf
705 !else
706 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
707 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
708 !endif
709 !if $(NETWORK_VLAN_ENABLE) == TRUE
710 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
711 !endif
712 !if $(NETWORK_ISCSI_ENABLE) == TRUE
713 !if $(NETWORK_IP6_ENABLE) == TRUE
714 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
715 !else
716 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
717 !endif
718 !endif
719 !endif
720
721 [FV.FVMAIN_COMPACT]
722 BlockSize = $(FLASH_BLOCK_SIZE)
723 FvAlignment = 16
724 ERASE_POLARITY = 1
725 MEMORY_MAPPED = TRUE
726 STICKY_WRITE = TRUE
727 LOCK_CAP = TRUE
728 LOCK_STATUS = TRUE
729 WRITE_DISABLED_CAP = TRUE
730 WRITE_ENABLED_CAP = TRUE
731 WRITE_STATUS = TRUE
732 WRITE_LOCK_CAP = TRUE
733 WRITE_LOCK_STATUS = TRUE
734 READ_DISABLED_CAP = TRUE
735 READ_ENABLED_CAP = TRUE
736 READ_STATUS = TRUE
737 READ_LOCK_CAP = TRUE
738 READ_LOCK_STATUS = TRUE
739
740
741
742 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
743 !if $(LZMA_ENABLE) == TRUE
744 # LZMA Compress
745 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
746 SECTION FV_IMAGE = FVMAIN
747 }
748 !else
749 !if $(DXE_COMPRESS_ENABLE) == TRUE
750 # Tiano Compress
751 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
752 SECTION FV_IMAGE = FVMAIN
753 }
754 !else
755 # No Compress
756 SECTION COMPRESS PI_NONE {
757 SECTION FV_IMAGE = FVMAIN
758 }
759 !endif
760 !endif
761 }
762
763 [FV.SETUP_DATA]
764 BlockSize = $(FLASH_BLOCK_SIZE)
765 #NumBlocks = 0x10
766 FvAlignment = 16
767 ERASE_POLARITY = 1
768 MEMORY_MAPPED = TRUE
769 STICKY_WRITE = TRUE
770 LOCK_CAP = TRUE
771 LOCK_STATUS = TRUE
772 WRITE_DISABLED_CAP = TRUE
773 WRITE_ENABLED_CAP = TRUE
774 WRITE_STATUS = TRUE
775 WRITE_LOCK_CAP = TRUE
776 WRITE_LOCK_STATUS = TRUE
777 READ_DISABLED_CAP = TRUE
778 READ_ENABLED_CAP = TRUE
779 READ_STATUS = TRUE
780 READ_LOCK_CAP = TRUE
781 READ_LOCK_STATUS = TRUE
782
783
784 [FV.Update_Data]
785 BlockSize = $(FLASH_BLOCK_SIZE)
786 FvAlignment = 16
787 ERASE_POLARITY = 1
788 MEMORY_MAPPED = TRUE
789 STICKY_WRITE = TRUE
790 LOCK_CAP = TRUE
791 LOCK_STATUS = TRUE
792 WRITE_DISABLED_CAP = TRUE
793 WRITE_ENABLED_CAP = TRUE
794 WRITE_STATUS = TRUE
795 WRITE_LOCK_CAP = TRUE
796 WRITE_LOCK_STATUS = TRUE
797 READ_DISABLED_CAP = TRUE
798 READ_ENABLED_CAP = TRUE
799 READ_STATUS = TRUE
800 READ_LOCK_CAP = TRUE
801 READ_LOCK_STATUS = TRUE
802
803 FILE RAW = 88888888-8888-8888-8888-888888888888 {
804 FD = Vlv
805 }
806
807 [FV.BiosUpdateCargo]
808 BlockSize = $(FLASH_BLOCK_SIZE)
809 FvAlignment = 16
810 ERASE_POLARITY = 1
811 MEMORY_MAPPED = TRUE
812 STICKY_WRITE = TRUE
813 LOCK_CAP = TRUE
814 LOCK_STATUS = TRUE
815 WRITE_DISABLED_CAP = TRUE
816 WRITE_ENABLED_CAP = TRUE
817 WRITE_STATUS = TRUE
818 WRITE_LOCK_CAP = TRUE
819 WRITE_LOCK_STATUS = TRUE
820 READ_DISABLED_CAP = TRUE
821 READ_ENABLED_CAP = TRUE
822 READ_STATUS = TRUE
823 READ_LOCK_CAP = TRUE
824 READ_LOCK_STATUS = TRUE
825
826
827
828 [FV.BiosUpdate]
829 BlockSize = $(FLASH_BLOCK_SIZE)
830 FvAlignment = 16
831 ERASE_POLARITY = 1
832 MEMORY_MAPPED = TRUE
833 STICKY_WRITE = TRUE
834 LOCK_CAP = TRUE
835 LOCK_STATUS = TRUE
836 WRITE_DISABLED_CAP = TRUE
837 WRITE_ENABLED_CAP = TRUE
838 WRITE_STATUS = TRUE
839 WRITE_LOCK_CAP = TRUE
840 WRITE_LOCK_STATUS = TRUE
841 READ_DISABLED_CAP = TRUE
842 READ_ENABLED_CAP = TRUE
843 READ_STATUS = TRUE
844 READ_LOCK_CAP = TRUE
845 READ_LOCK_STATUS = TRUE
846
847 [Capsule.Capsule_Boot]
848 #
849 # gEfiCapsuleGuid supported by platform
850 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
851 #
852 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
853 CAPSULE_FLAGS = PersistAcrossReset
854 CAPSULE_HEADER_SIZE = 0x20
855
856 FV = BiosUpdate
857
858 [Capsule.Capsule_Reset]
859 #
860 # gEfiCapsuleGuid supported by platform
861 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
862 #
863 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
864 CAPSULE_FLAGS = PersistAcrossReset
865 CAPSULE_HEADER_SIZE = 0x20
866
867 FV = BiosUpdate
868
869 ################################################################################
870 #
871 # Rules are use with the [FV] section's module INF type to define
872 # how an FFS file is created for a given INF file. The following Rule are the default
873 # rules for the different module type. User can add the customized rules to define the
874 # content of the FFS file.
875 #
876 ################################################################################
877 [Rule.Common.SEC]
878 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
879 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
880 RAW BIN Align = 16 |.com
881 }
882
883 [Rule.Common.SEC.BINARY]
884 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
885 PE32 PE32 Align = 8 |.efi
886 RAW BIN Align = 16 |.com
887 }
888
889 [Rule.Common.PEI_CORE]
890 FILE PEI_CORE = $(NAMED_GUID) {
891 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
892 UI STRING="$(MODULE_NAME)" Optional
893 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
894 }
895
896 [Rule.Common.PEIM]
897 FILE PEIM = $(NAMED_GUID) {
898 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
899 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
900 UI STRING="$(MODULE_NAME)" Optional
901 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
902 }
903
904 [Rule.Common.PEIM.BINARY]
905 FILE PEIM = $(NAMED_GUID) {
906 PEI_DEPEX PEI_DEPEX Optional |.depex
907 PE32 PE32 Align = Auto |.efi
908 UI STRING="$(MODULE_NAME)" Optional
909 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
910 }
911
912 [Rule.Common.PEIM.BIOSID]
913 FILE PEIM = $(NAMED_GUID) {
914 RAW BIN BiosId.bin
915 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
916 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
917 UI STRING="$(MODULE_NAME)" Optional
918 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
919 }
920
921 [Rule.Common.USER_DEFINED.APINIT]
922 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
923 RAW SEC_BIN |.com
924 }
925 #cjia 2011-07-21
926 [Rule.Common.USER_DEFINED.LEGACY16]
927 FILE FREEFORM = $(NAMED_GUID) {
928 UI STRING="$(MODULE_NAME)" Optional
929 RAW BIN |.bin
930 }
931 #cjia
932
933 [Rule.Common.USER_DEFINED.ASM16]
934 FILE FREEFORM = $(NAMED_GUID) {
935 UI STRING="$(MODULE_NAME)" Optional
936 RAW BIN |.com
937 }
938
939 [Rule.Common.DXE_CORE]
940 FILE DXE_CORE = $(NAMED_GUID) {
941 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
942 UI STRING="$(MODULE_NAME)" Optional
943 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
944 }
945
946 [Rule.Common.UEFI_DRIVER]
947 FILE DRIVER = $(NAMED_GUID) {
948 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
949 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
950 UI STRING="$(MODULE_NAME)" Optional
951 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
952 }
953
954 [Rule.Common.UEFI_DRIVER.BINARY]
955 FILE DRIVER = $(NAMED_GUID) {
956 DXE_DEPEX DXE_DEPEX Optional |.depex
957 PE32 PE32 |.efi
958 UI STRING="$(MODULE_NAME)" Optional
959 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
960 }
961
962 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
963 FILE DRIVER = $(NAMED_GUID) {
964 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
965 PE32 PE32 |.efi
966 UI STRING="$(MODULE_NAME)" Optional
967 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
968 }
969
970 [Rule.Common.DXE_DRIVER]
971 FILE DRIVER = $(NAMED_GUID) {
972 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
973 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
974 UI STRING="$(MODULE_NAME)" Optional
975 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
976 }
977
978 [Rule.Common.DXE_DRIVER.BINARY]
979 FILE DRIVER = $(NAMED_GUID) {
980 DXE_DEPEX DXE_DEPEX Optional |.depex
981 PE32 PE32 |.efi
982 UI STRING="$(MODULE_NAME)" Optional
983 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
984 }
985
986 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
987 FILE DRIVER = $(NAMED_GUID) {
988 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
989 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
990 UI STRING="$(MODULE_NAME)" Optional
991 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
992 RAW ACPI Optional |.acpi
993 RAW ASL Optional |.aml
994 }
995
996 [Rule.Common.DXE_RUNTIME_DRIVER]
997 FILE DRIVER = $(NAMED_GUID) {
998 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
999 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1000 UI STRING="$(MODULE_NAME)" Optional
1001 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1002 }
1003
1004 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
1005 FILE DRIVER = $(NAMED_GUID) {
1006 DXE_DEPEX DXE_DEPEX Optional |.depex
1007 PE32 PE32 |.efi
1008 UI STRING="$(MODULE_NAME)" Optional
1009 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1010 }
1011
1012 [Rule.Common.DXE_SMM_DRIVER]
1013 FILE SMM = $(NAMED_GUID) {
1014 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1015 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1016 UI STRING="$(MODULE_NAME)" Optional
1017 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1018 }
1019
1020 [Rule.Common.DXE_SMM_DRIVER.BINARY]
1021 FILE SMM = $(NAMED_GUID) {
1022 SMM_DEPEX SMM_DEPEX |.depex
1023 PE32 PE32 |.efi
1024 RAW BIN Optional |.aml
1025 UI STRING="$(MODULE_NAME)" Optional
1026 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1027 }
1028
1029 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1030 FILE SMM = $(NAMED_GUID) {
1031 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1032 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1033 UI STRING="$(MODULE_NAME)" Optional
1034 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1035 RAW ACPI Optional |.acpi
1036 RAW ASL Optional |.aml
1037 }
1038
1039 [Rule.Common.SMM_CORE]
1040 FILE SMM_CORE = $(NAMED_GUID) {
1041 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1042 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1043 UI STRING="$(MODULE_NAME)" Optional
1044 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1045 }
1046
1047 [Rule.Common.SMM_CORE.BINARY]
1048 FILE SMM_CORE = $(NAMED_GUID) {
1049 DXE_DEPEX DXE_DEPEX Optional |.depex
1050 PE32 PE32 |.efi
1051 UI STRING="$(MODULE_NAME)" Optional
1052 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1053 }
1054
1055 [Rule.Common.UEFI_APPLICATION]
1056 FILE APPLICATION = $(NAMED_GUID) {
1057 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1058 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1059 UI STRING="$(MODULE_NAME)" Optional
1060 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1061 }
1062
1063 [Rule.Common.UEFI_APPLICATION.UI]
1064 FILE APPLICATION = $(NAMED_GUID) {
1065 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1066 UI STRING="Enter Setup"
1067 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1068 }
1069
1070 [Rule.Common.USER_DEFINED]
1071 FILE FREEFORM = $(NAMED_GUID) {
1072 UI STRING="$(MODULE_NAME)" Optional
1073 RAW BIN |.bin
1074 }
1075
1076 [Rule.Common.USER_DEFINED.ACPITABLE]
1077 FILE FREEFORM = $(NAMED_GUID) {
1078 RAW ACPI Optional |.acpi
1079 RAW ASL Optional |.aml
1080 }
1081
1082 [Rule.Common.USER_DEFINED.ACPITABLE2]
1083 FILE FREEFORM = $(NAMED_GUID) {
1084 RAW ASL Optional |.aml
1085 }
1086
1087 [Rule.Common.ACPITABLE]
1088 FILE FREEFORM = $(NAMED_GUID) {
1089 RAW ACPI Optional |.acpi
1090 RAW ASL Optional |.aml
1091 }
1092