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Vlv2TbltDevicePkg: Add PchInitSmm module
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1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
5 #
6 # SPDX-License-Identifier: BSD-2-Clause-Patent
7 #
8 #
9 #**/
10
11 [Defines]
12 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
13 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
14 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
15 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
16 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
17 DEFINE FLASH_AREA_SIZE = 0x00800000
18
19 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
20 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
21 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
22
23 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
24 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
25
26 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
27 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
28
29
30 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
31 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
32
33 !if $(MINNOW2_FSP_BUILD) == TRUE
34 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
35 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
36 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
37
38 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
39 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
40 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
41
42 !endif
43
44 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
45 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
46
47 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
48 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
49
50 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
51 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
52
53 ################################################################################
54 #
55 # FD Section
56 # The [FD] Section is made up of the definition statements and a
57 # description of what goes into the Flash Device Image. Each FD section
58 # defines one flash "device" image. A flash device image may be one of
59 # the following: Removable media bootable image (like a boot floppy
60 # image,) an Option ROM image (that would be "flashed" into an add-in
61 # card,) a System "Flash" image (that would be burned into a system's
62 # flash) or an Update ("Capsule") image that will be used to update and
63 # existing system flash.
64 #
65 ################################################################################
66 [FD.Vlv]
67 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
68 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
69 ErasePolarity = 1
70 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
71 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
72
73 #
74 #Flash location override based on actual flash map
75 #
76 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
77 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
78
79 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
80 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
81
82 !if $(MINNOW2_FSP_BUILD) == TRUE
83 # put below PCD value setting into dsc file
84 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
85 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
86 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
87 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
88 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
89 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
91
92 !endif
93 ################################################################################
94 #
95 # Following are lists of FD Region layout which correspond to the locations of different
96 # images within the flash device.
97 #
98 # Regions must be defined in ascending order and may not overlap.
99 #
100 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
101 # the pipe "|" character, followed by the size of the region, also in hex with the leading
102 # "0x" characters. Like:
103 # Offset|Size
104 # PcdOffsetCName|PcdSizeCName
105 # RegionType <FV, DATA, or FILE>
106 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
107 #
108 ################################################################################
109 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
110 # so we hardcode the default value of variable here.
111 # Please note that we MUST update the binary once the default value is changed.
112
113 #
114 # CPU Microcodes
115 #
116
117 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
118 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
119 FV = MICROCODE_FV
120 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
121 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
122 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
123
124 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
125 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
126 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
127
128 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
129 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
130 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
131
132 !if $(MINNOW2_FSP_BUILD) == TRUE
133
134 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
135 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
136 FILE = Vlv2SocBinPkg/FspBinary/FvFsp.bin
137
138
139 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
140 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
141
142 !endif
143
144 #
145 # Main Block
146 #
147 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
148 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
149 FV = FVMAIN_COMPACT
150
151 #
152 # FV Recovery#2
153 #
154 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
155 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
156 FV = FVRECOVERY2
157
158 #
159 # FV Recovery
160 #
161 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
162 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
163 FV = FVRECOVERY
164
165 ################################################################################
166 #
167 # FV Section
168 #
169 # [FV] section is used to define what components or modules are placed within a flash
170 # device file. This section also defines order the components and modules are positioned
171 # within the image. The [FV] section consists of define statements, set statements and
172 # module statements.
173 #
174 ################################################################################
175 [FV.MICROCODE_FV]
176 BlockSize = $(FLASH_BLOCK_SIZE)
177 FvAlignment = 16
178 ERASE_POLARITY = 1
179 MEMORY_MAPPED = TRUE
180 STICKY_WRITE = TRUE
181 LOCK_CAP = TRUE
182 LOCK_STATUS = FALSE
183 WRITE_DISABLED_CAP = TRUE
184 WRITE_ENABLED_CAP = TRUE
185 WRITE_STATUS = TRUE
186 WRITE_LOCK_CAP = TRUE
187 WRITE_LOCK_STATUS = TRUE
188 READ_DISABLED_CAP = TRUE
189 READ_ENABLED_CAP = TRUE
190 READ_STATUS = TRUE
191 READ_LOCK_CAP = TRUE
192 READ_LOCK_STATUS = TRUE
193
194 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
195 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
196 }
197
198 !if $(RECOVERY_ENABLE)
199 [FV.FVRECOVERY_COMPONENTS]
200 FvAlignment = 16 #FV alignment and FV attributes setting.
201 ERASE_POLARITY = 1
202 MEMORY_MAPPED = TRUE
203 STICKY_WRITE = TRUE
204 LOCK_CAP = TRUE
205 LOCK_STATUS = TRUE
206 WRITE_DISABLED_CAP = TRUE
207 WRITE_ENABLED_CAP = TRUE
208 WRITE_STATUS = TRUE
209 WRITE_LOCK_CAP = TRUE
210 WRITE_LOCK_STATUS = TRUE
211 READ_DISABLED_CAP = TRUE
212 READ_ENABLED_CAP = TRUE
213 READ_STATUS = TRUE
214 READ_LOCK_CAP = TRUE
215 READ_LOCK_STATUS = TRUE
216
217 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
218 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
219 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
220 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
221 INF FatPkg/FatPei/FatPei.inf
222 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
223 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
224 !endif
225
226 ################################################################################
227 #
228 # FV Section
229 #
230 # [FV] section is used to define what components or modules are placed within a flash
231 # device file. This section also defines order the components and modules are positioned
232 # within the image. The [FV] section consists of define statements, set statements and
233 # module statements.
234 #
235 ################################################################################
236 [FV.FVRECOVERY2]
237 BlockSize = $(FLASH_BLOCK_SIZE)
238 FvAlignment = 16 #FV alignment and FV attributes setting.
239 ERASE_POLARITY = 1
240 MEMORY_MAPPED = TRUE
241 STICKY_WRITE = TRUE
242 LOCK_CAP = TRUE
243 LOCK_STATUS = TRUE
244 WRITE_DISABLED_CAP = TRUE
245 WRITE_ENABLED_CAP = TRUE
246 WRITE_STATUS = TRUE
247 WRITE_LOCK_CAP = TRUE
248 WRITE_LOCK_STATUS = TRUE
249 READ_DISABLED_CAP = TRUE
250 READ_ENABLED_CAP = TRUE
251 READ_STATUS = TRUE
252 READ_LOCK_CAP = TRUE
253 READ_LOCK_STATUS = TRUE
254 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
255
256
257
258 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
259
260 !if $(MINNOW2_FSP_BUILD) == FALSE
261 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
262 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
263 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
264 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
265 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
266 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
267 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
268 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
269 !endif
270
271 # INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
272 !if $(TPM_ENABLED) == TRUE
273 INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
274 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
275 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
276 !endif
277 !if $(FTPM_ENABLE) == TRUE
278 INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
279 !endif
280 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
281
282 !if $(ACPI50_ENABLE) == TRUE
283 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
284 !endif
285 !if $(PERFORMANCE_ENABLE) == TRUE
286 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
287 !endif
288
289 !if $(RECOVERY_ENABLE)
290 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
291 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
292 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
293 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
294 }
295 }
296 !endif
297
298 [FV.FVRECOVERY]
299 BlockSize = $(FLASH_BLOCK_SIZE)
300 FvAlignment = 16 #FV alignment and FV attributes setting.
301 ERASE_POLARITY = 1
302 MEMORY_MAPPED = TRUE
303 STICKY_WRITE = TRUE
304 LOCK_CAP = TRUE
305 LOCK_STATUS = TRUE
306 WRITE_DISABLED_CAP = TRUE
307 WRITE_ENABLED_CAP = TRUE
308 WRITE_STATUS = TRUE
309 WRITE_LOCK_CAP = TRUE
310 WRITE_LOCK_STATUS = TRUE
311 READ_DISABLED_CAP = TRUE
312 READ_ENABLED_CAP = TRUE
313 READ_STATUS = TRUE
314 READ_LOCK_CAP = TRUE
315 READ_LOCK_STATUS = TRUE
316 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
317
318
319 !if $(MINNOW2_FSP_BUILD) == TRUE
320 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
321 !else
322 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
323 !endif
324
325 INF MdeModulePkg/Core/Pei/PeiMain.inf
326 !if $(MINNOW2_FSP_BUILD) == TRUE
327 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
328 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
329 !endif
330 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
331 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
332 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
333
334 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
335
336 !if $(MINNOW2_FSP_BUILD) == FALSE
337 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
338 !endif
339
340 !if $(FTPM_ENABLE) == TRUE
341 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
342 !endif
343
344 !if $(SOURCE_DEBUG_ENABLE) == TRUE
345 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
346 !endif
347
348
349 !if $(CAPSULE_ENABLE) == TRUE
350 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
351 !if $(DXE_ARCHITECTURE) == "X64"
352 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
353 !endif
354 !endif
355
356 !if $(MINNOW2_FSP_BUILD) == FALSE
357 !if $(PCIESC_ENABLE) == TRUE
358 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
359 !endif
360 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
361 !endif
362
363 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
364
365 [FV.FVMAIN]
366 BlockSize = $(FLASH_BLOCK_SIZE)
367 FvAlignment = 16
368 ERASE_POLARITY = 1
369 MEMORY_MAPPED = TRUE
370 STICKY_WRITE = TRUE
371 LOCK_CAP = TRUE
372 LOCK_STATUS = TRUE
373 WRITE_DISABLED_CAP = TRUE
374 WRITE_ENABLED_CAP = TRUE
375 WRITE_STATUS = TRUE
376 WRITE_LOCK_CAP = TRUE
377 WRITE_LOCK_STATUS = TRUE
378 READ_DISABLED_CAP = TRUE
379 READ_ENABLED_CAP = TRUE
380 READ_STATUS = TRUE
381 READ_LOCK_CAP = TRUE
382 READ_LOCK_STATUS = TRUE
383 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
384
385 APRIORI DXE {
386 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
387 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
388 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
389 }
390
391 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
392 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
393 }
394
395 #
396 # EDK II Related Platform codes
397 #
398
399 !if $(MINNOW2_FSP_BUILD) == TRUE
400 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
401 !endif
402
403 INF MdeModulePkg/Core/Dxe/DxeMain.inf
404 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
405 !if $(ACPI50_ENABLE) == TRUE
406 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
407 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
408 !endif
409
410
411 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
412 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
413 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
414 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
415 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
416 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
417 INF UefiCpuPkg/CpuDxe/CpuDxe.inf
418 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
419 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
420 !if $(ARCH) == IA32
421 INF USE=IA32 MdeModulePkg/Logo/Logo.inf
422 !else
423 INF USE=X64 MdeModulePkg/Logo/Logo.inf
424 !endif
425 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
426 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
427 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
428 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
429
430 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
431 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
432 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
433 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
434 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
435 !if $(SECURE_BOOT_ENABLE)
436 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
437 !endif
438
439 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
440
441 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
442 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
443 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
444 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
445
446
447 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
448
449 !if $(DATAHUB_ENABLE) == TRUE
450 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
451 !endif
452 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
453 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
454
455 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
456
457 #
458 # EDK II Related Silicon codes
459 #
460 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
461
462 !if $(USE_HPET_TIMER) == TRUE
463 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
464 !else
465 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
466 !endif
467 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
468
469 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
470
471 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
472 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
473
474 !if $(MINNOW2_FSP_BUILD) == FALSE
475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
476 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf
477 !endif
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
479 !if $(PCIESC_ENABLE) == TRUE
480 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
481 !endif
482
483 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
484 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
486 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
487 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
488 !if $(MINNOW2_FSP_BUILD) == FALSE
489 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
490 !else
491 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
492 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
493 !endif
494 !if $(MINNOW2_FSP_BUILD) == FALSE
495 !if $(SEC_ENABLE) == TRUE
496 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
497 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
498 !endif
499 !endif
500 !if $(TPM_ENABLED) == TRUE
501 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
502 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
503 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
504 !endif
505 !if $(FTPM_ENABLE) == TRUE
506 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
507 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
508 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
509 INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
510 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
511 !endif
512
513 #
514 # EDK II Related Platform codes
515 #
516 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
517 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
518 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
519 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
520 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
521 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
522 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
523 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
524 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
525 !if $(GOP_DRIVER_ENABLE) == TRUE
526 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
527 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
528 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
529 SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
530 SECTION UI = "IntelGopDriver"
531 }
532 !endif
533
534 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
535 #
536 # SMM
537 #
538 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
539 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
540 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
541
542 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
543 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
544 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
545 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
546
547 #
548 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
549 #
550 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
551 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
552
553 #
554 # ACPI
555 #
556 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
557 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
558 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
559 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
560
561 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
562
563 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
564
565 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
566
567 #
568 # PCI
569 #
570 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
571
572 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
573
574
575 #
576 # ISA
577 #
578 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
579 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
580 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
581 !if $(SOURCE_DEBUG_ENABLE) != TRUE
582 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
583 !endif
584 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
585 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
586
587 #
588 # SDIO
589 #
590 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
591 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
592 #
593 # IDE/SCSI/AHCI
594 #
595 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
596
597 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
598
599 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
600 !if $(SATA_ENABLE) == TRUE
601 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
602 #
603
604 #
605 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
606 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
607 !if $(SCSI_ENABLE) == TRUE
608 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
609 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
610 !endif
611 #
612 !endif
613 # Console
614 #
615 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
616 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
617 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
618 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
619 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
620 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
621 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
622 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
623 #
624 # USB
625 #
626 !if $(USB_ENABLE) == TRUE
627 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
628 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
629 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
630 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
631 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
632 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
633 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
634 !endif
635
636 #
637 # SMBIOS
638 #
639 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
640 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
641
642 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
643
644
645 #
646 # FAT file system
647 #
648 INF FatPkg/EnhancedFatDxe/Fat.inf
649
650 #
651 # UEFI Shell
652 #
653 INF ShellPkg/Application/Shell/Shell.inf
654
655 #
656 # dp command
657 #
658 !if $(PERFORMANCE_ENABLE) == TRUE
659 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
660 !endif
661
662 !if $(GOP_DRIVER_ENABLE) == TRUE
663 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
664 SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
665 SECTION UI = "IntelGopVbt"
666 }
667 !endif
668
669 #
670 # Network Modules
671 #
672 !if $(NETWORK_ENABLE) == TRUE
673 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
674 SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
675 SECTION UI = "UNDI"
676 }
677 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
678 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
679 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
680 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
681 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
682 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
683 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
684 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
685 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
686 INF NetworkPkg/TcpDxe/TcpDxe.inf
687 !if $(NETWORK_IP6_ENABLE) == TRUE
688 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
689 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
690 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
691 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
692 !endif
693 !if $(NETWORK_VLAN_ENABLE) == TRUE
694 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
695 !endif
696 !if $(NETWORK_ISCSI_ENABLE) == TRUE
697 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
698 !endif
699 !endif
700
701 !if $(CAPSULE_ENABLE)
702 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
703
704 #
705 # Minnow Max System Firmware FMP
706 #
707 INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
708
709 #
710 # Sample Device FMP
711 #
712 INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
713 INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
714 INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
715
716 !endif
717
718 !if $(MICOCODE_CAPSULE_ENABLE)
719 INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
720 !endif
721
722 !if $(RECOVERY_ENABLE)
723 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
724 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
725 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
726 }
727 !endif
728
729 [FV.FVMAIN_COMPACT]
730 BlockSize = $(FLASH_BLOCK_SIZE)
731 FvAlignment = 16
732 ERASE_POLARITY = 1
733 MEMORY_MAPPED = TRUE
734 STICKY_WRITE = TRUE
735 LOCK_CAP = TRUE
736 LOCK_STATUS = TRUE
737 WRITE_DISABLED_CAP = TRUE
738 WRITE_ENABLED_CAP = TRUE
739 WRITE_STATUS = TRUE
740 WRITE_LOCK_CAP = TRUE
741 WRITE_LOCK_STATUS = TRUE
742 READ_DISABLED_CAP = TRUE
743 READ_ENABLED_CAP = TRUE
744 READ_STATUS = TRUE
745 READ_LOCK_CAP = TRUE
746 READ_LOCK_STATUS = TRUE
747
748
749
750 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
751 !if $(LZMA_ENABLE) == TRUE
752 # LZMA Compress
753 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
754 SECTION FV_IMAGE = FVMAIN
755 }
756 !else
757 !if $(DXE_COMPRESS_ENABLE) == TRUE
758 # Tiano Compress
759 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
760 SECTION FV_IMAGE = FVMAIN
761 }
762 !else
763 # No Compress
764 SECTION COMPRESS PI_NONE {
765 SECTION FV_IMAGE = FVMAIN
766 }
767 !endif
768 !endif
769 }
770
771 [FV.SETUP_DATA]
772 BlockSize = $(FLASH_BLOCK_SIZE)
773 #NumBlocks = 0x10
774 FvAlignment = 16
775 ERASE_POLARITY = 1
776 MEMORY_MAPPED = TRUE
777 STICKY_WRITE = TRUE
778 LOCK_CAP = TRUE
779 LOCK_STATUS = TRUE
780 WRITE_DISABLED_CAP = TRUE
781 WRITE_ENABLED_CAP = TRUE
782 WRITE_STATUS = TRUE
783 WRITE_LOCK_CAP = TRUE
784 WRITE_LOCK_STATUS = TRUE
785 READ_DISABLED_CAP = TRUE
786 READ_ENABLED_CAP = TRUE
787 READ_STATUS = TRUE
788 READ_LOCK_CAP = TRUE
789 READ_LOCK_STATUS = TRUE
790
791 ################################################################################
792 #
793 # Rules are use with the [FV] section's module INF type to define
794 # how an FFS file is created for a given INF file. The following Rule are the default
795 # rules for the different module type. User can add the customized rules to define the
796 # content of the FFS file.
797 #
798 ################################################################################
799 [Rule.Common.SEC]
800 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
801 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
802 RAW BIN Align = 16 |.com
803 }
804
805 [Rule.Common.SEC.BINARY]
806 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
807 PE32 PE32 Align = 8 |.efi
808 !if $(MINNOW2_FSP_BUILD) == TRUE
809 RAW RAW |.raw
810 !else
811 RAW BIN Align = 16 |.com
812 !endif
813 }
814
815 [Rule.Common.PEI_CORE]
816 FILE PEI_CORE = $(NAMED_GUID) {
817 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
818 UI STRING="$(MODULE_NAME)" Optional
819 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
820 }
821
822 [Rule.Common.PEIM]
823 FILE PEIM = $(NAMED_GUID) {
824 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
825 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
826 UI STRING="$(MODULE_NAME)" Optional
827 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
828 }
829
830 [Rule.Common.PEIM.BINARY]
831 FILE PEIM = $(NAMED_GUID) {
832 PEI_DEPEX PEI_DEPEX Optional |.depex
833 PE32 PE32 Align = Auto |.efi
834 UI STRING="$(MODULE_NAME)" Optional
835 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
836 }
837
838 [Rule.Common.PEIM.BIOSID]
839 FILE PEIM = $(NAMED_GUID) {
840 RAW BIN BiosId.bin
841 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
842 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
843 UI STRING="$(MODULE_NAME)" Optional
844 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
845 }
846
847 [Rule.Common.USER_DEFINED.APINIT]
848 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
849 RAW SEC_BIN |.com
850 }
851 #cjia 2011-07-21
852 [Rule.Common.USER_DEFINED.LEGACY16]
853 FILE FREEFORM = $(NAMED_GUID) {
854 UI STRING="$(MODULE_NAME)" Optional
855 RAW BIN |.bin
856 }
857 #cjia
858
859 [Rule.Common.USER_DEFINED.ASM16]
860 FILE FREEFORM = $(NAMED_GUID) {
861 UI STRING="$(MODULE_NAME)" Optional
862 RAW BIN |.com
863 }
864
865 [Rule.Common.DXE_CORE]
866 FILE DXE_CORE = $(NAMED_GUID) {
867 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
868 UI STRING="$(MODULE_NAME)" Optional
869 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
870 }
871
872 [Rule.Common.UEFI_DRIVER]
873 FILE DRIVER = $(NAMED_GUID) {
874 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
875 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
876 UI STRING="$(MODULE_NAME)" Optional
877 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
878 }
879
880 [Rule.Common.UEFI_DRIVER.BINARY]
881 FILE DRIVER = $(NAMED_GUID) {
882 DXE_DEPEX DXE_DEPEX Optional |.depex
883 PE32 PE32 |.efi
884 UI STRING="$(MODULE_NAME)" Optional
885 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
886 }
887
888 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
889 FILE DRIVER = $(NAMED_GUID) {
890 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
891 PE32 PE32 |.efi
892 UI STRING="$(MODULE_NAME)" Optional
893 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
894 }
895
896 [Rule.Common.DXE_DRIVER]
897 FILE DRIVER = $(NAMED_GUID) {
898 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
899 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
900 UI STRING="$(MODULE_NAME)" Optional
901 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
902 }
903
904 [Rule.Common.DXE_DRIVER.BINARY]
905 FILE DRIVER = $(NAMED_GUID) {
906 DXE_DEPEX DXE_DEPEX Optional |.depex
907 PE32 PE32 |.efi
908 UI STRING="$(MODULE_NAME)" Optional
909 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
910 }
911
912 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
913 FILE DRIVER = $(NAMED_GUID) {
914 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
915 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
916 UI STRING="$(MODULE_NAME)" Optional
917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
918 RAW ACPI Optional |.acpi
919 RAW ASL Optional |.aml
920 }
921
922 [Rule.Common.DXE_RUNTIME_DRIVER]
923 FILE DRIVER = $(NAMED_GUID) {
924 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
925 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
926 UI STRING="$(MODULE_NAME)" Optional
927 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
928 }
929
930 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
931 FILE DRIVER = $(NAMED_GUID) {
932 DXE_DEPEX DXE_DEPEX Optional |.depex
933 PE32 PE32 |.efi
934 UI STRING="$(MODULE_NAME)" Optional
935 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
936 }
937
938 [Rule.Common.DXE_SMM_DRIVER]
939 FILE SMM = $(NAMED_GUID) {
940 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
941 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
942 UI STRING="$(MODULE_NAME)" Optional
943 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
944 }
945
946 [Rule.Common.DXE_SMM_DRIVER.BINARY]
947 FILE SMM = $(NAMED_GUID) {
948 SMM_DEPEX SMM_DEPEX |.depex
949 PE32 PE32 |.efi
950 RAW BIN Optional |.aml
951 UI STRING="$(MODULE_NAME)" Optional
952 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
953 }
954
955 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
956 FILE SMM = $(NAMED_GUID) {
957 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
958 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
959 UI STRING="$(MODULE_NAME)" Optional
960 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
961 RAW ACPI Optional |.acpi
962 RAW ASL Optional |.aml
963 }
964
965 [Rule.Common.SMM_CORE]
966 FILE SMM_CORE = $(NAMED_GUID) {
967 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
968 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
969 UI STRING="$(MODULE_NAME)" Optional
970 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
971 }
972
973 [Rule.Common.SMM_CORE.BINARY]
974 FILE SMM_CORE = $(NAMED_GUID) {
975 DXE_DEPEX DXE_DEPEX Optional |.depex
976 PE32 PE32 |.efi
977 UI STRING="$(MODULE_NAME)" Optional
978 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
979 }
980
981 [Rule.Common.UEFI_APPLICATION]
982 FILE APPLICATION = $(NAMED_GUID) {
983 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
984 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
985 UI STRING="$(MODULE_NAME)" Optional
986 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
987 }
988
989 [Rule.Common.UEFI_APPLICATION.UI]
990 FILE APPLICATION = $(NAMED_GUID) {
991 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
992 UI STRING="Enter Setup"
993 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
994 }
995
996 [Rule.Common.USER_DEFINED]
997 FILE FREEFORM = $(NAMED_GUID) {
998 UI STRING="$(MODULE_NAME)" Optional
999 RAW BIN |.bin
1000 }
1001
1002 [Rule.Common.USER_DEFINED.BINARY]
1003 FILE FREEFORM = $(NAMED_GUID) {
1004 UI STRING="$(MODULE_NAME)" Optional
1005 RAW BIN |.bin
1006 }
1007
1008 [Rule.Common.USER_DEFINED.ACPITABLE]
1009 FILE FREEFORM = $(NAMED_GUID) {
1010 RAW ACPI Optional |.acpi
1011 RAW ASL Optional |.aml
1012 }
1013
1014 [Rule.Common.USER_DEFINED.ACPITABLE2]
1015 FILE FREEFORM = $(NAMED_GUID) {
1016 RAW ASL Optional |.aml
1017 }
1018
1019 [Rule.Common.ACPITABLE]
1020 FILE FREEFORM = $(NAMED_GUID) {
1021 RAW ACPI Optional |.acpi
1022 RAW ASL Optional |.aml
1023 }
1024
1025 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1026 FILE PEIM = $(NAMED_GUID) {
1027 RAW BIN |.acpi
1028 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1029 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1030 UI STRING="$(MODULE_NAME)" Optional
1031 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1032 }