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1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
5 #
6 # SPDX-License-Identifier: BSD-2-Clause-Patent
7 #
8 #
9 #**/
10
11 [Defines]
12 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
13 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
14 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
15 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
16 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
17 DEFINE FLASH_AREA_SIZE = 0x00800000
18
19 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
20 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
21 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
22
23 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
24 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
25
26 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
27 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
28
29
30 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
31 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
32
33 !if $(MINNOW2_FSP_BUILD) == TRUE
34 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
35 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
36 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
37
38 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
39 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
40 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
41
42 !endif
43
44 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
45 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
46
47 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
48 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
49
50 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
51 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
52
53 ################################################################################
54 #
55 # FD Section
56 # The [FD] Section is made up of the definition statements and a
57 # description of what goes into the Flash Device Image. Each FD section
58 # defines one flash "device" image. A flash device image may be one of
59 # the following: Removable media bootable image (like a boot floppy
60 # image,) an Option ROM image (that would be "flashed" into an add-in
61 # card,) a System "Flash" image (that would be burned into a system's
62 # flash) or an Update ("Capsule") image that will be used to update and
63 # existing system flash.
64 #
65 ################################################################################
66 [FD.Vlv]
67 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
68 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
69 ErasePolarity = 1
70 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
71 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
72
73 #
74 #Flash location override based on actual flash map
75 #
76 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
77 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
78
79 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
80 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
81
82 !if $(MINNOW2_FSP_BUILD) == TRUE
83 # put below PCD value setting into dsc file
84 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
85 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
86 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
87 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
88 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
89 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
91
92 !endif
93 ################################################################################
94 #
95 # Following are lists of FD Region layout which correspond to the locations of different
96 # images within the flash device.
97 #
98 # Regions must be defined in ascending order and may not overlap.
99 #
100 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
101 # the pipe "|" character, followed by the size of the region, also in hex with the leading
102 # "0x" characters. Like:
103 # Offset|Size
104 # PcdOffsetCName|PcdSizeCName
105 # RegionType <FV, DATA, or FILE>
106 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
107 #
108 ################################################################################
109 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
110 # so we hardcode the default value of variable here.
111 # Please note that we MUST update the binary once the default value is changed.
112
113 #
114 # CPU Microcodes
115 #
116
117 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
118 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
119 FV = MICROCODE_FV
120 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
121 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
122 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
123
124 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
125 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
126 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
127
128 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
129 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
130 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
131
132 !if $(MINNOW2_FSP_BUILD) == TRUE
133
134 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
135 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
136 FILE = Vlv2SocBinPkg/FspBinary/FvFsp.bin
137
138
139 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
140 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
141
142 !endif
143
144 #
145 # Main Block
146 #
147 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
148 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
149 FV = FVMAIN_COMPACT
150
151 #
152 # FV Recovery#2
153 #
154 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
155 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
156 FV = FVRECOVERY2
157
158 #
159 # FV Recovery
160 #
161 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
162 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
163 FV = FVRECOVERY
164
165 ################################################################################
166 #
167 # FV Section
168 #
169 # [FV] section is used to define what components or modules are placed within a flash
170 # device file. This section also defines order the components and modules are positioned
171 # within the image. The [FV] section consists of define statements, set statements and
172 # module statements.
173 #
174 ################################################################################
175 [FV.MICROCODE_FV]
176 BlockSize = $(FLASH_BLOCK_SIZE)
177 FvAlignment = 16
178 ERASE_POLARITY = 1
179 MEMORY_MAPPED = TRUE
180 STICKY_WRITE = TRUE
181 LOCK_CAP = TRUE
182 LOCK_STATUS = FALSE
183 WRITE_DISABLED_CAP = TRUE
184 WRITE_ENABLED_CAP = TRUE
185 WRITE_STATUS = TRUE
186 WRITE_LOCK_CAP = TRUE
187 WRITE_LOCK_STATUS = TRUE
188 READ_DISABLED_CAP = TRUE
189 READ_ENABLED_CAP = TRUE
190 READ_STATUS = TRUE
191 READ_LOCK_CAP = TRUE
192 READ_LOCK_STATUS = TRUE
193
194 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
195 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
196 }
197
198 !if $(RECOVERY_ENABLE)
199 [FV.FVRECOVERY_COMPONENTS]
200 FvAlignment = 16 #FV alignment and FV attributes setting.
201 ERASE_POLARITY = 1
202 MEMORY_MAPPED = TRUE
203 STICKY_WRITE = TRUE
204 LOCK_CAP = TRUE
205 LOCK_STATUS = TRUE
206 WRITE_DISABLED_CAP = TRUE
207 WRITE_ENABLED_CAP = TRUE
208 WRITE_STATUS = TRUE
209 WRITE_LOCK_CAP = TRUE
210 WRITE_LOCK_STATUS = TRUE
211 READ_DISABLED_CAP = TRUE
212 READ_ENABLED_CAP = TRUE
213 READ_STATUS = TRUE
214 READ_LOCK_CAP = TRUE
215 READ_LOCK_STATUS = TRUE
216
217 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
218 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
219 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
220 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
221 INF FatPkg/FatPei/FatPei.inf
222 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
223 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
224 !endif
225
226 ################################################################################
227 #
228 # FV Section
229 #
230 # [FV] section is used to define what components or modules are placed within a flash
231 # device file. This section also defines order the components and modules are positioned
232 # within the image. The [FV] section consists of define statements, set statements and
233 # module statements.
234 #
235 ################################################################################
236 [FV.FVRECOVERY2]
237 BlockSize = $(FLASH_BLOCK_SIZE)
238 FvAlignment = 16 #FV alignment and FV attributes setting.
239 ERASE_POLARITY = 1
240 MEMORY_MAPPED = TRUE
241 STICKY_WRITE = TRUE
242 LOCK_CAP = TRUE
243 LOCK_STATUS = TRUE
244 WRITE_DISABLED_CAP = TRUE
245 WRITE_ENABLED_CAP = TRUE
246 WRITE_STATUS = TRUE
247 WRITE_LOCK_CAP = TRUE
248 WRITE_LOCK_STATUS = TRUE
249 READ_DISABLED_CAP = TRUE
250 READ_ENABLED_CAP = TRUE
251 READ_STATUS = TRUE
252 READ_LOCK_CAP = TRUE
253 READ_LOCK_STATUS = TRUE
254 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
255
256
257
258 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
259
260 !if $(MINNOW2_FSP_BUILD) == FALSE
261 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
262 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
263 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
264 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
265 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
266 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
267 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
268 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
269 !endif
270
271 # INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
272 !if $(TPM_ENABLED) == TRUE
273 INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
274 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
275 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
276 !endif
277 !if $(FTPM_ENABLE) == TRUE
278 INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
279 !endif
280 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
281
282 !if $(ACPI50_ENABLE) == TRUE
283 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
284 !endif
285 !if $(PERFORMANCE_ENABLE) == TRUE
286 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
287 !endif
288
289 !if $(RECOVERY_ENABLE)
290 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
291 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
292 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
293 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
294 }
295 }
296 !endif
297
298 [FV.FVRECOVERY]
299 BlockSize = $(FLASH_BLOCK_SIZE)
300 FvAlignment = 16 #FV alignment and FV attributes setting.
301 ERASE_POLARITY = 1
302 MEMORY_MAPPED = TRUE
303 STICKY_WRITE = TRUE
304 LOCK_CAP = TRUE
305 LOCK_STATUS = TRUE
306 WRITE_DISABLED_CAP = TRUE
307 WRITE_ENABLED_CAP = TRUE
308 WRITE_STATUS = TRUE
309 WRITE_LOCK_CAP = TRUE
310 WRITE_LOCK_STATUS = TRUE
311 READ_DISABLED_CAP = TRUE
312 READ_ENABLED_CAP = TRUE
313 READ_STATUS = TRUE
314 READ_LOCK_CAP = TRUE
315 READ_LOCK_STATUS = TRUE
316 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
317
318
319 !if $(MINNOW2_FSP_BUILD) == TRUE
320 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
321 !else
322 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
323 !endif
324
325 INF MdeModulePkg/Core/Pei/PeiMain.inf
326 !if $(MINNOW2_FSP_BUILD) == TRUE
327 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
328 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
329 !endif
330 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
331 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
332 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
333
334 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
335
336 !if $(MINNOW2_FSP_BUILD) == FALSE
337 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
338 !endif
339
340 !if $(FTPM_ENABLE) == TRUE
341 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
342 !endif
343
344 !if $(SOURCE_DEBUG_ENABLE) == TRUE
345 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
346 !endif
347
348
349 !if $(CAPSULE_ENABLE) == TRUE
350 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
351 !if $(DXE_ARCHITECTURE) == "X64"
352 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
353 !endif
354 !endif
355
356 !if $(MINNOW2_FSP_BUILD) == FALSE
357 !if $(PCIESC_ENABLE) == TRUE
358 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
359 !endif
360 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
361 !endif
362
363 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
364
365 [FV.FVMAIN]
366 BlockSize = $(FLASH_BLOCK_SIZE)
367 FvAlignment = 16
368 ERASE_POLARITY = 1
369 MEMORY_MAPPED = TRUE
370 STICKY_WRITE = TRUE
371 LOCK_CAP = TRUE
372 LOCK_STATUS = TRUE
373 WRITE_DISABLED_CAP = TRUE
374 WRITE_ENABLED_CAP = TRUE
375 WRITE_STATUS = TRUE
376 WRITE_LOCK_CAP = TRUE
377 WRITE_LOCK_STATUS = TRUE
378 READ_DISABLED_CAP = TRUE
379 READ_ENABLED_CAP = TRUE
380 READ_STATUS = TRUE
381 READ_LOCK_CAP = TRUE
382 READ_LOCK_STATUS = TRUE
383 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
384
385 APRIORI DXE {
386 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
387 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
388 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
389 }
390
391 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
392 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
393 }
394
395 #
396 # EDK II Related Platform codes
397 #
398
399 !if $(MINNOW2_FSP_BUILD) == TRUE
400 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
401 !endif
402
403 INF MdeModulePkg/Core/Dxe/DxeMain.inf
404 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
405 !if $(ACPI50_ENABLE) == TRUE
406 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
407 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
408 !endif
409
410
411 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
412 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
413 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
414 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
415 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
416 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
417 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
418 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
419 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
420 !if $(ARCH) == IA32
421 INF USE=IA32 MdeModulePkg/Logo/Logo.inf
422 !else
423 INF USE=X64 MdeModulePkg/Logo/Logo.inf
424 !endif
425 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
426 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
427 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
428 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
429
430 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
431 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
432 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
433 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
434 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
435 !if $(SECURE_BOOT_ENABLE)
436 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
437 !endif
438
439 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
440
441 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
442 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
443 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
444 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
445
446
447 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
448
449 !if $(DATAHUB_ENABLE) == TRUE
450 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
451 !endif
452 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
453 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
454
455 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
456
457 #
458 # EDK II Related Silicon codes
459 #
460 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
461
462 !if $(USE_HPET_TIMER) == TRUE
463 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
464 !else
465 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
466 !endif
467 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
468
469 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
470
471 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
472 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
473
474 !if $(MINNOW2_FSP_BUILD) == FALSE
475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
476 !endif
477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
478 !if $(PCIESC_ENABLE) == TRUE
479 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
480 !endif
481
482 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
483 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
484 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
486 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
487 !if $(MINNOW2_FSP_BUILD) == FALSE
488 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
489 !else
490 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
491 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
492 !endif
493 !if $(MINNOW2_FSP_BUILD) == FALSE
494 !if $(SEC_ENABLE) == TRUE
495 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
496 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
497 !endif
498 !endif
499 !if $(TPM_ENABLED) == TRUE
500 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
501 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
502 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
503 !endif
504 !if $(FTPM_ENABLE) == TRUE
505 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
506 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
507 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
508 INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
509 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
510 !endif
511
512 #
513 # EDK II Related Platform codes
514 #
515 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
516 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
517 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
518 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
519 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
520 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
521 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
522 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
523 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
524 !if $(GOP_DRIVER_ENABLE) == TRUE
525 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
526 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
527 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
528 SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
529 SECTION UI = "IntelGopDriver"
530 }
531 !endif
532
533 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
534 #
535 # SMM
536 #
537 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
538 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
539 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
540
541 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
542 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
543 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
544 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
545
546 #
547 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
548 #
549 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
550 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
551
552 #
553 # ACPI
554 #
555 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
556 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
557 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
558 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
559
560 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
561
562 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
563
564 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
565
566 #
567 # PCI
568 #
569 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
570
571 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
572
573
574 #
575 # ISA
576 #
577 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
578 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
579 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
580 !if $(SOURCE_DEBUG_ENABLE) != TRUE
581 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
582 !endif
583 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
584 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
585
586 #
587 # SDIO
588 #
589 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
590 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
591 #
592 # IDE/SCSI/AHCI
593 #
594 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
595
596 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
597
598 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
599 !if $(SATA_ENABLE) == TRUE
600 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
601 #
602
603 #
604 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
605 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
606 !if $(SCSI_ENABLE) == TRUE
607 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
608 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
609 !endif
610 #
611 !endif
612 # Console
613 #
614 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
615 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
616 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
617 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
618 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
619 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
620 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
621 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
622 #
623 # USB
624 #
625 !if $(USB_ENABLE) == TRUE
626 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
627 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
628 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
629 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
630 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
631 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
632 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
633 !endif
634
635 #
636 # SMBIOS
637 #
638 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
639 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
640
641 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
642
643
644 #
645 # FAT file system
646 #
647 INF FatPkg/EnhancedFatDxe/Fat.inf
648
649 #
650 # UEFI Shell
651 #
652 INF ShellPkg/Application/Shell/Shell.inf
653
654 #
655 # dp command
656 #
657 !if $(PERFORMANCE_ENABLE) == TRUE
658 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
659 !endif
660
661 !if $(GOP_DRIVER_ENABLE) == TRUE
662 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
663 SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
664 SECTION UI = "IntelGopVbt"
665 }
666 !endif
667
668 #
669 # Network Modules
670 #
671 !if $(NETWORK_ENABLE) == TRUE
672 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
673 SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
674 SECTION UI = "UNDI"
675 }
676 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
677 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
678 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
679 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
680 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
681 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
682 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
683 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
684 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
685 INF NetworkPkg/TcpDxe/TcpDxe.inf
686 !if $(NETWORK_IP6_ENABLE) == TRUE
687 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
688 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
689 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
690 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
691 !endif
692 !if $(NETWORK_VLAN_ENABLE) == TRUE
693 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
694 !endif
695 !if $(NETWORK_ISCSI_ENABLE) == TRUE
696 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
697 !endif
698 !endif
699
700 !if $(CAPSULE_ENABLE)
701 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
702
703 #
704 # Minnow Max System Firmware FMP
705 #
706 INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
707
708 #
709 # Sample Device FMP
710 #
711 INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
712 INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
713 INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
714
715 !endif
716
717 !if $(MICOCODE_CAPSULE_ENABLE)
718 INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
719 !endif
720
721 !if $(RECOVERY_ENABLE)
722 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
723 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
724 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
725 }
726 !endif
727
728 [FV.FVMAIN_COMPACT]
729 BlockSize = $(FLASH_BLOCK_SIZE)
730 FvAlignment = 16
731 ERASE_POLARITY = 1
732 MEMORY_MAPPED = TRUE
733 STICKY_WRITE = TRUE
734 LOCK_CAP = TRUE
735 LOCK_STATUS = TRUE
736 WRITE_DISABLED_CAP = TRUE
737 WRITE_ENABLED_CAP = TRUE
738 WRITE_STATUS = TRUE
739 WRITE_LOCK_CAP = TRUE
740 WRITE_LOCK_STATUS = TRUE
741 READ_DISABLED_CAP = TRUE
742 READ_ENABLED_CAP = TRUE
743 READ_STATUS = TRUE
744 READ_LOCK_CAP = TRUE
745 READ_LOCK_STATUS = TRUE
746
747
748
749 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
750 !if $(LZMA_ENABLE) == TRUE
751 # LZMA Compress
752 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
753 SECTION FV_IMAGE = FVMAIN
754 }
755 !else
756 !if $(DXE_COMPRESS_ENABLE) == TRUE
757 # Tiano Compress
758 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
759 SECTION FV_IMAGE = FVMAIN
760 }
761 !else
762 # No Compress
763 SECTION COMPRESS PI_NONE {
764 SECTION FV_IMAGE = FVMAIN
765 }
766 !endif
767 !endif
768 }
769
770 [FV.SETUP_DATA]
771 BlockSize = $(FLASH_BLOCK_SIZE)
772 #NumBlocks = 0x10
773 FvAlignment = 16
774 ERASE_POLARITY = 1
775 MEMORY_MAPPED = TRUE
776 STICKY_WRITE = TRUE
777 LOCK_CAP = TRUE
778 LOCK_STATUS = TRUE
779 WRITE_DISABLED_CAP = TRUE
780 WRITE_ENABLED_CAP = TRUE
781 WRITE_STATUS = TRUE
782 WRITE_LOCK_CAP = TRUE
783 WRITE_LOCK_STATUS = TRUE
784 READ_DISABLED_CAP = TRUE
785 READ_ENABLED_CAP = TRUE
786 READ_STATUS = TRUE
787 READ_LOCK_CAP = TRUE
788 READ_LOCK_STATUS = TRUE
789
790 ################################################################################
791 #
792 # Rules are use with the [FV] section's module INF type to define
793 # how an FFS file is created for a given INF file. The following Rule are the default
794 # rules for the different module type. User can add the customized rules to define the
795 # content of the FFS file.
796 #
797 ################################################################################
798 [Rule.Common.SEC]
799 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
800 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
801 RAW BIN Align = 16 |.com
802 }
803
804 [Rule.Common.SEC.BINARY]
805 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
806 PE32 PE32 Align = 8 |.efi
807 !if $(MINNOW2_FSP_BUILD) == TRUE
808 RAW RAW |.raw
809 !else
810 RAW BIN Align = 16 |.com
811 !endif
812 }
813
814 [Rule.Common.PEI_CORE]
815 FILE PEI_CORE = $(NAMED_GUID) {
816 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
817 UI STRING="$(MODULE_NAME)" Optional
818 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
819 }
820
821 [Rule.Common.PEIM]
822 FILE PEIM = $(NAMED_GUID) {
823 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
824 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
825 UI STRING="$(MODULE_NAME)" Optional
826 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
827 }
828
829 [Rule.Common.PEIM.BINARY]
830 FILE PEIM = $(NAMED_GUID) {
831 PEI_DEPEX PEI_DEPEX Optional |.depex
832 PE32 PE32 Align = Auto |.efi
833 UI STRING="$(MODULE_NAME)" Optional
834 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
835 }
836
837 [Rule.Common.PEIM.BIOSID]
838 FILE PEIM = $(NAMED_GUID) {
839 RAW BIN BiosId.bin
840 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
841 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
842 UI STRING="$(MODULE_NAME)" Optional
843 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
844 }
845
846 [Rule.Common.USER_DEFINED.APINIT]
847 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
848 RAW SEC_BIN |.com
849 }
850 #cjia 2011-07-21
851 [Rule.Common.USER_DEFINED.LEGACY16]
852 FILE FREEFORM = $(NAMED_GUID) {
853 UI STRING="$(MODULE_NAME)" Optional
854 RAW BIN |.bin
855 }
856 #cjia
857
858 [Rule.Common.USER_DEFINED.ASM16]
859 FILE FREEFORM = $(NAMED_GUID) {
860 UI STRING="$(MODULE_NAME)" Optional
861 RAW BIN |.com
862 }
863
864 [Rule.Common.DXE_CORE]
865 FILE DXE_CORE = $(NAMED_GUID) {
866 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
867 UI STRING="$(MODULE_NAME)" Optional
868 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
869 }
870
871 [Rule.Common.UEFI_DRIVER]
872 FILE DRIVER = $(NAMED_GUID) {
873 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
874 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
875 UI STRING="$(MODULE_NAME)" Optional
876 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
877 }
878
879 [Rule.Common.UEFI_DRIVER.BINARY]
880 FILE DRIVER = $(NAMED_GUID) {
881 DXE_DEPEX DXE_DEPEX Optional |.depex
882 PE32 PE32 |.efi
883 UI STRING="$(MODULE_NAME)" Optional
884 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
885 }
886
887 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
888 FILE DRIVER = $(NAMED_GUID) {
889 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
890 PE32 PE32 |.efi
891 UI STRING="$(MODULE_NAME)" Optional
892 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
893 }
894
895 [Rule.Common.DXE_DRIVER]
896 FILE DRIVER = $(NAMED_GUID) {
897 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
898 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
899 UI STRING="$(MODULE_NAME)" Optional
900 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
901 }
902
903 [Rule.Common.DXE_DRIVER.BINARY]
904 FILE DRIVER = $(NAMED_GUID) {
905 DXE_DEPEX DXE_DEPEX Optional |.depex
906 PE32 PE32 |.efi
907 UI STRING="$(MODULE_NAME)" Optional
908 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
909 }
910
911 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
912 FILE DRIVER = $(NAMED_GUID) {
913 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
914 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
915 UI STRING="$(MODULE_NAME)" Optional
916 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
917 RAW ACPI Optional |.acpi
918 RAW ASL Optional |.aml
919 }
920
921 [Rule.Common.DXE_RUNTIME_DRIVER]
922 FILE DRIVER = $(NAMED_GUID) {
923 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
924 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
925 UI STRING="$(MODULE_NAME)" Optional
926 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
927 }
928
929 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
930 FILE DRIVER = $(NAMED_GUID) {
931 DXE_DEPEX DXE_DEPEX Optional |.depex
932 PE32 PE32 |.efi
933 UI STRING="$(MODULE_NAME)" Optional
934 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
935 }
936
937 [Rule.Common.DXE_SMM_DRIVER]
938 FILE SMM = $(NAMED_GUID) {
939 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
940 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
941 UI STRING="$(MODULE_NAME)" Optional
942 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
943 }
944
945 [Rule.Common.DXE_SMM_DRIVER.BINARY]
946 FILE SMM = $(NAMED_GUID) {
947 SMM_DEPEX SMM_DEPEX |.depex
948 PE32 PE32 |.efi
949 RAW BIN Optional |.aml
950 UI STRING="$(MODULE_NAME)" Optional
951 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
952 }
953
954 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
955 FILE SMM = $(NAMED_GUID) {
956 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
957 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
958 UI STRING="$(MODULE_NAME)" Optional
959 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
960 RAW ACPI Optional |.acpi
961 RAW ASL Optional |.aml
962 }
963
964 [Rule.Common.SMM_CORE]
965 FILE SMM_CORE = $(NAMED_GUID) {
966 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
967 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
968 UI STRING="$(MODULE_NAME)" Optional
969 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
970 }
971
972 [Rule.Common.SMM_CORE.BINARY]
973 FILE SMM_CORE = $(NAMED_GUID) {
974 DXE_DEPEX DXE_DEPEX Optional |.depex
975 PE32 PE32 |.efi
976 UI STRING="$(MODULE_NAME)" Optional
977 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
978 }
979
980 [Rule.Common.UEFI_APPLICATION]
981 FILE APPLICATION = $(NAMED_GUID) {
982 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
983 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
984 UI STRING="$(MODULE_NAME)" Optional
985 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
986 }
987
988 [Rule.Common.UEFI_APPLICATION.UI]
989 FILE APPLICATION = $(NAMED_GUID) {
990 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
991 UI STRING="Enter Setup"
992 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
993 }
994
995 [Rule.Common.USER_DEFINED]
996 FILE FREEFORM = $(NAMED_GUID) {
997 UI STRING="$(MODULE_NAME)" Optional
998 RAW BIN |.bin
999 }
1000
1001 [Rule.Common.USER_DEFINED.BINARY]
1002 FILE FREEFORM = $(NAMED_GUID) {
1003 UI STRING="$(MODULE_NAME)" Optional
1004 RAW BIN |.bin
1005 }
1006
1007 [Rule.Common.USER_DEFINED.ACPITABLE]
1008 FILE FREEFORM = $(NAMED_GUID) {
1009 RAW ACPI Optional |.acpi
1010 RAW ASL Optional |.aml
1011 }
1012
1013 [Rule.Common.USER_DEFINED.ACPITABLE2]
1014 FILE FREEFORM = $(NAMED_GUID) {
1015 RAW ASL Optional |.aml
1016 }
1017
1018 [Rule.Common.ACPITABLE]
1019 FILE FREEFORM = $(NAMED_GUID) {
1020 RAW ACPI Optional |.acpi
1021 RAW ASL Optional |.aml
1022 }
1023
1024 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1025 FILE PEIM = $(NAMED_GUID) {
1026 RAW BIN |.acpi
1027 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1028 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1029 UI STRING="$(MODULE_NAME)" Optional
1030 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1031 }