ARM Packages: Removed trailing spaces

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / ArmV4 / ExceptionSupport.asm

diff --git a/ArmPkg/Drivers/CpuDxe/ArmV4/ExceptionSupport.asm b/ArmPkg/Drivers/CpuDxe/ArmV4/ExceptionSupport.asm
index 2ea8d65f156b2942b808d050438e28920c3fe868..9f09a0bc76777c0921d7567a81ee23c66beec271 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/ArmV4/ExceptionSupport.asm
+++ b/ArmPkg/Drivers/CpuDxe/ArmV4/ExceptionSupport.asm
@@ -1,4 +1,4 @@
-//------------------------------------------------------------------------------ \r
+//------------------------------------------------------------------------------\r
 //\r
 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 //\r
@@ -20,7 +20,7 @@
 \r
   PRESERVE8\r
   AREA  DxeExceptionHandlers, CODE, READONLY\r
-  \r
+\r
 ExceptionHandlersStart\r
 \r
 Reset\r
@@ -107,35 +107,35 @@ ExceptionHandlersEnd
 AsmCommonExceptionEntry\r
   mrc       p15, 0, r1, c6, c0, 2   ; Read IFAR\r
   stmfd     SP!,{R1}                ; Store the IFAR\r
-  \r
+\r
   mrc       p15, 0, r1, c5, c0, 1   ; Read IFSR\r
   stmfd     SP!,{R1}                ; Store the IFSR\r
-  \r
+\r
   mrc       p15, 0, r1, c6, c0, 0   ; Read DFAR\r
   stmfd     SP!,{R1}                ; Store the DFAR\r
-  \r
+\r
   mrc       p15, 0, r1, c5, c0, 0   ; Read DFSR\r
   stmfd     SP!,{R1}                ; Store the DFSR\r
-  \r
+\r
   mrs       R1,SPSR                 ; Read SPSR (which is the pre-exception CPSR)\r
   stmfd     SP!,{R1}                ; Store the SPSR\r
-  \r
+\r
   stmfd     SP!,{LR}                ; Store the link register (which is the pre-exception PC)\r
   stmfd     SP,{SP,LR}^             ; Store user/system mode stack pointer and link register\r
   nop                               ; Required by ARM architecture\r
   SUB       SP,SP,#0x08             ; Adjust stack pointer\r
   stmfd     SP!,{R2-R12}            ; Store general purpose registers\r
-  \r
+\r
   ldr       R3,[SP,#0x50]           ; Read saved R1 from the stack (it was saved by the exception entry routine)\r
   ldr       R2,[SP,#0x4C]           ; Read saved R0 from the stack (it was saved by the exception entry routine)\r
   stmfd     SP!,{R2-R3}             ; Store general purpose registers R0 and R1\r
-  \r
+\r
   mov       R1,SP                   ; Prepare System Context pointer as an argument for the exception handler\r
-  \r
+\r
   sub       SP,SP,#4                ; Adjust SP to preserve 8-byte alignment\r
   blx       CommonCExceptionHandler ; Call exception handler\r
   add       SP,SP,#4                ; Adjust SP back to where we were\r
-  \r
+\r
   ldr       R2,[SP,#0x40]           ; Load CPSR from context, in case it has changed\r
   MSR       SPSR_cxsf,R2            ; Store it back to the SPSR to be restored when exiting this handler\r
 \r
@@ -146,7 +146,7 @@ AsmCommonExceptionEntry
   ldmfd     SP!,{LR}                ; Restore the link register (which is the pre-exception PC)\r
   add       SP,SP,#0x1C             ; Clear out the remaining stack space\r
   movs      PC,LR                   ; Return from exception\r
-  \r
+\r
   END\r
 \r
 \r