ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits...

[mirror_edk2.git] / ArmPkg / Drivers / PL390Gic / PL390GicSec.c

diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 4f10e4e5129ded2c4aad6bf40be238404e15e476..12f9e3e3fcacdcc12659173a5a59a88a735bafa8 100644 (file)
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
 *  \r
 *  This program and the accompanying materials                          \r
 *  are licensed and made available under the terms and conditions of the BSD License         \r
@@ -13,6 +13,7 @@
 **/\r
 \r
 #include <Base.h>\r
+#include <Library/ArmLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/ArmGicLib.h>\r
@@ -24,6 +25,7 @@
 VOID\r
 EFIAPI\r
 ArmGicSetupNonSecure (\r
+  IN  UINTN         MpId,\r
   IN  INTN          GicDistributorBase,\r
   IN  INTN          GicInterruptInterfaceBase\r
   )\r
@@ -47,9 +49,15 @@ ArmGicSetupNonSecure (
     MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);\r
   }\r
 \r
-  // Ensure all GIC interrupts are Non-Secure\r
-  for (Index = 0; Index < (PcdGet32(PcdGicNumInterrupts) / 32); Index++) {\r
-    MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);\r
+  // Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).\r
+  if (IS_PRIMARY_CORE(MpId)) {\r
+    // Ensure all GIC interrupts are Non-Secure\r
+    for (Index = 0; Index < (PcdGet32(PcdGicNumInterrupts) / 32); Index++) {\r
+      MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);\r
+    }\r
+  } else {\r
+    // The secondary cores only set the Non Secure bit to their banked PPIs\r
+    MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff);\r
   }\r
 \r
   // Ensure all interrupts can get through the priority mask\r