.long (_Data) ; \\r
1:\r
\r
-// Convert the (ClusterId,CoreId) into a Core Position\r
-// We assume there are 4 cores per cluster\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \\r
- lsr Pos, MpId, #6 ; \\r
- and Tmp, MpId, #3 ; \\r
- add Pos, Pos, Tmp\r
-\r
// Reserve a region at the top of the Primary Core stack\r
// for Global variables for the XIP phase\r
#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r
ldr r1, =Address ; \\r
ldr r0, =Data ; \\r
str r0, [r1]\r
- \r
+\r
#define MmioOr32(Address, OrData) \\r
ldr r1, =Address ; \\r
ldr r2, =OrData ; \\r
and r0, r0, r2 ; \\r
ldr r2, =OrData ; \\r
orr r0, r0, r2 ; \\r
- str r0, [r1] \r
+ str r0, [r1]\r
\r
#define MmioWriteFromReg32(Address, Reg) \\r
ldr r1, =Address ; \\r
\r
#define LoadConstantToReg(Data, Reg) \\r
ldr Reg, =Data\r
- \r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \\r
- lsr Pos, MpId, #6 ; \\r
- and Tmp, MpId, #3 ; \\r
- add Pos, Pos, Tmp\r
\r
#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r
and Tmp, GlobalSize, #7 ; \\r
#else\r
\r
//\r
-// Use ARM assembly macros, form armasam \r
+// Use ARM assembly macros, form armasam\r
//\r
// Less magic in the macros if ldr reg, =expr works\r
//\r
\r
// returns Data in R0 and Address in R1, and OrData in r2\r
#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData\r
- \r
+\r
\r
// returns _Data in R0 and _Address in R1, and _OrData in r2\r
\r
// conditional load testing eq flag\r
#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg\r
\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) GetCorePositionFromMpId Pos, MpId, Tmp\r
-\r
#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp\r
\r
// Initialize the Global Variable with '0'\r