ArmPkg: Renamed library 'PL390GicLib' into 'ArmGicLib'

[mirror_edk2.git] / ArmPkg / Include / Drivers / PL390Gic.h

diff --git a/ArmPkg/Include/Drivers/PL390Gic.h b/ArmPkg/Include/Drivers/PL390Gic.h
deleted file mode 100644 (file)
index 823e6c0..0000000
--- a/ArmPkg/Include/Drivers/PL390Gic.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/** @file\r
-*\r
-*  Copyright (c) 2011, ARM Limited. All rights reserved.\r
-*  \r
-*  This program and the accompanying materials                          \r
-*  are licensed and made available under the terms and conditions of the BSD License         \r
-*  which accompanies this distribution.  The full text of the license may be found at        \r
-*  http://opensource.org/licenses/bsd-license.php                                            \r
-*\r
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
-*\r
-**/\r
-\r
-#ifndef __PL390GIC_H\r
-#define __PL390GIC_H\r
-\r
-//\r
-// GIC definitions\r
-//\r
-\r
-// Distributor\r
-#define GIC_ICDDCR          0x000 // Distributor Control Register\r
-#define GIC_ICDICTR         0x004 // Interrupt Controller Type Register\r
-#define GIC_ICDIIDR         0x008 // Implementer Identification Register\r
-\r
-// each reg base below repeats for VE_NUM_GIC_REG_PER_INT_BITS (see GIC spec)\r
-#define GIC_ICDISR          0x080 // Interrupt Security Registers\r
-#define GIC_ICDISER         0x100 // Interrupt Set-Enable Registers\r
-#define GIC_ICDICER         0x180 // Interrupt Clear-Enable Registers\r
-#define GIC_ICDSPR          0x200 // Interrupt Set-Pending Registers\r
-#define GIC_ICDICPR         0x280 // Interrupt Clear-Pending Registers\r
-#define GIC_ICDABR          0x300 // Active Bit Registers\r
-\r
-// each reg base below repeats for VE_NUM_GIC_REG_PER_INT_BYTES\r
-#define GIC_ICDIPR          0x400 // Interrupt Priority Registers\r
-\r
-// each reg base below repeats for VE_NUM_GIC_INTERRUPTS\r
-#define GIC_ICDIPTR         0x800 // Interrupt Processor Target Registers\r
-#define GIC_ICDICFR         0xC00 // Interrupt Configuration Registers\r
-\r
-// just one of these\r
-#define GIC_ICDSGIR         0xF00 // Software Generated Interrupt Register\r
-\r
-// Cpu interface\r
-#define GIC_ICCICR          0x00  // CPU Interface Control Register\r
-#define GIC_ICCPMR          0x04  // Interrupt Priority Mask Register\r
-#define GIC_ICCBPR          0x08  // Binary Point Register\r
-#define GIC_ICCIAR          0x0C  // Interrupt Acknowledge Register\r
-#define GIC_ICCEIOR         0x10  // End Of Interrupt Register\r
-#define GIC_ICCRPR          0x14  // Running Priority Register\r
-#define GIC_ICCPIR          0x18  // Highest Pending Interrupt Register\r
-#define GIC_ICCABPR         0x1C  // Aliased Binary Point Register\r
-#define GIC_ICCIDR          0xFC  // Identification Register\r
-\r
-#define GIC_ICDSGIR_FILTER_TARGETLIST       0x0\r
-#define GIC_ICDSGIR_FILTER_EVERYONEELSE     0x1\r
-#define GIC_ICDSGIR_FILTER_ITSELF           0x2\r
-\r
-//Bit-masks to configure the CPU Interface Control register\r
-#define GIC_ICCICR_ENABLE_SECURE(a)       ((a << 0) & 0x01)\r
-#define GIC_ICCICR_ENABLE_NS(a)           ((a << 1) & 0x02)\r
-#define GIC_ICCICR_ACK_CTL(a)             ((a << 2) & 0x04)\r
-#define GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(a)((a << 3) & 0x08)\r
-#define GIC_ICCICR_USE_SBPR(a)            ((a << 4) & 0x10)\r
-\r
-\r
-//\r
-// GIC SEC interfaces\r
-//\r
-VOID\r
-EFIAPI\r
-PL390GicSetupNonSecure (\r
-  IN  INTN          GicDistributorBase,\r
-  IN  INTN          GicInterruptInterfaceBase\r
-  );\r
-\r
-VOID\r
-EFIAPI\r
-PL390GicEnableInterruptInterface (\r
-  IN  INTN          GicInterruptInterfaceBase\r
-  );\r
-\r
-VOID\r
-EFIAPI\r
-PL390GicEnableDistributor (\r
-  IN  INTN          GicDistributorBase\r
-  );\r
-\r
-VOID\r
-EFIAPI\r
-PL390GicSendSgiTo (\r
-  IN  INTN          GicDistributorBase,\r
-  IN  INTN          TargetListFilter,\r
-  IN  INTN          CPUTargetList\r
-  );\r
-\r
-UINT32\r
-EFIAPI\r
-PL390GicAcknowledgeSgiFrom (\r
-  IN  INTN          GicInterruptInterfaceBase,\r
-  IN  INTN          CoreId\r
-  );\r
-\r
-UINT32\r
-EFIAPI\r
-PL390GicAcknowledgeSgi2From (\r
-  IN  INTN          GicInterruptInterfaceBase,\r
-  IN  INTN          CoreId,\r
-  IN  INTN          SgiId\r
-  );\r
-\r
-UINTN\r
-EFIAPI\r
-PL390GicSetPriorityMask (\r
-  IN  INTN          GicInterruptInterfaceBase,\r
-  IN  INTN          PriorityMask\r
-  );\r
-\r
-#endif\r