ArmPkg: Add support for GICv4

[mirror_edk2.git] / ArmPkg / Include / Library / ArmGicLib.h

diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index 4b21ea9e4e76cb83c0c3421c1d9d88b456192687..5775905ca91baabca13de47b8b9f7ac507becd55 100644 (file)
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011-2017, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2018, ARM Limited. All rights reserved.\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
@@ -60,12 +60,28 @@
 \r
 \r
 // GIC Redistributor\r
-#define ARM_GICR_CTLR_FRAME_SIZE    SIZE_64KB\r
-#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB\r
+#define ARM_GICR_CTLR_FRAME_SIZE         SIZE_64KB\r
+#define ARM_GICR_SGI_PPI_FRAME_SIZE      SIZE_64KB\r
+#define ARM_GICR_SGI_VLPI_FRAME_SIZE     SIZE_64KB\r
+#define ARM_GICR_SGI_RESERVED_FRAME_SIZE SIZE_64KB\r
 \r
 // GIC Redistributor Control frame\r
 #define ARM_GICR_TYPER          0x0008  // Redistributor Type Register\r
 \r
+// GIC Redistributor TYPER bit assignments\r
+#define ARM_GICR_TYPER_PLPIS        (1 << 0)              // Physical LPIs\r
+#define ARM_GICR_TYPER_VLPIS        (1 << 1)              // Virtual LPIs\r
+#define ARM_GICR_TYPER_DIRECTLPI    (1 << 3)              // Direct LPIs\r
+#define ARM_GICR_TYPER_LAST         (1 << 4)              // Last Redistributor in series\r
+#define ARM_GICR_TYPER_DPGS         (1 << 5)              // Disable Processor Group\r
+                                                          // Selection Support\r
+#define ARM_GICR_TYPER_PROCNO       (0xFFFF << 8)         // Processor Number\r
+#define ARM_GICR_TYPER_COMMONLPIAFF (0x3 << 24)           // Common LPI Affinity\r
+#define ARM_GICR_TYPER_AFFINITY     (0xFFFFFFFFULL << 32) // Redistributor Affinity\r
+\r
+#define ARM_GICR_TYPER_GET_AFFINITY(TypeReg)  (((TypeReg) & \\r
+                                                ARM_GICR_TYPER_AFFINITY) >> 32)\r
+\r
 // GIC SGI & PPI Redistributor frame\r
 #define ARM_GICR_ISENABLER      0x0100  // Interrupt Set-Enable Registers\r
 #define ARM_GICR_ICENABLER      0x0180  // Interrupt Clear-Enable Registers\r