ArmPkg: Move cache defs used in Universal/Smbios into ArmCache.h

[mirror_edk2.git] / ArmPkg / Include / Library / ArmLib.h

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 8a364f2ca96fef41eaef1faa7ad55b49d2dc757f..79ea755777a9a6f2cb042794f552ed38d63f631a 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -2,14 +2,14 @@
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
   Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>\r
-  Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>\r
+  Copyright (c) 2020 - 2021, NUVIA Inc. All rights reserved.<BR>\r
 \r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
-#ifndef __ARM_LIB__\r
-#define __ARM_LIB__\r
+#ifndef ARM_LIB_H_\r
+#define ARM_LIB_H_\r
 \r
 #include <Uefi/UefiBaseType.h>\r
 \r
@@ -109,39 +109,59 @@ typedef enum {
 #define GET_MPID(ClusterId, CoreId)   (((ClusterId) << 8) | (CoreId))\r
 #define PRIMARY_CORE_ID       (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)\r
 \r
+/** Reads the CCSIDR register for the specified cache.\r
+\r
+  @param CSSELR The CSSELR cache selection register value.\r
+\r
+  @return The contents of the CCSIDR_EL1 register for the specified cache, when in AARCH64 mode.\r
+          Returns the contents of the CCSIDR register in AARCH32 mode.\r
+**/\r
 UINTN\r
-EFIAPI\r
-ArmDataCacheLineLength (\r
-  VOID\r
+ReadCCSIDR (\r
+  IN UINT32 CSSELR\r
   );\r
 \r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheLineLength (\r
+/** Reads the CCSIDR2 for the specified cache.\r
+\r
+  @param CSSELR The CSSELR cache selection register value\r
+\r
+  @return The contents of the CCSIDR2 register for the specified cache.\r
+**/\r
+UINT32\r
+ReadCCSIDR2 (\r
+  IN UINT32 CSSELR\r
+  );\r
+\r
+/** Reads the Cache Level ID (CLIDR) register.\r
+\r
+  @return The contents of the CLIDR_EL1 register.\r
+**/\r
+UINT32\r
+ReadCLIDR (\r
   VOID\r
   );\r
 \r
 UINTN\r
 EFIAPI\r
-ArmCacheWritebackGranule (\r
+ArmDataCacheLineLength (\r
   VOID\r
   );\r
 \r
 UINTN\r
 EFIAPI\r
-ArmIsArchTimerImplemented (\r
+ArmInstructionCacheLineLength (\r
   VOID\r
   );\r
 \r
 UINTN\r
 EFIAPI\r
-ArmReadIdPfr0 (\r
+ArmCacheWritebackGranule (\r
   VOID\r
   );\r
 \r
 UINTN\r
 EFIAPI\r
-ArmReadIdPfr1 (\r
+ArmIsArchTimerImplemented (\r
   VOID\r
   );\r
 \r
@@ -733,4 +753,32 @@ ArmHasGicSystemRegisters (
   VOID\r
   );\r
 \r
-#endif // __ARM_LIB__\r
+/** Checks if CCIDX is implemented.\r
+\r
+   @retval TRUE  CCIDX is implemented.\r
+   @retval FALSE CCIDX is not implemented.\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ArmHasCcidx (\r
+  VOID\r
+  );\r
+\r
+#ifdef MDE_CPU_ARM\r
+///\r
+/// AArch32-only ID Register Helper functions\r
+///\r
+/**\r
+  Check whether the CPU supports the Security extensions\r
+\r
+  @return   Whether the Security extensions are implemented\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ArmHasSecurityExtensions (\r
+  VOID\r
+  );\r
+#endif // MDE_CPU_ARM\r
+\r
+#endif // ARM_LIB_H_\r