ArmPkg/Library: Add ArmReadSctlr for AArch64

[mirror_edk2.git] / ArmPkg / Library / ArmLib / Common / AArch64 / ArmLibSupport.S

diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
index 28db98b417c32a815e4920914f489e1076fbcc60..c9f3bd1e8810e10fbd2f01a27130fdd683525816 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
@@ -1,7 +1,7 @@
 #------------------------------------------------------------------------------\r
 #\r
 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.\r
 #\r
 # This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
@@ -39,11 +39,12 @@ GCC_ASM_EXPORT (ArmCallWFE)
 GCC_ASM_EXPORT (ArmCallSEV)\r
 GCC_ASM_EXPORT (ArmReadCpuActlr)\r
 GCC_ASM_EXPORT (ArmWriteCpuActlr)\r
+GCC_ASM_EXPORT (ArmReadSctlr)\r
 \r
 #------------------------------------------------------------------------------\r
 \r
-.set DAIF_FIQ_BIT,   (1 << 0)\r
-.set DAIF_IRQ_BIT,   (1 << 1)\r
+.set DAIF_RD_FIQ_BIT,   (1 << 6)\r
+.set DAIF_RD_IRQ_BIT,   (1 << 7)\r
 \r
 ASM_PFX(ArmReadMidr):\r
   mrs     x0, midr_el1        // Read from Main ID Register (MIDR)\r
@@ -55,18 +56,14 @@ ASM_PFX(ArmCacheInfo):
 \r
 ASM_PFX(ArmGetInterruptState):\r
   mrs     x0, daif\r
-  tst     w0, #DAIF_IRQ_BIT   // Check if IRQ is enabled. Enabled if 0.\r
-  mov     w0, #0\r
-  mov     w1, #1\r
-  csel    w0, w1, w0, ne\r
+  tst     w0, #DAIF_RD_IRQ_BIT  // Check if IRQ is enabled. Enabled if 0 (Z=1)\r
+  cset    w0, eq                // if Z=1 return 1, else 0\r
   ret\r
 \r
 ASM_PFX(ArmGetFiqState):\r
   mrs     x0, daif\r
-  tst     w0, #DAIF_FIQ_BIT   // Check if FIQ is enabled. Enabled if 0.\r
-  mov     w0, #0\r
-  mov     w1, #1\r
-  csel    w0, w1, w0, ne\r
+  tst     w0, #DAIF_RD_FIQ_BIT  // Check if FIQ is enabled. Enabled if 0 (Z=1)\r
+  cset    w0, eq                // if Z=1 return 1, else 0\r
   ret\r
 \r
 ASM_PFX(ArmWriteCpacr):\r
@@ -184,6 +181,7 @@ ASM_PFX(ArmWriteCptr):
 \r
 ASM_PFX(ArmWriteScr):\r
   msr     scr_el3, x0            // Secure configuration register EL3\r
+  isb\r
   ret\r
 \r
 ASM_PFX(ArmWriteMVBar):\r
@@ -208,4 +206,13 @@ ASM_PFX(ArmWriteCpuActlr):
   isb\r
   ret\r
 \r
+ASM_PFX(ArmReadSctlr):\r
+  EL1_OR_EL2_OR_EL3(x1)\r
+1:mrs   x0, sctlr_el1\r
+  ret\r
+2:mrs   x0, sctlr_el2\r
+  ret\r
+3:mrs   x0, sctlr_el3\r
+4:ret\r
+\r
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r