ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressLibCTA15-A7 / CTA15-A7Mem.c

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
index d71e58ae892a110e30628bde6b6b9b962b303184..e633c893759c014d0539afbf158f126c71c89f52 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
@@ -59,20 +59,6 @@ ArmPlatformGetVirtualMemoryMap (
     CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
   }\r
 \r
-  // Detect if it is a 1GB or 2GB Test Chip\r
-  //   [16:19]: 0=1GB TC2, 1=2GB TC2\r
-  if (MmioRead32(ARM_VE_SYS_PROCID0_REG) & (0xF << 16)) {\r
-    DEBUG((EFI_D_ERROR,"Info: 2GB Test Chip 2 detected.\n"));\r
-    BuildResourceDescriptorHob (\r
-        EFI_RESOURCE_SYSTEM_MEMORY,\r
-        EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
-          EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
-          EFI_RESOURCE_ATTRIBUTE_TESTED,\r
-        PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize),\r
-        0x40000000\r
-    );\r
-  }\r
-\r
 #ifdef ARM_BIGLITTLE_TC2\r
   // Secure NOR0 Flash\r
   VirtualMemoryTable[Index].PhysicalBase    = ARM_VE_SEC_NOR0_BASE;\r
@@ -150,20 +136,40 @@ ArmPlatformGetVirtualMemoryMap (
 \r
 #ifndef ARM_BIGLITTLE_TC2\r
   // Workaround for SRAM bug in RTSM\r
-  if (PcdGet32 (PcdSystemMemoryBase) != 0x80000000) {\r
+  if (PcdGet64 (PcdSystemMemoryBase) != 0x80000000) {\r
     VirtualMemoryTable[++Index].PhysicalBase  = 0x80000000;\r
     VirtualMemoryTable[Index].VirtualBase     = 0x80000000;\r
-    VirtualMemoryTable[Index].Length          = PcdGet32 (PcdSystemMemoryBase) - 0x80000000;\r
+    VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemoryBase) - 0x80000000;\r
     VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
   }\r
 #endif\r
 \r
   // DDR\r
-  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdSystemMemoryBase);\r
-  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdSystemMemoryBase);\r
-  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdSystemMemorySize);\r
+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase);\r
+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase);\r
+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);\r
   VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
 \r
+  // Detect if it is a 1GB or 2GB Test Chip\r
+  //   [16:19]: 0=1GB TC2, 1=2GB TC2\r
+  if (MmioRead32(ARM_VE_SYS_PROCID0_REG) & (0xF << 16)) {\r
+    DEBUG((EFI_D_ERROR,"Info: 2GB Test Chip 2 detected.\n"));\r
+    BuildResourceDescriptorHob (\r
+        EFI_RESOURCE_SYSTEM_MEMORY,\r
+        EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+          EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
+          EFI_RESOURCE_ATTRIBUTE_TESTED,\r
+        PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize),\r
+        SIZE_1GB\r
+    );\r
+\r
+    // Map the additional 1GB into the MMU\r
+    VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);\r
+    VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);\r
+    VirtualMemoryTable[Index].Length          = SIZE_1GB;\r
+    VirtualMemoryTable[Index].Attributes      = CacheAttributes;\r
+  }\r
+\r
   // End of Table\r
   VirtualMemoryTable[++Index].PhysicalBase  = 0;\r
   VirtualMemoryTable[Index].VirtualBase     = 0;\r