ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup when...

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressSecLibCTA9x4 / CTA9x4Sec.c

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
index a671f130f21686c8b91313829b9ffb39981dfb0c..eff714cca99f8d3102836338156a2b0b6ad2730f 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 *  \r
 *  This program and the accompanying materials                          \r
 *  are licensed and made available under the terms and conditions of the BSD License         \r
@@ -17,12 +17,15 @@
 #include <Library/DebugLib.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/PcdLib.h>\r
+#include <Library/SerialPortLib.h>\r
 \r
 #include <Drivers/ArmTrustzone.h>\r
 #include <Drivers/PL310L2Cache.h>\r
 \r
 #include <ArmPlatform.h>\r
 \r
+#define SerialPrint(txt)  SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1)\r
+\r
 /**\r
   Initialize the Secure peripherals and memory regions\r
 \r
@@ -119,6 +122,22 @@ ArmPlatformSecInitialize (
   IN  UINTN                     MpId\r
   )\r
 {\r
+  UINT32 Value;\r
+\r
+  // If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe\r
+  // (waiting for the memory to be initialized) as the instruction is still in the remapped\r
+  // flash region at 0x0 to jump in the C-code which lives in the NOR1 at 0x44000000 before\r
+  // the region 0x0 is remapped as DRAM.\r
+  if (!FeaturePcdGet (PcdNorFlashRemapping)) {\r
+    if (!ArmPlatformIsPrimaryCore (MpId)) {\r
+      // Replaced ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)\r
+      ArmCallWFE ();\r
+    } else {\r
+      // Wake up the secondary core from ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)\r
+      ArmCallSEV ();\r
+    }\r
+  }\r
+\r
   // If it is not the primary core then there is nothing to do\r
   if (!ArmPlatformIsPrimaryCore (MpId)) {\r
     return RETURN_SUCCESS;\r
@@ -144,5 +163,14 @@ ArmPlatformSecInitialize (
     ArmPlatformInitializeSystemMemory ();\r
   }\r
 \r
+  // Memory Map remapping\r
+  if (FeaturePcdGet (PcdNorFlashRemapping)) {\r
+    SerialPrint ("Secure ROM at 0x0\n\r");\r
+  } else {\r
+    Value = MmioRead32 (ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1\r
+    // Remap the DRAM to 0x0\r
+    MmioWrite32 (ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);\r
+  }\r
+\r
   return RETURN_SUCCESS;\r
 }\r