ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup when...

If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe
(waiting for the memory to be initialized) as the instruction is still in the remapped
flash region at 0x0 to make them jumping into the C-code which lives in the NOR1 at 0x44000000 before
the region 0x0 is remapped as DRAM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14910 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
index b1beeaafe6b35ccf15d205bfe242e445c88ed6ca..febc6ddf9061ff7479fdd9b4c4e0b380b6d834bc 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
@@ -33,8 +33,6 @@
   MemoryAllocationLib\r
   PL341DmcLib\r
   PL301AxiLib\r
-  L2X0CacheLib\r
-  SerialPortLib\r
 \r
 [Sources.common]\r
   CTA9x4Helper.asm    | RVCT\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
index 55b611190ad820eb52471cf33d4fa60115a31144..60cb09ecccd43fb6a4c938159898c814f6263282 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 *  \r
 *  This program and the accompanying materials                          \r
 *  are licensed and made available under the terms and conditions of the BSD License         \r
@@ -16,7 +16,6 @@
 #include <Library/ArmPlatformLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
-#include <Library/SerialPortLib.h>\r
 \r
 #include <Drivers/PL341Dmc.h>\r
 #include <Drivers/PL301Axi.h>\r
@@ -26,8 +25,6 @@
 \r
 #include <ArmPlatform.h>\r
 \r
-#define SerialPrint(txt)  SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1);\r
-\r
 ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {\r
   {\r
     // Cluster 0, Core 0\r
@@ -163,19 +160,8 @@ ArmPlatformInitializeSystemMemory (
   VOID\r
   )\r
 {\r
-  UINT32 Value;\r
-\r
-  // Memory Map remapping\r
-  if (FeaturePcdGet(PcdNorFlashRemapping)) {\r
-    SerialPrint ("Secure ROM at 0x0\n\r");\r
-  } else {\r
-    Value = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1\r
-    // Remap the DRAM to 0x0\r
-    MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);\r
-  }\r
-\r
-  PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings);\r
-  PL301AxiInit(ARM_VE_FAXI_BASE);\r
+  PL341DmcInit (ARM_VE_DMC_BASE, &DDRTimings);\r
+  PL301AxiInit (ARM_VE_FAXI_BASE);\r
 }\r
 \r
 EFI_STATUS\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
index 5765a2f7a72ad3ce122d61615b352b8f2dab20cd..969a75644dd5ebb1eddf6dd39bcd61f900c5d0b9 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf
@@ -1,5 +1,5 @@
 #/* @file\r
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 #  \r
 #  This program and the accompanying materials                          \r
 #  are licensed and made available under the terms and conditions of the BSD License         \r
@@ -46,6 +46,7 @@
 \r
 [FeaturePcd]\r
   gArmPlatformTokenSpaceGuid.PcdStandalone\r
+  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping\r
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec\r
 \r
 [FixedPcd]\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
index a671f130f21686c8b91313829b9ffb39981dfb0c..eff714cca99f8d3102836338156a2b0b6ad2730f 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 *  \r
 *  This program and the accompanying materials                          \r
 *  are licensed and made available under the terms and conditions of the BSD License         \r
@@ -17,12 +17,15 @@
 #include <Library/DebugLib.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/PcdLib.h>\r
+#include <Library/SerialPortLib.h>\r
 \r
 #include <Drivers/ArmTrustzone.h>\r
 #include <Drivers/PL310L2Cache.h>\r
 \r
 #include <ArmPlatform.h>\r
 \r
+#define SerialPrint(txt)  SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1)\r
+\r
 /**\r
   Initialize the Secure peripherals and memory regions\r
 \r
@@ -119,6 +122,22 @@ ArmPlatformSecInitialize (
   IN  UINTN                     MpId\r
   )\r
 {\r
+  UINT32 Value;\r
+\r
+  // If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe\r
+  // (waiting for the memory to be initialized) as the instruction is still in the remapped\r
+  // flash region at 0x0 to jump in the C-code which lives in the NOR1 at 0x44000000 before\r
+  // the region 0x0 is remapped as DRAM.\r
+  if (!FeaturePcdGet (PcdNorFlashRemapping)) {\r
+    if (!ArmPlatformIsPrimaryCore (MpId)) {\r
+      // Replaced ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)\r
+      ArmCallWFE ();\r
+    } else {\r
+      // Wake up the secondary core from ArmCallWFE () in ArmPlatformPkg/Sec/SecEntryPoint.(S|asm)\r
+      ArmCallSEV ();\r
+    }\r
+  }\r
+\r
   // If it is not the primary core then there is nothing to do\r
   if (!ArmPlatformIsPrimaryCore (MpId)) {\r
     return RETURN_SUCCESS;\r
@@ -144,5 +163,14 @@ ArmPlatformSecInitialize (
     ArmPlatformInitializeSystemMemory ();\r
   }\r
 \r
+  // Memory Map remapping\r
+  if (FeaturePcdGet (PcdNorFlashRemapping)) {\r
+    SerialPrint ("Secure ROM at 0x0\n\r");\r
+  } else {\r
+    Value = MmioRead32 (ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1\r
+    // Remap the DRAM to 0x0\r
+    MmioWrite32 (ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);\r
+  }\r
+\r
   return RETURN_SUCCESS;\r
 }\r