ArmPkg: Renamed library 'PL390GicLib' into 'ArmGicLib'

[mirror_edk2.git] / ArmPlatformPkg / Library / DebugSecExtraActionLib / DebugSecExtraActionLib.c

diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index 469a545c0e9f21c44239fa1850208fb09e7a2970..b9812142ed6013b23a56545fafbd53783ff81255 100755 (executable)
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -14,12 +14,12 @@
 \r
 #include <PiPei.h>\r
 \r
+#include <Library/ArmGicLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
 #include <Library/PrintLib.h>\r
 #include <Library/SerialPortLib.h>\r
 #include <Chipset/ArmV7.h>
-#include <Drivers/PL390Gic.h>\r
 \r
 #define ARM_PRIMARY_CORE    0\r
 \r
@@ -38,7 +38,7 @@ NonSecureWaitForFirmware (
   ArmCallWFI();\r
 \r
   // Acknowledge the interrupt and send End of Interrupt signal.\r
-  PL390GicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), ARM_PRIMARY_CORE);\r
+  ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), ARM_PRIMARY_CORE);\r
 \r
   // Jump to secondary core entry point.\r
   secondary_start ();\r
@@ -87,7 +87,7 @@ ArmPlatformSecExtraAction (
   } else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {\r
     if (CoreId == ARM_PRIMARY_CORE) {\r
       // Signal the secondary cores they can jump to PEI phase\r
-      PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
+      ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
 \r
       // To enter into Non Secure state, we need to make a return from exception\r
       *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);\r