\r
#include "PrePi.h"\r
\r
-#include <Library/ArmMPCoreMailBoxLib.h>\r
-#include <Chipset/ArmV7.h>\r
-#include <Drivers/PL390Gic.h>\r
+#include <Library/ArmGicLib.h>\r
\r
VOID\r
PrimaryMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
+ IN UINTN StacksBase,\r
+ IN UINTN GlobalVariableBase,\r
IN UINT64 StartTimeStamp\r
)\r
{\r
- //Enable the GIC Distributor\r
- PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
+ // Enable the GIC Distributor\r
+ ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
\r
- // If ArmVe has not been built as Standalone then we need to wake up the secondary cores\r
- if (!FixedPcdGet32(PcdStandalone)) {\r
+ // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization\r
+ if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {\r
// Sending SGI to all the Secondary CPU interfaces\r
- PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
+ ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
}\r
\r
- PrePiMain (UefiMemoryBase, StackBase, StartTimeStamp);\r
+ PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);\r
\r
// We must never return\r
ASSERT(FALSE);\r
\r
VOID\r
SecondaryMain (\r
- IN UINTN CoreId\r
+ IN UINTN MpId\r
)\r
{\r
// Function pointer to Secondary Core entry point\r
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {\r
ArmCallWFI();\r
// Acknowledge the interrupt and send End of Interrupt signal.\r
- PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);\r
+ ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);\r
}\r
\r
secondary_start = (VOID (*)())secondary_entry_addr;\r