ARM Packages: Removed trailing spaces

[mirror_edk2.git] / ArmPlatformPkg / Sec / Arm / SecEntryPoint.asm

diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
index 42d2b0268fe1fe678760b2e7ba89542a9cce0b9d..a97041d021d0d7c1016a14fe709f8ea62fee5a11 100644 (file)
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
@@ -1,13 +1,13 @@
 //\r
-//  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-//  \r
-//  This program and the accompanying materials                          \r
-//  are licensed and made available under the terms and conditions of the BSD License         \r
-//  which accompanies this distribution.  The full text of the license may be found at        \r
-//  http://opensource.org/licenses/bsd-license.php                                            \r
+//  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
 //\r
-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+//  This program and the accompanying materials\r
+//  are licensed and made available under the terms and conditions of the BSD License\r
+//  which accompanies this distribution.  The full text of the license may be found at\r
+//  http://opensource.org/licenses/bsd-license.php\r
+//\r
+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 //\r
 //\r
 \r
@@ -16,8 +16,10 @@
 #include "SecInternal.h"\r
 \r
   INCLUDE AsmMacroIoLib.inc\r
-  \r
+\r
   IMPORT  CEntryPoint\r
+  IMPORT  ArmPlatformIsPrimaryCore\r
+  IMPORT  ArmPlatformGetCorePosition\r
   IMPORT  ArmPlatformSecBootAction\r
   IMPORT  ArmPlatformSecBootMemoryInit\r
   IMPORT  ArmDisableInterrupts\r
@@ -28,15 +30,15 @@
 \r
   PRESERVE8\r
   AREA    SecEntryPoint, CODE, READONLY\r
-  \r
+\r
 StartupAddr        DCD      CEntryPoint\r
 \r
 _ModuleEntryPoint FUNCTION\r
   // First ensure all interrupts are disabled\r
-  blx   ArmDisableInterrupts\r
+  bl    ArmDisableInterrupts\r
 \r
   // Ensure that the MMU and caches are off\r
-  blx   ArmDisableCachesAndMmu\r
+  bl    ArmDisableCachesAndMmu\r
 \r
   // By default, we are doing a cold boot\r
   mov   r10, #ARM_SEC_COLD_BOOT\r
@@ -44,19 +46,18 @@ _ModuleEntryPoint FUNCTION
   // Jump to Platform Specific Boot Action function\r
   blx   ArmPlatformSecBootAction\r
 \r
-_IdentifyCpu \r
+_IdentifyCpu\r
   // Identify CPU ID\r
   bl    ArmReadMpidr\r
-  // Get ID of this CPU in Multicore system\r
-  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
-  and   r5, r0, r1\r
-  \r
+  // Keep a copy of the MpId register value\r
+  mov   r9, r0\r
+\r
   // Is it the Primary Core ?\r
-  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)\r
-  cmp   r5, r3\r
+  bl   ArmPlatformIsPrimaryCore\r
+  cmp   r0, #1\r
   // Only the primary core initialize the memory (SMC)\r
   beq   _InitMem\r
-  \r
+\r
 _WaitInitMem\r
   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
   // Otherwise we have to wait the Primary Core to finish the initialization\r
@@ -67,7 +68,7 @@ _WaitInitMem
   bl    ArmCallWFE\r
   // Now the Init Mem is initialized, we setup the secondary core stacks\r
   b     _SetupSecondaryCoreStack\r
-  \r
+\r
 _InitMem\r
   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
   cmp   r10, #ARM_SEC_COLD_BOOT\r
@@ -75,9 +76,6 @@ _InitMem
 \r
   // Initialize Init Boot Memory\r
   bl    ArmPlatformSecBootMemoryInit\r
-  \r
-  // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)\r
-  LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)\r
 \r
 _SetupPrimaryCoreStack\r
   // Get the top of the primary stacks (and the base of the secondary stacks)\r
@@ -96,10 +94,11 @@ _SetupSecondaryCoreStack
   // Get the top of the primary stacks (and the base of the secondary stacks)\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)\r
-  add   r1, r1, r2\r
+  add   r6, r1, r2\r
 \r
-  // Get the Core Position (ClusterId * 4) + CoreId\r
-  GetCorePositionFromMpId(r0, r5, r2)\r
+  // Get the Core Position\r
+  mov   r0, r9\r
+  bl    ArmPlatformGetCorePosition\r
   // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
   add   r0, r0, #1\r
 \r
@@ -107,21 +106,21 @@ _SetupSecondaryCoreStack
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)\r
   mul   r0, r0, r2\r
   // SP = StackBase + StackOffset\r
-  add   sp, r1, r0\r
+  add   sp, r6, r0\r
 \r
 _PrepareArguments\r
   // Move sec startup address into a data register\r
   // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
   ldr   r3, StartupAddr\r
-  \r
+\r
   // Jump to SEC C code\r
   //    r0 = mp_id\r
   //    r1 = Boot Mode\r
-  mov   r0, r5\r
+  mov   r0, r9\r
   mov   r1, r10\r
   blx   r3\r
   ENDFUNC\r
-  \r
+\r
 _NeverReturn\r
   b _NeverReturn\r
   END\r