--- /dev/null
+/** @file\r
+ C Entry point for the SEC. First C code after the reset vector.\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+#include <Ppi/TemporaryRamSupport.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+SecTemporaryRamSupport (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
+ IN UINTN CopySize\r
+ );\r
+\r
+VOID\r
+SecSwitchStack (\r
+ INTN StackDelta\r
+ );\r
+\r
+TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {\r
+ {\r
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
+ &gEfiTemporaryRamSupportPpiGuid,\r
+ &mSecTemporaryRamSupportPpi\r
+ }\r
+};\r
+\r
+\r
+VOID\r
+EFIAPI \r
+_ModuleEntryPoint(\r
+ VOID\r
+ );\r
+\r
+VOID\r
+CEntryPoint (\r
+ IN UINTN TempRamBase,\r
+ IN UINTN TempRamSize,\r
+ IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
+ )\r
+{\r
+ EFI_SEC_PEI_HAND_OFF SecCoreData;\r
+\r
+ // Turn off remapping NOR to 0. We can will now see DRAM in low memory (although it is not yet initialized)\r
+ // note: this makes SEC platform-specific for the EB platform\r
+ MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE\r
+ \r
+ //\r
+ // Bind this information into the SEC hand-off state\r
+ // Note: this must be in sync with the stuff in the asm file\r
+ // Note also: HOBs (pei temp ram) MUST be above stack\r
+ //\r
+ SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);\r
+ SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);\r
+ SecCoreData.TemporaryRamBase = (VOID*)(UINTN)TempRamBase; \r
+ SecCoreData.TemporaryRamSize = TempRamSize;\r
+ SecCoreData.PeiTemporaryRamBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase + (SecCoreData.TemporaryRamSize / 2));\r
+ SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;\r
+ SecCoreData.StackBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase);\r
+ SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;\r
+ \r
+ // jump to pei core entry point\r
+ (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);\r
+}\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+SecTemporaryRamSupport (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
+ IN UINTN CopySize\r
+ )\r
+{\r
+ //\r
+ // Migrate the whole temporary memory to permenent memory.\r
+ // \r
+ CopyMem (\r
+ (VOID*)(UINTN)PermanentMemoryBase, \r
+ (VOID*)(UINTN)TemporaryMemoryBase, \r
+ CopySize\r
+ );\r
+\r
+ SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));\r
+\r
+ //\r
+ // We need *not* fix the return address because currently, \r
+ // The PeiCore is excuted in flash.\r
+ //\r
+\r
+ //\r
+ // Simulate to invalid temporary memory, terminate temporary memory\r
+ // \r
+ //ZeroMem ((VOID*)(UINTN)TemporaryMemoryBase, CopySize);\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r